[PATCH 09/12] drm/xe: Track all exec queues in a device-level ufence list

[Stuart Summers <stuart.summers@intel.com>]

Add ufence_link to struct xe_exec_queue and maintain a device-level
ufence_list (protected by ufence_list_lock) so the default MSI-X vector
handler can reach every queue's per-queue wait queue.

As mentioned in a prior patch that adds the per queue wait queue,
we can't guarantee userspace will pass something appropriate in
the wait user fence ioctl. And in fact I have found cases in IGT
where it does not - basically it issues a VM bind without a bind
exec queue and then adds a non-bind queue to the wait user fence
call. Of course I'd argue this is a test bug, but also we want
to avoid any large regressions from the UAPI perspective, so
this ufence list is used to walk through all potential per exec queue
wait queues users might have pending to make sure we wake all of
them up if we get an MSI-X interrupt in without a corresponding
exec queue.

Note that actually hooking up the wait user fence piece of this
is deferred to a later patch.

Signed-off-by: Stuart Summers <stuart.summers@intel.com>
Assisted-by: Copilot:claude-sonnet-4.6
---
 drivers/gpu/drm/xe/xe_device.c           |  2 ++
 drivers/gpu/drm/xe/xe_device_types.h     |  6 ++++++
 drivers/gpu/drm/xe/xe_exec_queue.c       | 12 ++++++++++++
 drivers/gpu/drm/xe/xe_exec_queue_types.h |  3 +++
 4 files changed, 23 insertions(+)

diff --git a/drivers/gpu/drm/xe/xe_device.c b/drivers/gpu/drm/xe/xe_device.c
index 51e3a2dd7b22..a0fabeabc9d7 100644
--- a/drivers/gpu/drm/xe/xe_device.c
+++ b/drivers/gpu/drm/xe/xe_device.c
@@ -549,6 +549,8 @@ int xe_device_init_early(struct xe_device *xe)
 	xe_validation_device_init(&xe->val);
 
 	init_waitqueue_head(&xe->ufence_wq);
+	spin_lock_init(&xe->ufence_list_lock);
+	INIT_LIST_HEAD(&xe->ufence_list);
 
 	init_rwsem(&xe->usm.lock);
 
diff --git a/drivers/gpu/drm/xe/xe_device_types.h b/drivers/gpu/drm/xe/xe_device_types.h
index ff15de34fd17..bf421d8cd0b1 100644
--- a/drivers/gpu/drm/xe/xe_device_types.h
+++ b/drivers/gpu/drm/xe/xe_device_types.h
@@ -351,6 +351,12 @@ struct xe_device {
 	/** @ufence_wq: user fence wait queue */
 	wait_queue_head_t ufence_wq;
 
+	/** @ufence_list_lock: protects @ufence_list */
+	spinlock_t ufence_list_lock;
+
+	/** @ufence_list: list of all exec queues for default-vector ufence wake */
+	struct list_head ufence_list;
+
 	/** @preempt_fence_wq: used to serialize preempt fences */
 	struct workqueue_struct *preempt_fence_wq;
 
diff --git a/drivers/gpu/drm/xe/xe_exec_queue.c b/drivers/gpu/drm/xe/xe_exec_queue.c
index aa49400b67ba..31597aac3025 100644
--- a/drivers/gpu/drm/xe/xe_exec_queue.c
+++ b/drivers/gpu/drm/xe/xe_exec_queue.c
@@ -169,8 +169,14 @@ static void exec_queue_msix_fini(struct xe_exec_queue *q)
 
 static void __xe_exec_queue_free(struct xe_exec_queue *q)
 {
+	struct xe_device *xe = gt_to_xe(q->gt);
+	unsigned long irq_flags;
 	int i;
 
+	spin_lock_irqsave(&xe->ufence_list_lock, irq_flags);
+	list_del_init(&q->ufence_link);
+	spin_unlock_irqrestore(&xe->ufence_list_lock, irq_flags);
+
 	for (i = 0; i < XE_EXEC_QUEUE_TLB_INVAL_COUNT; ++i)
 		if (q->tlb_inval[i].dep_scheduler)
 			xe_dep_scheduler_fini(q->tlb_inval[i].dep_scheduler);
@@ -236,6 +242,7 @@ static struct xe_exec_queue *__xe_exec_queue_alloc(struct xe_device *xe,
 {
 	struct xe_exec_queue *q;
 	struct xe_gt *gt = hwe->gt;
+	unsigned long irq_flags;
 	int err;
 
 	/* only kernel queues can be permanent */
@@ -260,7 +267,12 @@ static struct xe_exec_queue *__xe_exec_queue_alloc(struct xe_device *xe,
 	INIT_LIST_HEAD(&q->multi_gt_link);
 	INIT_LIST_HEAD(&q->hw_engine_group_link);
 	INIT_LIST_HEAD(&q->pxp.link);
+	INIT_LIST_HEAD(&q->ufence_link);
 	init_waitqueue_head(&q->ufence_wq);
+
+	spin_lock_irqsave(&xe->ufence_list_lock, irq_flags);
+	list_add(&q->ufence_link, &xe->ufence_list);
+	spin_unlock_irqrestore(&xe->ufence_list_lock, irq_flags);
 	spin_lock_init(&q->multi_queue.lock);
 	spin_lock_init(&q->lrc_lookup_lock);
 	q->multi_queue.priority = XE_MULTI_QUEUE_PRIORITY_NORMAL;
diff --git a/drivers/gpu/drm/xe/xe_exec_queue_types.h b/drivers/gpu/drm/xe/xe_exec_queue_types.h
index edd2ecc8a27c..1cd2dc055b81 100644
--- a/drivers/gpu/drm/xe/xe_exec_queue_types.h
+++ b/drivers/gpu/drm/xe/xe_exec_queue_types.h
@@ -234,6 +234,9 @@ struct xe_exec_queue {
 	/** @ufence_wq: per-queue user fence wait queue */
 	wait_queue_head_t ufence_wq;
 
+	/** @ufence_link: link into xe_device.ufence_list for default-vector wake */
+	struct list_head ufence_link;
+
 	/** @ufence_syncobj: User fence syncobj */
 	struct drm_syncobj *ufence_syncobj;
 
-- 
2.43.0