From: Andrew Rembrandt <kernel@rembrandt.dev>
To: Yixun Lan <dlan@kernel.org>
Cc: linux-riscv@lists.infradead.org, spacemit@lists.linux.dev,
linux-kernel@vger.kernel.org, kernel@rembrandt.dev
Subject: [PATCH] riscv: dts: spacemit: k3-pico-itx: Fix non-functional ethernet TX timing
Date: Mon, 8 Jun 2026 20:23:58 +0200 [thread overview]
Message-ID: <20260608182358.170489-1-kernel@rembrandt.dev> (raw)
The "rgmii-id" PHY mode applies a symmetric 2ns internal delay in the
PHY. On the Pico-ITX board this leaves insufficient TX timing margin and
no ethernet traffic passes.
Add a 400ps MAC-side TX internal delay on top of the PHY's delay to
correct the TX clock/data skew. The value follows the vendor fork's
asymmetric tuning (tx-phase 73 x 33.3ps - 2000ps ID ~= 400ps); the
driver rounds tx-internal-delay-ps to the nearest supported step.
This builds on commit 3ea695eb111f ("dts: riscv: spacemit: k3: Fix I/O
power settings"), which fixed the GMAC0 1.8V/3.3V I/O switch
Tested on Pico-ITX hardware with iperf3: 60s TCP each direction and 60s
UDP, all at 1Gbps with no TX/RX errors on the interface.
Fixes: 74657a376960 ("riscv: dts: spacemit: Add ethernet device for K3")
Signed-off-by: Andrew Rembrandt <kernel@rembrandt.dev>
---
arch/riscv/boot/dts/spacemit/k3-pico-itx.dts | 1 +
1 file changed, 1 insertion(+)
diff --git a/arch/riscv/boot/dts/spacemit/k3-pico-itx.dts b/arch/riscv/boot/dts/spacemit/k3-pico-itx.dts
index b89c1521e664..59aecaa2d32a 100644
--- a/arch/riscv/boot/dts/spacemit/k3-pico-itx.dts
+++ b/arch/riscv/boot/dts/spacemit/k3-pico-itx.dts
@@ -186,6 +186,7 @@ ð0 {
pinctrl-names = "default";
pinctrl-0 = <&gmac0_rgmii_0_cfg>, <&gmac0_phy_0_cfg>;
phy-mode = "rgmii-id";
+ tx-internal-delay-ps = <400>;
phy-handle = <&phy0>;
status = "okay";
--
2.54.0
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WARNING: multiple messages have this Message-ID (diff)
From: Andrew Rembrandt <kernel@rembrandt.dev>
To: Yixun Lan <dlan@kernel.org>
Cc: linux-riscv@lists.infradead.org, spacemit@lists.linux.dev,
linux-kernel@vger.kernel.org, kernel@rembrandt.dev
Subject: [PATCH] riscv: dts: spacemit: k3-pico-itx: Fix non-functional ethernet TX timing
Date: Mon, 8 Jun 2026 20:23:58 +0200 [thread overview]
Message-ID: <20260608182358.170489-1-kernel@rembrandt.dev> (raw)
The "rgmii-id" PHY mode applies a symmetric 2ns internal delay in the
PHY. On the Pico-ITX board this leaves insufficient TX timing margin and
no ethernet traffic passes.
Add a 400ps MAC-side TX internal delay on top of the PHY's delay to
correct the TX clock/data skew. The value follows the vendor fork's
asymmetric tuning (tx-phase 73 x 33.3ps - 2000ps ID ~= 400ps); the
driver rounds tx-internal-delay-ps to the nearest supported step.
This builds on commit 3ea695eb111f ("dts: riscv: spacemit: k3: Fix I/O
power settings"), which fixed the GMAC0 1.8V/3.3V I/O switch
Tested on Pico-ITX hardware with iperf3: 60s TCP each direction and 60s
UDP, all at 1Gbps with no TX/RX errors on the interface.
Fixes: 74657a376960 ("riscv: dts: spacemit: Add ethernet device for K3")
Signed-off-by: Andrew Rembrandt <kernel@rembrandt.dev>
---
arch/riscv/boot/dts/spacemit/k3-pico-itx.dts | 1 +
1 file changed, 1 insertion(+)
diff --git a/arch/riscv/boot/dts/spacemit/k3-pico-itx.dts b/arch/riscv/boot/dts/spacemit/k3-pico-itx.dts
index b89c1521e664..59aecaa2d32a 100644
--- a/arch/riscv/boot/dts/spacemit/k3-pico-itx.dts
+++ b/arch/riscv/boot/dts/spacemit/k3-pico-itx.dts
@@ -186,6 +186,7 @@ ð0 {
pinctrl-names = "default";
pinctrl-0 = <&gmac0_rgmii_0_cfg>, <&gmac0_phy_0_cfg>;
phy-mode = "rgmii-id";
+ tx-internal-delay-ps = <400>;
phy-handle = <&phy0>;
status = "okay";
--
2.54.0
next reply other threads:[~2026-06-08 18:24 UTC|newest]
Thread overview: 6+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-06-08 18:23 Andrew Rembrandt [this message]
2026-06-08 18:23 ` [PATCH] riscv: dts: spacemit: k3-pico-itx: Fix non-functional ethernet TX timing Andrew Rembrandt
2026-06-09 5:37 ` Inochi Amaoto
2026-06-09 5:37 ` Inochi Amaoto
2026-06-09 18:24 ` Andrew Rembrandt
2026-06-09 18:24 ` Andrew Rembrandt
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