From: Dapeng Mi <dapeng1.mi@linux.intel.com>
To: Peter Zijlstra <peterz@infradead.org>,
Ingo Molnar <mingo@redhat.com>,
Arnaldo Carvalho de Melo <acme@kernel.org>,
Namhyung Kim <namhyung@kernel.org>,
Ian Rogers <irogers@google.com>,
Adrian Hunter <adrian.hunter@intel.com>,
Alexander Shishkin <alexander.shishkin@linux.intel.com>,
Andi Kleen <ak@linux.intel.com>,
Eranian Stephane <eranian@google.com>
Cc: linux-kernel@vger.kernel.org, linux-perf-users@vger.kernel.org,
Dapeng Mi <dapeng1.mi@intel.com>, Zide Chen <zide.chen@intel.com>,
Falcon Thomas <thomas.falcon@intel.com>,
Xudong Hao <xudong.hao@intel.com>,
Dapeng Mi <dapeng1.mi@linux.intel.com>
Subject: [Patch v2 2/9] perf/x86: Introduce is_x86_pmu() helper
Date: Tue, 9 Jun 2026 13:02:15 +0800 [thread overview]
Message-ID: <20260609050222.2458129-3-dapeng1.mi@linux.intel.com> (raw)
In-Reply-To: <20260609050222.2458129-1-dapeng1.mi@linux.intel.com>
From: Ian Rogers <irogers@google.com>
To facilitate the detection of x86 PMU structures in upcoming patches,
the is_x86_pmu() helper is introduced. Additionally, the is_x86_event()
helper has been refactored to utilize is_x86_pmu().
No function changes intended.
Signed-off-by: Ian Rogers <irogers@google.com>
Signed-off-by: Dapeng Mi <dapeng1.mi@linux.intel.com>
Reviewed-by: Zide Chen <zide.chen@intel.com>
Reviewed-by: Thomas Falcon <thomas.falcon@intel.com>
---
arch/x86/events/core.c | 16 ----------------
arch/x86/events/perf_event.h | 18 +++++++++++++++++-
2 files changed, 17 insertions(+), 17 deletions(-)
diff --git a/arch/x86/events/core.c b/arch/x86/events/core.c
index 4b9e105309c6..3bd0522afe6d 100644
--- a/arch/x86/events/core.c
+++ b/arch/x86/events/core.c
@@ -774,22 +774,6 @@ void x86_pmu_enable_all(int added)
}
}
-int is_x86_event(struct perf_event *event)
-{
- /*
- * For a non-hybrid platforms, the type of X86 pmu is
- * always PERF_TYPE_RAW.
- * For a hybrid platform, the PERF_PMU_CAP_EXTENDED_HW_TYPE
- * is a unique capability for the X86 PMU.
- * Use them to detect a X86 event.
- */
- if (event->pmu->type == PERF_TYPE_RAW ||
- event->pmu->capabilities & PERF_PMU_CAP_EXTENDED_HW_TYPE)
- return true;
-
- return false;
-}
-
struct pmu *x86_get_pmu(unsigned int cpu)
{
struct cpu_hw_events *cpuc = &per_cpu(cpu_hw_events, cpu);
diff --git a/arch/x86/events/perf_event.h b/arch/x86/events/perf_event.h
index 5902a297daa1..dbb5c8e8a8ea 100644
--- a/arch/x86/events/perf_event.h
+++ b/arch/x86/events/perf_event.h
@@ -115,7 +115,23 @@ static inline bool is_topdown_event(struct perf_event *event)
return is_metric_event(event) || is_slots_event(event);
}
-int is_x86_event(struct perf_event *event);
+static inline bool is_x86_pmu(struct pmu *pmu)
+{
+ /*
+ * For a non-hybrid platforms, the type of X86 pmu is
+ * always PERF_TYPE_RAW.
+ * For a hybrid platform, the PERF_PMU_CAP_EXTENDED_HW_TYPE
+ * is a unique capability for the X86 PMU.
+ * Use them to detect a X86 event.
+ */
+ return pmu->type == PERF_TYPE_RAW ||
+ pmu->capabilities & PERF_PMU_CAP_EXTENDED_HW_TYPE;
+}
+
+static inline bool is_x86_event(struct perf_event *event)
+{
+ return is_x86_pmu(event->pmu);
+}
static inline bool check_leader_group(struct perf_event *leader, int flags)
{
--
2.34.1
next prev parent reply other threads:[~2026-06-09 5:07 UTC|newest]
Thread overview: 34+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-06-09 5:02 [Patch v2 0/9] perf/x86: Miscellaneous PMU bug fixes Dapeng Mi
2026-06-09 5:02 ` [Patch v2 1/9] perf/x86/intel: Remove anythread_deprecated bit from perf_capabilities Dapeng Mi
2026-06-09 5:02 ` Dapeng Mi [this message]
2026-06-09 5:02 ` [Patch v2 3/9] perf/x86: Update cap_user_rdpmc base on rdpmc user disable state Dapeng Mi
2026-06-09 14:48 ` Peter Zijlstra
2026-06-10 1:47 ` Mi, Dapeng
2026-06-09 5:02 ` [Patch v2 4/9] perf/x86/intel: Fallback to sw branch type decoding if no hw decoding Dapeng Mi
2026-06-09 5:24 ` sashiko-bot
2026-06-09 10:04 ` Mi, Dapeng
2026-06-09 14:49 ` Peter Zijlstra
2026-06-10 1:53 ` Mi, Dapeng
2026-06-09 5:02 ` [Patch v2 5/9] perf/x86/intel: Drop LBR entries whose privilege level mismatches br_sel Dapeng Mi
2026-06-09 5:21 ` sashiko-bot
2026-06-09 9:40 ` Mi, Dapeng
2026-06-09 14:52 ` Peter Zijlstra
2026-06-10 1:57 ` Mi, Dapeng
2026-06-09 5:02 ` [Patch v2 6/9] perf/x86/intel: Validate return value of intel_pmu_init_hybrid() Dapeng Mi
2026-06-09 5:25 ` sashiko-bot
2026-06-09 9:44 ` Mi, Dapeng
2026-06-10 8:16 ` Peter Zijlstra
2026-06-10 8:34 ` Mi, Dapeng
2026-06-09 5:02 ` [Patch v2 7/9] perf/x86/intel: Drop fixed-counter PEBS constraints for baseline PEBS Dapeng Mi
2026-06-10 8:20 ` Peter Zijlstra
2026-06-10 8:23 ` Peter Zijlstra
2026-06-10 8:50 ` Mi, Dapeng
2026-06-10 11:21 ` Peter Zijlstra
2026-06-10 11:42 ` Mi, Dapeng
2026-06-10 22:22 ` Peter Zijlstra
2026-06-09 5:02 ` [Patch v2 8/9] perf/core: Fix kernel register info leak via hardware skid Dapeng Mi
2026-06-10 9:16 ` Peter Zijlstra
2026-06-11 6:17 ` Mi, Dapeng
2026-06-09 5:02 ` [Patch v2 9/9] perf/core: Check kernel access when kernel callchains are requested Dapeng Mi
2026-06-09 5:24 ` sashiko-bot
2026-06-09 9:49 ` Mi, Dapeng
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