[PATCH v3 0/7] don't allow changes to inactive colorops

[PATCH v3 0/7] don't allow changes to inactive colorops

[Melissa Wen]

This series is a follow-up of what was discussed in [1] and on #wayland
IRC channel regarding policy and userspace expectations on changes in
colorop properties and the current status of the color pipeline in which
the colorop is part of. In short, we agreed that userspace can change
properties of colorops that are currently part of an active color
pipeline or when the pipeline is switching status in the same commit.
However, userspace cannot change colorop properties of inactive color
pipeline in the expactation that it will be activated at some point in
the future.

Userspace also expects persistence of color pipeline already set, even
if it becomes inactive for a while, when activated, colorop settings
previouly set should be preserved.

In addition, I found some bugs on IGT tests when this policy is applied.
So I sent bug fixes to kms_colorop and kms_properties to behave
according to this contract [2]. The rest of the series in [1] was
detached in [3] since there is no dependency between them.

[v1] https://lore.kernel.org/dri-devel/20260526142940.504911-1-mwen@igalia.com/
Changes:
- define a macro to walk in the color pipeline (Alex H.)
- fix checkpatch warning (Alex H.)
[v2] https://lore.kernel.org/dri-devel/20260604180457.1110110-1-mwen@igalia.com/
Changes:
- [Drop] drm/atomic: duplicate state of all colorops
  If inactive colorops state are duplicated on resume, the commit will be
  rejected. 
- [New] Four new patches to make AMD driver match the policy of colorop
  updates only for colorops in active color pipelines plus individual
  colorop updates. It also tries to untangle COLOR_PIPELINE = Bypass from
  colorop BYPASS prop = true. I think patches 3-5 can be cherry-picked and
  applied if it looks correct for AMD, I just included them here for
  context (for example, Sashiko reported an issue in the previous version
  of this series).

[1] https://lore.kernel.org/dri-devel/20260519211111.228303-1-mwen@igalia.com/
[2] https://lore.kernel.org/igt-dev/20260602211259.898147-1-mwen@igalia.com
[3] https://lore.kernel.org/igt-dev/20260526140752.503380-1-mwen@igalia.com/


Melissa

Melissa Wen (7):
  drm/atomic: only add states of active or transient active colorops
  drm/atomic: reject colorop update from inactive color pipeline
  drm/amd/display: don't check colorop status if its in an inactive
    pipeline
  drm/amd/display: truly bypass plane colorop 3x4 matrix and hdr mult
  drm/amd/display: make shaper bypass mode cleaner
  drm/amd/display: fix bnld colorop bypass mode
  drm/amd/display: allow individual colorop changes

 .../gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c |  31 ++-
 .../amd/display/amdgpu_dm/amdgpu_dm_color.c   | 178 +++++++-----------
 drivers/gpu/drm/drm_atomic.c                  | 125 +++++++++++-
 include/drm/drm_colorop.h                     |   3 +
 4 files changed, 207 insertions(+), 130 deletions(-)

-- 
2.53.0

[PATCH v3 1/7] drm/atomic: only add states of active or transient active colorops

[Melissa Wen]

Only consider affected colorop states those that are part of an active
color pipeline or a pipeline that is about to be activated or
deactivated in the same atomic commit, i.e., colorop is in the chain of
old/new plane color pipeline property. To cover color_pipeline
deactivation, remove the condition for plane_state->color_pipeline.

Signed-off-by: Melissa Wen <mwen@igalia.com>
---

v2: define a macro to walk in the color pipeline (Alex H.)
---
 drivers/gpu/drm/drm_atomic.c | 65 +++++++++++++++++++++++++++++++-----
 include/drm/drm_colorop.h    |  3 ++
 2 files changed, 59 insertions(+), 9 deletions(-)

diff --git a/drivers/gpu/drm/drm_atomic.c b/drivers/gpu/drm/drm_atomic.c
index 3af1b9cc9a06..464562861408 100644
--- a/drivers/gpu/drm/drm_atomic.c
+++ b/drivers/gpu/drm/drm_atomic.c
@@ -892,6 +892,57 @@ static int drm_atomic_plane_check(const struct drm_plane_state *old_plane_state,
 	return 0;
 }
 
+/*
+ * This function walks old and new plane state color pipelines and adds all
+ * colorops in use by @plane to the atomic configuration @state. This is useful
+ * when an atomic commit needs to check all currently enabled or about to be
+ * enabled colorop on @plane, e.g. when changing the mode. This also avoids
+ * including colorop states that are not part of the atomic state.
+ *
+ * Returns:
+ * 0 on success or can fail with -EDEADLK or -ENOMEM. When the error is EDEADLK
+ * then the w/w mutex code has detected a deadlock and the entire atomic
+ * sequence must be restarted. All other errors are fatal.
+ */
+static int
+drm_atomic_add_pipeline_colorops(struct drm_atomic_commit *state,
+				 struct drm_plane *plane)
+{
+	struct drm_colorop *colorop;
+	struct drm_colorop_state *colorop_state;
+	struct drm_plane_state *new_plane_state, *old_plane_state;
+
+	new_plane_state = drm_atomic_get_new_plane_state(state, plane);
+	old_plane_state = drm_atomic_get_old_plane_state(state, plane);
+
+	if (WARN_ON(!new_plane_state || !old_plane_state))
+		return -EINVAL;
+
+	drm_dbg_atomic(plane->dev,
+		       "Adding old+new pipeline colorops for [PLANE:%d:%s]\n",
+		       plane->base.id, plane->name);
+
+	drm_for_each_colorop_in_pipeline(colorop,
+					 new_plane_state->color_pipeline) {
+		colorop_state = drm_atomic_get_colorop_state(state, colorop);
+		if (IS_ERR(colorop_state))
+			return PTR_ERR(colorop_state);
+	}
+
+	/* Same color pipeline as new; no point walking old. */
+	if (new_plane_state->color_pipeline == old_plane_state->color_pipeline)
+		return 0;
+
+	drm_for_each_colorop_in_pipeline(colorop,
+					 old_plane_state->color_pipeline) {
+		colorop_state = drm_atomic_get_colorop_state(state, colorop);
+		if (IS_ERR(colorop_state))
+			return PTR_ERR(colorop_state);
+	}
+
+	return 0;
+}
+
 static void drm_atomic_colorop_print_state(struct drm_printer *p,
 					   const struct drm_colorop_state *state)
 {
@@ -1671,11 +1722,9 @@ drm_atomic_add_affected_planes(struct drm_atomic_commit *state,
 		if (IS_ERR(plane_state))
 			return PTR_ERR(plane_state);
 
-		if (plane_state->color_pipeline) {
-			ret = drm_atomic_add_affected_colorops(state, plane);
-			if (ret)
-				return ret;
-		}
+		ret = drm_atomic_add_pipeline_colorops(state, plane);
+		if (ret)
+			return ret;
 	}
 	return 0;
 }
@@ -1687,10 +1736,8 @@ EXPORT_SYMBOL(drm_atomic_add_affected_planes);
  * @plane: DRM plane
  *
  * This function walks the current configuration and adds all colorops
- * currently used by @plane to the atomic configuration @state. This is useful
- * when an atomic commit also needs to check all currently enabled colorop on
- * @plane, e.g. when changing the mode. It's also useful when re-enabling a plane
- * to avoid special code to force-enable all colorops.
+ * currently used by @plane to the atomic configuration @state. It's useful
+ * when re-enabling a plane to avoid special code to force-enable all colorops.
  *
  * Since acquiring a colorop state will always also acquire the w/w mutex of the
  * current plane for that colorop (if there is any) adding all the colorop states for
diff --git a/include/drm/drm_colorop.h b/include/drm/drm_colorop.h
index b4b9e4f558ab..006278e21d49 100644
--- a/include/drm/drm_colorop.h
+++ b/include/drm/drm_colorop.h
@@ -459,6 +459,9 @@ static inline unsigned int drm_colorop_index(const struct drm_colorop *colorop)
 #define drm_for_each_colorop(colorop, dev) \
 	list_for_each_entry(colorop, &(dev)->mode_config.colorop_list, head)
 
+#define drm_for_each_colorop_in_pipeline(colorop, pipeline) \
+	for ((colorop) = (pipeline); (colorop); (colorop) = (colorop)->next)
+
 /**
  * drm_get_colorop_type_name - return a string for colorop type
  * @type: colorop type to compute name of
-- 
2.53.0

Re: [PATCH v3 1/7] drm/atomic: only add states of active or transient active colorops

[sashiko-bot]

Thank you for your contribution! Sashiko AI review found 2 potential issue(s) to consider:

New issues:
- [Medium] Incomplete refactoring: drm_atomic_helper_duplicate_state still calls drm_atomic_add_affected_colorops.

Pre-existing issues:
- [High] Architectural Flaw: Colorops are omitted from the atomic state during normal plane updates.
--

commit a131c9a42c3beaf39f56794937e21266031060d8
Author: Melissa Wen <mwen@igalia.com>

drm/atomic: only add states of active or transient active colorops

Only consider affected colorop states those that are part of an active
color pipeline or a pipeline that is about to be activated or
deactivated in the same atomic commit.

> diff --git a/drivers/gpu/drm/drm_atomic.c b/drivers/gpu/drm/drm_atomic.c
> index 170de30c28ae4..0d36a955c4d43 100644
> --- a/drivers/gpu/drm/drm_atomic.c
> +++ b/drivers/gpu/drm/drm_atomic.c
[ ... ]
> @@ -1591,11 +1642,9 @@ drm_atomic_add_affected_planes(struct drm_atomic_commit *state,
>  		if (IS_ERR(plane_state))
>  			return PTR_ERR(plane_state);
>  
> -		if (plane_state->color_pipeline) {
> -			ret = drm_atomic_add_affected_colorops(state, plane);
> -			if (ret)
> -				return ret;
> -		}
> +		ret = drm_atomic_add_pipeline_colorops(state, plane);
> +		if (ret)
> +			return ret;

[Severity: High]
This isn't a bug introduced by this patch, but since
drm_atomic_add_affected_planes() executes exclusively during CRTC modesets,
does this mean active colorops are never added to the atomic state during a
simple plane update like a page flip?

Drivers that iterate over state->colorops via for_each_new_colorop_in_state()
(like intel_plane_color_copy_uapi_to_hw_state() in the intel driver)
will silently fail on page flips since the hardware state blobs remain
empty. Should the color pipeline dependency tracking be anchored to the
plane's inclusion in the state, perhaps within drm_atomic_get_plane_state()?

[Severity: Medium]
Also, the commit message states the goal is to remove the condition for
plane_state->color_pipeline to handle deactivations. Did this patch miss
updating drm_atomic_helper_duplicate_state() in drm_atomic_helper.c?

It still checks if (plane_state->color_pipeline) and calls the old
drm_atomic_add_affected_colorops(), which loops over all colorops belonging
to the plane:

drivers/gpu/drm/drm_atomic_helper.c:drm_atomic_helper_duplicate_state() {
	...
	if (plane_state->color_pipeline) {
		err = drm_atomic_add_affected_colorops(state, plane);
		if (err)
			goto free;
	}
	...
}

Should it be updated to use the newly introduced
drm_atomic_add_pipeline_colorops() unconditionally to ensure consistent state
duplication during suspend/resume?

-- 
Sashiko AI review · https://sashiko.dev/#/patchset/20260609121230.1358786-1-mwen@igalia.com?part=1

[PATCH v3 2/7] drm/atomic: reject colorop update from inactive color pipeline

[Melissa Wen]

Only allow updates on colorops that are part of an active pipeline, i.e.
check if a colorop belongs to the color pipeline of a plane in its
current, new or old state. If not, reject the state change of this
inactive colorop. Performing this check later in drm_atomic_check_only()
to remove the ordering dependency that would exist if done at the time
of colorop property setting. Userspace is allowed to change colorops of
an active color pipeline, or when activating or deactivating its
pipeline in the same commit. However, changes in inactive color pipeline
is not allowed.

Suggested-by: Chaitanya Kumar Borah <chaitanya.kumar.borah@intel.com>
Signed-off-by: Melissa Wen <mwen@igalia.com>
---
 drivers/gpu/drm/drm_atomic.c | 60 ++++++++++++++++++++++++++++++++++++
 1 file changed, 60 insertions(+)

diff --git a/drivers/gpu/drm/drm_atomic.c b/drivers/gpu/drm/drm_atomic.c
index 464562861408..960b52624deb 100644
--- a/drivers/gpu/drm/drm_atomic.c
+++ b/drivers/gpu/drm/drm_atomic.c
@@ -943,6 +943,55 @@ drm_atomic_add_pipeline_colorops(struct drm_atomic_commit *state,
 	return 0;
 }
 
+/**
+ * drm_atomic_colorop_check - check new colorop state
+ * @new_colorop_state: new colorop state to check
+ *
+ * Ensure that the colorop in @new_colorop_state belongs to an active color
+ * pipeline, i.e. it's in the chain of colorops set to the color_pipeline
+ * property of current, old or new plane state.
+ *
+ * Returns: 0 on success, -EINVAL otherwise.
+ */
+static int drm_atomic_colorop_check(const struct drm_colorop_state *new_colorop_state)
+{
+	struct drm_atomic_commit *state = new_colorop_state->state;
+	struct drm_plane *plane = new_colorop_state->colorop->plane;
+	struct drm_plane_state *new_plane_state, *old_plane_state;
+	struct drm_colorop *colorop;
+
+	new_plane_state = drm_atomic_get_new_plane_state(state, plane);
+	old_plane_state = drm_atomic_get_old_plane_state(state, plane);
+
+	/* No changes in the plane state. Check current-committed plane state */
+	if (!new_plane_state) {
+		for (colorop = plane->state->color_pipeline; colorop; colorop = colorop->next)
+			if (colorop == new_colorop_state->colorop)
+				return 0;
+		return -EINVAL;
+	}
+
+	if (WARN_ON(!old_plane_state))
+		return -EINVAL;
+
+	/* Check if the colorop is active in the new plane state */
+	for (colorop = new_plane_state->color_pipeline; colorop; colorop = colorop->next)
+		if (colorop == new_colorop_state->colorop)
+			return 0;
+
+	/* Same color pipeline as new; no point walking old. Colorop isn't active */
+	if (new_plane_state->color_pipeline == old_plane_state->color_pipeline)
+		return -EINVAL;
+
+	/* Check if the colorop was active in the old plane state */
+	for (colorop = old_plane_state->color_pipeline; colorop; colorop = colorop->next)
+		if (colorop == new_colorop_state->colorop)
+			return 0;
+
+	/* Colorop is not part of an active color pipeline. */
+	return -EINVAL;
+}
+
 static void drm_atomic_colorop_print_state(struct drm_printer *p,
 					   const struct drm_colorop_state *state)
 {
@@ -1792,6 +1841,8 @@ int drm_atomic_check_only(struct drm_atomic_commit *state)
 	struct drm_plane *plane;
 	struct drm_plane_state *old_plane_state;
 	struct drm_plane_state *new_plane_state;
+	struct drm_colorop *colorop;
+	struct drm_colorop_state *new_colorop_state;
 	struct drm_crtc *crtc;
 	struct drm_crtc_state *old_crtc_state;
 	struct drm_crtc_state *new_crtc_state;
@@ -1808,6 +1859,15 @@ int drm_atomic_check_only(struct drm_atomic_commit *state)
 			requested_crtc |= drm_crtc_mask(crtc);
 	}
 
+	for_each_new_colorop_in_state(state, colorop, new_colorop_state, i) {
+		ret = drm_atomic_colorop_check(new_colorop_state);
+		if (ret) {
+			drm_dbg_atomic(dev, "[COLOROP:%d:%d] isn't in an active color pipeline.\n",
+				       colorop->base.id, colorop->type);
+			return ret;
+		}
+	}
+
 	for_each_oldnew_plane_in_state(state, plane, old_plane_state, new_plane_state, i) {
 		ret = drm_atomic_plane_check(old_plane_state, new_plane_state);
 		if (ret) {
-- 
2.53.0

Re: [PATCH v3 2/7] drm/atomic: reject colorop update from inactive color pipeline

[sashiko-bot]

Thank you for your contribution! Sashiko AI review found 1 potential issue(s) to consider:
- [High] drm_atomic_colorop_check() allows modifying colorops without adding the parent plane to the atomic commit, bypassing hardware updates.
--

commit c38eca82c086d2e818d8283fed72b37dc3abbab9
Author: Melissa Wen <mwen@igalia.com>

drm/atomic: reject colorop update from inactive color pipeline

This commit rejects updates on colorops that are not part of an active
pipeline. It adds drm_atomic_colorop_check() to verify the color pipeline
of a plane in its current, new or old state.

> diff --git a/drivers/gpu/drm/drm_atomic.c b/drivers/gpu/drm/drm_atomic.c
> index 0d36a955c4d43..ec3c6e4e5a062 100644
> --- a/drivers/gpu/drm/drm_atomic.c
> +++ b/drivers/gpu/drm/drm_atomic.c

[ ... ]

> @@ -863,6 +863,55 @@ drm_atomic_add_pipeline_colorops(struct drm_atomic_commit *state,
>  	return 0;
>  }
>  
> +/**
> + * drm_atomic_colorop_check - check new colorop state
> + * @new_colorop_state: new colorop state to check
> + *
> + * Ensure that the colorop in @new_colorop_state belongs to an active color
> + * pipeline, i.e. it's in the chain of colorops set to the color_pipeline
> + * property of current, old or new plane state.
> + *
> + * Returns: 0 on success, -EINVAL otherwise.
> + */
> +static int drm_atomic_colorop_check(const struct drm_colorop_state *new_colorop_state)
> +{
> +	struct drm_atomic_commit *state = new_colorop_state->state;
> +	struct drm_plane *plane = new_colorop_state->colorop->plane;
> +	struct drm_plane_state *new_plane_state, *old_plane_state;
> +	struct drm_colorop *colorop;
> +
> +	new_plane_state = drm_atomic_get_new_plane_state(state, plane);
> +	old_plane_state = drm_atomic_get_old_plane_state(state, plane);
> +
> +	/* No changes in the plane state. Check current-committed plane state */
> +	if (!new_plane_state) {
> +		for (colorop = plane->state->color_pipeline; colorop; colorop = colorop->next)
> +			if (colorop == new_colorop_state->colorop)
> +				return 0;

[Severity: High]
If a colorop property is updated but the parent plane isn't explicitly
modified, new_plane_state will be NULL and this returns 0.

Since drm_colorop does not have its own atomic_update callback, hardware
programming relies on the plane's commit paths iterating over planes in
the atomic state.

If the plane is missing from the atomic state, will the hardware ever be
reprogrammed with the new colorop parameters, or does this result in a
silent failure where only the software state is updated?

Should the affected plane be actively pulled into the atomic state
(e.g., via drm_atomic_get_plane_state()) whenever a colorop is modified?

> +		return -EINVAL;
> +	}
> +
> +	if (WARN_ON(!old_plane_state))
> +		return -EINVAL;
> +
> +	/* Check if the colorop is active in the new plane state */
> +	for (colorop = new_plane_state->color_pipeline; colorop; colorop = colorop->next)
> +		if (colorop == new_colorop_state->colorop)
> +			return 0;
> +
> +	/* Same color pipeline as new; no point walking old. Colorop isn't active */
> +	if (new_plane_state->color_pipeline == old_plane_state->color_pipeline)
> +		return -EINVAL;
> +
> +	/* Check if the colorop was active in the old plane state */
> +	for (colorop = old_plane_state->color_pipeline; colorop; colorop = colorop->next)
> +		if (colorop == new_colorop_state->colorop)
> +			return 0;
> +
> +	/* Colorop is not part of an active color pipeline. */
> +	return -EINVAL;
> +}

-- 
Sashiko AI review · https://sashiko.dev/#/patchset/20260609121230.1358786-1-mwen@igalia.com?part=2

[PATCH v3 3/7] drm/amd/display: don't check colorop status if its in an inactive pipeline

[Melissa Wen]

If colorop BYPASS property is true, but the colorop isn't part of an
active/transient active color pipeline, this colorop status should not
be taken into account when checking if a plane color pipeline is
actually active. For example, if the userspace doesn't explicitly set a
colorop obj to bypass but deactivates its color pipeline by setting
plane COLOR_PIPELINE to bypass, it means that colorop is inactive
regardless of its BYPASS property status.

Reported-by: Sashiko <sashiko-bot@kernel.org>
Fixes: d3a549f4df78 ("drm/amd/display: Use overlay cursor when color pipeline is active")
Signed-off-by: Melissa Wen <mwen@igalia.com>
---
 .../gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c | 31 +++++++++++++------
 1 file changed, 21 insertions(+), 10 deletions(-)

diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
index ba7f98a87808..2edec3e1b838 100644
--- a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
+++ b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
@@ -12590,9 +12590,9 @@ static int add_affected_mst_dsc_crtcs(struct drm_atomic_commit *state, struct dr
  * @use_old: if true, inspect the old colorop states; otherwise the new ones
  *
  * A color pipeline may be selected (color_pipeline != NULL) but still is
- * inactive if every colorop in the chain is bypassed.  Only return
- * true when at least one colorop has bypass == false, meaning the cursor
- * would be subjected to the transformation in native mode.
+ * inactive if every colorop in the chain is bypassed. Only return true when at
+ * least one active colorop has bypass == false, meaning the cursor would be
+ * subjected to the transformation in native mode.
  *
  * Return: true if the pipeline modifies pixels, false otherwise.
  */
@@ -12600,18 +12600,29 @@ static bool dm_plane_color_pipeline_active(struct drm_atomic_commit *state,
 					   struct drm_plane *plane,
 					   bool use_old)
 {
-	struct drm_colorop *colorop;
-	struct drm_colorop_state *old_colorop_state, *new_colorop_state;
-	int i;
+	struct drm_plane_state *plane_state = use_old ?
+					      drm_atomic_get_old_plane_state(state, plane) :
+					      drm_atomic_get_new_plane_state(state, plane);
+	struct drm_colorop *colorop, *pipeline;
+	struct drm_colorop_state *cstate;
 
-	for_each_oldnew_colorop_in_state(state, colorop, old_colorop_state, new_colorop_state, i) {
-		struct drm_colorop_state *cstate = use_old ? old_colorop_state : new_colorop_state;
+	pipeline = plane_state ? plane_state->color_pipeline :
+				 plane->state->color_pipeline;
 
-		if (cstate->colorop->plane != plane)
-			continue;
+	if (!pipeline)
+		return false;
+
+	drm_for_each_colorop_in_pipeline(colorop, pipeline) {
+		cstate = use_old ?
+			 drm_atomic_get_old_colorop_state(state, colorop) :
+			 drm_atomic_get_new_colorop_state(state, colorop);
+
+		if (!cstate)
+			cstate = colorop->state;
 		if (!cstate->bypass)
 			return true;
 	}
+
 	return false;
 }
 
-- 
2.53.0

[PATCH v3 4/7] drm/amd/display: truly bypass plane colorop 3x4 matrix and hdr mult

[Melissa Wen]

Latent issue as the driver is currently just skipping programming 3x4
matrix and hdr multiplier blocks on bypass. Reset to default values if
the bypass property is set true.

Signed-off-by: Melissa Wen <mwen@igalia.com>
---
 .../amd/display/amdgpu_dm/amdgpu_dm_color.c    | 18 ++++++++++++++----
 1 file changed, 14 insertions(+), 4 deletions(-)

diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_color.c b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_color.c
index fa6883ae4dfb..84ff136183ee 100644
--- a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_color.c
+++ b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_color.c
@@ -1542,7 +1542,13 @@ __set_dm_plane_colorop_3x4_matrix(struct drm_plane_state *plane_state,
 		}
 	}
 
-	if (colorop_state && !colorop_state->bypass && colorop->type == DRM_COLOROP_CTM_3X4) {
+	if (colorop_state && colorop->type == DRM_COLOROP_CTM_3X4) {
+		if (colorop_state->bypass) {
+			dc_plane_state->gamut_remap_matrix.enable_remap = false;
+			dc_plane_state->input_csc_color_matrix.enable_adjustment = false;
+			return 0;
+		}
+
 		drm_dbg(dev, "3x4 matrix colorop with ID: %d\n", colorop->base.id);
 		blob = colorop_state->data;
 		if (blob->length == sizeof(struct drm_color_ctm_3x4)) {
@@ -1581,9 +1587,13 @@ __set_dm_plane_colorop_multiplier(struct drm_plane_state *plane_state,
 		}
 	}
 
-	if (colorop_state && !colorop_state->bypass && colorop->type == DRM_COLOROP_MULTIPLIER) {
-		drm_dbg(dev, "Multiplier colorop with ID: %d\n", colorop->base.id);
-		dc_plane_state->hdr_mult = amdgpu_dm_fixpt_from_s3132(colorop_state->multiplier);
+	if (colorop_state && colorop->type == DRM_COLOROP_MULTIPLIER) {
+		if (colorop_state->bypass) {
+			dc_plane_state->hdr_mult = dc_fixpt_one;
+		} else {
+			drm_dbg(dev, "Multiplier colorop with ID: %d\n", colorop->base.id);
+			dc_plane_state->hdr_mult = amdgpu_dm_fixpt_from_s3132(colorop_state->multiplier);
+		}
 	}
 
 	return 0;
-- 
2.53.0

Re: [PATCH v3 4/7] drm/amd/display: truly bypass plane colorop 3x4 matrix and hdr mult

[sashiko-bot]

Thank you for your contribution! Sashiko AI review found 1 potential issue(s) to consider:

Pre-existing issues:
- [High] Dereference of `blob->length` when `blob` is NULL in `__set_dm_plane_colorop_3x4_matrix`.
--

commit e38d376afd75d8310bd23096e9f3d253c0d99c70
Author: Melissa Wen <mwen@igalia.com>

drm/amd/display: truly bypass plane colorop 3x4 matrix and hdr mult

This commit addresses a latent issue where the driver skips programming the
3x4 matrix and hdr multiplier blocks on bypass. It updates the driver to
explicitly reset these blocks to their default values if the bypass
property is set.

> diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_color.c b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_color.c
> index 86086d10c5435..13ad7ac1e35e4 100644
> --- a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_color.c
> +++ b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_color.c
> @@ -1579,7 +1579,13 @@ __set_dm_plane_colorop_3x4_matrix(struct drm_plane_state *plane_state,
>  		}
>  	}
>  
> -	if (colorop_state && !colorop_state->bypass && colorop->type == DRM_COLOROP_CTM_3X4) {
> +	if (colorop_state && colorop->type == DRM_COLOROP_CTM_3X4) {
> +		if (colorop_state->bypass) {
> +			dc_plane_state->gamut_remap_matrix.enable_remap = false;
> +			dc_plane_state->input_csc_color_matrix.enable_adjustment = false;
> +			return 0;
> +		}
> +
>  		drm_dbg(dev, "3x4 matrix colorop with ID: %d\n", colorop->base.id);
>  		blob = colorop_state->data;
>  		if (blob->length == sizeof(struct drm_color_ctm_3x4)) {

[Severity: High]
This isn't a bug introduced by this patch, but can blob be NULL here when
colorop_state->bypass is false?

Looking at __set_dm_plane_colorop_3x4_matrix(), the DRM API allows userspace
to unset the data property (for instance, by passing 0 for the blob ID).
This would result in colorop_state->data being NULL. 

If userspace sets bypass to false while providing no data blob, would the
unconditional dereference of blob->length lead to a NULL pointer dereference
and a kernel crash?

-- 
Sashiko AI review · https://sashiko.dev/#/patchset/20260609121230.1358786-1-mwen@igalia.com?part=4

[PATCH v3 5/7] drm/amd/display: make shaper bypass mode cleaner

[Melissa Wen]

Start shaper tranfer function setup in bypass mode, i.e. tf->type ==
TF_TYPE_BYPASS and let the helper checks set it to a different mode
according to userspace request.

Signed-off-by: Melissa Wen <mwen@igalia.com>
---
 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_color.c | 8 ++------
 1 file changed, 2 insertions(+), 6 deletions(-)

diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_color.c b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_color.c
index 84ff136183ee..2f51009b2978 100644
--- a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_color.c
+++ b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_color.c
@@ -1611,10 +1611,11 @@ __set_dm_plane_colorop_shaper(struct drm_plane_state *plane_state,
 	struct dc_transfer_func *tf = &dc_plane_state->in_shaper_func;
 	const struct drm_color_lut32 *shaper_lut;
 	struct drm_device *dev = colorop->dev;
-	bool enabled = false;
 	u32 shaper_size;
 	int i = 0, ret = 0;
 
+	tf->type = TF_TYPE_BYPASS;
+
 	/* 1D Curve - SHAPER TF */
 	old_colorop = colorop;
 	for_each_new_colorop_in_state(state, colorop, new_colorop_state, i) {
@@ -1633,7 +1634,6 @@ __set_dm_plane_colorop_shaper(struct drm_plane_state *plane_state,
 		ret = __set_output_tf(tf, 0, 0, false);
 		if (ret)
 			return ret;
-		enabled = true;
 	}
 
 	/* 1D LUT - SHAPER LUT */
@@ -1665,13 +1665,9 @@ __set_dm_plane_colorop_shaper(struct drm_plane_state *plane_state,
 			ret = __set_output_tf_32(tf, shaper_lut, shaper_size, false);
 			if (ret)
 				return ret;
-			enabled = true;
 		}
 	}
 
-	if (!enabled)
-		tf->type = TF_TYPE_BYPASS;
-
 	return 0;
 }
 
-- 
2.53.0

Re: [PATCH v3 5/7] drm/amd/display: make shaper bypass mode cleaner

[sashiko-bot]

Thank you for your contribution! Sashiko AI review found 2 potential issue(s) to consider:

New issues:
- [High] Removing the `enabled` fallback leaves the shaper transfer function in a corrupted state if an invalid 1D LUT size is provided.

Pre-existing issues:
- [High] Atomic check silently ignores invalid colorop LUT sizes and allocation failures in the blend transfer function.
--

commit 7d44b36a8843f15370d407ecab07d171e3f7d506
Author: Melissa Wen <mwen@igalia.com>

drm/amd/display: make shaper bypass mode cleaner

Start shaper tranfer function setup in bypass mode, i.e. tf->type ==
TF_TYPE_BYPASS and let the helper checks set it to a different mode
according to userspace request.

> diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_color.c b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_color.c
> index 13ad7ac1e35e4..4651241433296 100644
> --- a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_color.c
> +++ b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_color.c
> @@ -1648,10 +1648,11 @@ __set_dm_plane_colorop_shaper(struct drm_plane_state *plane_state,
>  	struct dc_transfer_func *tf = &dc_plane_state->in_shaper_func;
>  	const struct drm_color_lut32 *shaper_lut;
>  	struct drm_device *dev = colorop->dev;
> -	bool enabled = false;
>  	u32 shaper_size;
>  	int i = 0, ret = 0;
>  
> +	tf->type = TF_TYPE_BYPASS;
> +
>  	/* 1D Curve - SHAPER TF */
>  	old_colorop = colorop;
>  	for_each_new_colorop_in_state(state, colorop, new_colorop_state, i) {

[ ... ]

> @@ -1702,13 +1702,9 @@ __set_dm_plane_colorop_shaper(struct drm_plane_state *plane_state,
>  			ret = __set_output_tf_32(tf, shaper_lut, shaper_size, false);
>  			if (ret)
>  				return ret;
> -			enabled = true;
>  		}
>  	}
>  
> -	if (!enabled)
> -		tf->type = TF_TYPE_BYPASS;
> -
>  	return 0;
>  }

[Severity: High]
Does removing the enabled fallback leave the shaper transfer function in a
corrupted state if an invalid 1D LUT size is provided?

If userspace sets bypass = false but provides an invalid LUT size or unsets
the data blob (size = 0), the check for shaper_size == colorop->size fails
and __set_output_tf_32() is skipped in __set_dm_plane_colorop_shaper().

Since tf->type was already set to TF_TYPE_DISTRIBUTED_POINTS earlier in the
function, and we no longer fall back to TF_TYPE_BYPASS when enabled is false,
the function returns 0. Could this cause the atomic commit to succeed while
programming the hardware with an uninitialized transfer function?

[Severity: High]
This is a pre-existing issue, but a similar problem exists in
__set_dm_plane_colorop_blend().

Does the atomic check silently ignore invalid colorop LUT sizes and allocation
failures in the blend transfer function?

drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_color.c:__set_dm_plane_colorop_blend() {
	...
		/* Custom LUT size must be the same as supported size */
		if (blend_size == colorop->size)
			__set_input_tf_32(NULL, tf, blend_lut, blend_size);
	}

	return 0;
}

If the size check fails, __set_input_tf_32() is skipped entirely, but the
function returns 0. Also, the return value of __set_input_tf_32() is ignored,
meaning allocation failures are not propagated. Could this allow the hardware
to be programmed with an uninitialized or partially initialized transfer
function?

-- 
Sashiko AI review · https://sashiko.dev/#/patchset/20260609121230.1358786-1-mwen@igalia.com?part=5

[PATCH v3 6/7] drm/amd/display: fix bnld colorop bypass mode

[Melissa Wen]

If userspace set blnd colorop to bypass, AMD driver just skips blnd
transfer function configuration. Currently, this is not an issue since
dc plane state is a reset/default state, but it's not fully correct and
doesn't mirror shaper tf helper. Make bypass mode setup clear by
initially set tf->type as BYPASS and let the helper change its type
according to userspace requests.

Fixes: 52da8325996b ("drm/amd/display: Add support for sRGB EOTF in BLND block")
Signed-off-by: Melissa Wen <mwen@igalia.com>
---
 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_color.c | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_color.c b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_color.c
index 2f51009b2978..2dc3951c8e39 100644
--- a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_color.c
+++ b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_color.c
@@ -1773,6 +1773,8 @@ __set_dm_plane_colorop_blend(struct drm_plane_state *plane_state,
 	uint32_t blend_size = 0;
 	int i = 0;
 
+	tf->type = TF_TYPE_BYPASS;
+
 	/* 1D Curve - BLND TF */
 	old_colorop = colorop;
 	for_each_new_colorop_in_state(state, colorop, new_colorop_state, i) {
-- 
2.53.0

Re: [PATCH v3 6/7] drm/amd/display: fix bnld colorop bypass mode

[sashiko-bot]

Thank you for your contribution! Sashiko AI review found 3 potential issue(s) to consider:

Pre-existing issues:
- [High] Silent failure and invalid hardware state when an active 1D LUT has an invalid data blob size.
- [High] The return value of `__set_input_tf_32()` is ignored, masking potential memory allocation failures.
- [Medium] The validation logic for the 1D LUT colorop incorrectly checks the `curve_1d_type` property, which is unused and logically invalid for LUTs.
--

commit 43bb295360cf4259492eaea0a93a4e70f5f5599c
Author: Melissa Wen <mwen@igalia.com>
Subject: drm/amd/display: fix bnld colorop bypass mode

If userspace set blnd colorop to bypass, AMD driver skips blnd transfer
function configuration. This patch clarifies the bypass mode setup by initially
setting the tf type to bypass.

Fixes: 52da8325996b ("drm/amd/display: Add support for sRGB EOTF in BLND block")

> diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_color.c b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_color.c
> index 4651241433296..2d91d88a45742 100644
> --- a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_color.c
> +++ b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_color.c
> @@ -1811,6 +1811,8 @@ __set_dm_plane_colorop_blend(struct drm_plane_state *plane_state,
>  	uint32_t blend_size = 0;
>  	int i = 0;
>  
> +	tf->type = TF_TYPE_BYPASS;
> +
>  	/* 1D Curve - BLND TF */

[ ... ]

> 	if (!colorop_state->bypass && colorop->type == DRM_COLOROP_1D_CURVE &&
> 	    (BIT(colorop_state->curve_1d_type) & amdgpu_dm_supported_blnd_tfs)) {
> 		drm_dbg(dev, "Blend TF colorop with ID: %d\n", colorop->base.id);
> 		tf->type = TF_TYPE_DISTRIBUTED_POINTS;
> 		tf->tf = default_tf = amdgpu_colorop_tf_to_dc_tf(colorop_state->curve_1d_type);
> 		tf->sdr_ref_white_level = SDR_WHITE_LEVEL_INIT_VALUE;
> 		__set_input_tf_32(NULL, tf, blend_lut, blend_size);

[Severity: High]
This is a pre-existing issue, but does this mask potential memory allocation
failures?

The return value of __set_input_tf_32() is ignored here, so if it returns an
error, the atomic commit proceeds with incompletely programmed hardware state.

> 	}
> 
> 	/* 1D Curve - BLND LUT */

[ ... ]

> 	if (!colorop_state->bypass && colorop->type == DRM_COLOROP_1D_LUT &&
> 	    (BIT(colorop_state->curve_1d_type) & amdgpu_dm_supported_blnd_tfs)) {

[Severity: Medium]
This isn't a bug introduced by this patch, but does this improperly validate
the 1D LUT state?

The validation logic incorrectly checks the curve_1d_type property, which is
unused and logically invalid for LUTs. The condition passes by coincidence
because 0 corresponds to DRM_COLOROP_1D_CURVE_SRGB_EOTF, which happens to be
supported by the BLND block.

> 		drm_dbg(dev, "Blend LUT colorop with ID: %d\n", colorop->base.id);
> 		tf->type = TF_TYPE_DISTRIBUTED_POINTS;
> 		tf->tf = default_tf;
> 		tf->sdr_ref_white_level = SDR_WHITE_LEVEL_INIT_VALUE;
> 		blend_lut = __extract_blob_lut32(colorop_state->data, &blend_size);
> 		blend_size = blend_lut != NULL ? blend_size : 0;
> 
> 		/* Custom LUT size must be the same as supported size */
> 		if (blend_size == colorop->size)
> 			__set_input_tf_32(NULL, tf, blend_lut, blend_size);

[Severity: High]
This is a pre-existing issue, but could this lead to an invalid hardware
state if the sizes do not match?

If a 1D LUT colorop is active but the user provides an improperly sized or
missing data blob, the setup function __set_input_tf_32() is skipped.

However, tf->type is already set to TF_TYPE_DISTRIBUTED_POINTS and the
function returns success (0) instead of an error. This leaves the transfer
function logically active but with uninitialized point data. A similar issue
appears to exist in __set_dm_plane_colorop_shaper() as well.

> 	}
> 
> 	return 0;
> }

-- 
Sashiko AI review · https://sashiko.dev/#/patchset/20260609121230.1358786-1-mwen@igalia.com?part=6

[PATCH v3 7/7] drm/amd/display: allow individual colorop changes

[Melissa Wen]

Every AMD colorop helper requires new colorop state to update a single
active colorop, i.e. if the userspace modifies a single property of a
colorop, but doesn't resubmit the whole color pipeline, the driver
rejects the atomic commit, instead of just restore colorop settings from
committed state. Change all colorop helpers to get the committed state
if there's no new state for a given colorop. It keeps walking in the
active color pipeline and update a color block if the related colorop
changed.

Signed-off-by: Melissa Wen <mwen@igalia.com>
---
 .../amd/display/amdgpu_dm/amdgpu_dm_color.c   | 182 +++++++-----------
 1 file changed, 65 insertions(+), 117 deletions(-)

diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_color.c b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_color.c
index 2dc3951c8e39..08cbe3b862d4 100644
--- a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_color.c
+++ b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_color.c
@@ -1497,24 +1497,13 @@ __set_dm_plane_colorop_degamma(struct drm_plane_state *plane_state,
 			       struct dc_plane_state *dc_plane_state,
 			       struct drm_colorop *colorop)
 {
-	struct drm_colorop *old_colorop;
-	struct drm_colorop_state *colorop_state = NULL, *new_colorop_state;
+	struct drm_colorop_state *colorop_state;
 	struct drm_atomic_commit *state = plane_state->state;
-	int i = 0;
-
-	old_colorop = colorop;
 
 	/* 1st op: 1d curve - degamma */
-	for_each_new_colorop_in_state(state, colorop, new_colorop_state, i) {
-		if (new_colorop_state->colorop == old_colorop &&
-		    (BIT(new_colorop_state->curve_1d_type) & amdgpu_dm_supported_degam_tfs)) {
-			colorop_state = new_colorop_state;
-			break;
-		}
-	}
-
+	colorop_state = drm_atomic_get_new_colorop_state(state, colorop);
 	if (!colorop_state)
-		return -EINVAL;
+		colorop_state = colorop->state;
 
 	return __set_colorop_in_tf_1d_curve(dc_plane_state, colorop_state);
 }
@@ -1524,43 +1513,37 @@ __set_dm_plane_colorop_3x4_matrix(struct drm_plane_state *plane_state,
 				  struct dc_plane_state *dc_plane_state,
 				  struct drm_colorop *colorop)
 {
-	struct drm_colorop *old_colorop;
-	struct drm_colorop_state *colorop_state = NULL, *new_colorop_state;
+	struct drm_colorop_state *colorop_state;
 	struct drm_atomic_commit *state = plane_state->state;
 	const struct drm_device *dev = colorop->dev;
 	const struct drm_property_blob *blob;
 	struct drm_color_ctm_3x4 *ctm = NULL;
-	int i = 0;
 
 	/* 3x4 matrix */
-	old_colorop = colorop;
-	for_each_new_colorop_in_state(state, colorop, new_colorop_state, i) {
-		if (new_colorop_state->colorop == old_colorop &&
-		    new_colorop_state->colorop->type == DRM_COLOROP_CTM_3X4) {
-			colorop_state = new_colorop_state;
-			break;
-		}
+	colorop_state = drm_atomic_get_new_colorop_state(state, colorop);
+	if (!colorop_state)
+		colorop_state = colorop->state;
+
+	if (colorop_state->colorop->type != DRM_COLOROP_CTM_3X4)
+		return -EINVAL;
+
+	if (colorop_state->bypass) {
+		dc_plane_state->gamut_remap_matrix.enable_remap = false;
+		dc_plane_state->input_csc_color_matrix.enable_adjustment = false;
+		return 0;
 	}
 
-	if (colorop_state && colorop->type == DRM_COLOROP_CTM_3X4) {
-		if (colorop_state->bypass) {
-			dc_plane_state->gamut_remap_matrix.enable_remap = false;
-			dc_plane_state->input_csc_color_matrix.enable_adjustment = false;
-			return 0;
-		}
-
-		drm_dbg(dev, "3x4 matrix colorop with ID: %d\n", colorop->base.id);
-		blob = colorop_state->data;
-		if (blob->length == sizeof(struct drm_color_ctm_3x4)) {
-			ctm = (struct drm_color_ctm_3x4 *) blob->data;
-			__drm_ctm_3x4_to_dc_matrix(ctm, dc_plane_state->gamut_remap_matrix.matrix);
-			dc_plane_state->gamut_remap_matrix.enable_remap = true;
-			dc_plane_state->input_csc_color_matrix.enable_adjustment = false;
-		} else {
-			drm_warn(dev, "blob->length (%zu) isn't equal to drm_color_ctm_3x4 (%zu)\n",
-				 blob->length, sizeof(struct drm_color_ctm_3x4));
-			return -EINVAL;
-		}
+	drm_dbg(dev, "3x4 matrix colorop with ID: %d\n", colorop->base.id);
+	blob = colorop_state->data;
+	if (blob->length == sizeof(struct drm_color_ctm_3x4)) {
+		ctm = (struct drm_color_ctm_3x4 *) blob->data;
+		__drm_ctm_3x4_to_dc_matrix(ctm, dc_plane_state->gamut_remap_matrix.matrix);
+		dc_plane_state->gamut_remap_matrix.enable_remap = true;
+		dc_plane_state->input_csc_color_matrix.enable_adjustment = false;
+	} else {
+		drm_warn(dev, "blob->length (%zu) isn't equal to drm_color_ctm_3x4 (%zu)\n",
+			 blob->length, sizeof(struct drm_color_ctm_3x4));
+		return -EINVAL;
 	}
 
 	return 0;
@@ -1571,29 +1554,23 @@ __set_dm_plane_colorop_multiplier(struct drm_plane_state *plane_state,
 				  struct dc_plane_state *dc_plane_state,
 				  struct drm_colorop *colorop)
 {
-	struct drm_colorop *old_colorop;
-	struct drm_colorop_state *colorop_state = NULL, *new_colorop_state;
+	struct drm_colorop_state *colorop_state;
 	struct drm_atomic_commit *state = plane_state->state;
 	const struct drm_device *dev = colorop->dev;
-	int i = 0;
 
 	/* Multiplier */
-	old_colorop = colorop;
-	for_each_new_colorop_in_state(state, colorop, new_colorop_state, i) {
-		if (new_colorop_state->colorop == old_colorop &&
-		    new_colorop_state->colorop->type == DRM_COLOROP_MULTIPLIER) {
-			colorop_state = new_colorop_state;
-			break;
-		}
-	}
+	colorop_state = drm_atomic_get_new_colorop_state(state, colorop);
+	if (!colorop_state)
+		colorop_state = colorop->state;
 
-	if (colorop_state && colorop->type == DRM_COLOROP_MULTIPLIER) {
-		if (colorop_state->bypass) {
-			dc_plane_state->hdr_mult = dc_fixpt_one;
-		} else {
-			drm_dbg(dev, "Multiplier colorop with ID: %d\n", colorop->base.id);
-			dc_plane_state->hdr_mult = amdgpu_dm_fixpt_from_s3132(colorop_state->multiplier);
-		}
+	if (colorop_state->colorop->type != DRM_COLOROP_MULTIPLIER)
+		return -EINVAL;
+
+	if (colorop_state->bypass) {
+		dc_plane_state->hdr_mult = dc_fixpt_one;
+	} else {
+		drm_dbg(dev, "Multiplier colorop with ID: %d\n", colorop->base.id);
+		dc_plane_state->hdr_mult = amdgpu_dm_fixpt_from_s3132(colorop_state->multiplier);
 	}
 
 	return 0;
@@ -1604,29 +1581,23 @@ __set_dm_plane_colorop_shaper(struct drm_plane_state *plane_state,
 			      struct dc_plane_state *dc_plane_state,
 			      struct drm_colorop *colorop)
 {
-	struct drm_colorop *old_colorop;
-	struct drm_colorop_state *colorop_state = NULL, *new_colorop_state;
+	struct drm_colorop_state *colorop_state;
 	struct drm_atomic_commit *state = plane_state->state;
 	enum dc_transfer_func_predefined default_tf = TRANSFER_FUNCTION_LINEAR;
 	struct dc_transfer_func *tf = &dc_plane_state->in_shaper_func;
 	const struct drm_color_lut32 *shaper_lut;
 	struct drm_device *dev = colorop->dev;
 	u32 shaper_size;
-	int i = 0, ret = 0;
+	int ret = 0;
 
 	tf->type = TF_TYPE_BYPASS;
 
 	/* 1D Curve - SHAPER TF */
-	old_colorop = colorop;
-	for_each_new_colorop_in_state(state, colorop, new_colorop_state, i) {
-		if (new_colorop_state->colorop == old_colorop &&
-		    (BIT(new_colorop_state->curve_1d_type) & amdgpu_dm_supported_shaper_tfs)) {
-			colorop_state = new_colorop_state;
-			break;
-		}
-	}
+	colorop_state = drm_atomic_get_new_colorop_state(state, colorop);
+	if (!colorop_state)
+		colorop_state = colorop->state;
 
-	if (colorop_state && !colorop_state->bypass && colorop->type == DRM_COLOROP_1D_CURVE) {
+	if (!colorop_state->bypass && colorop->type == DRM_COLOROP_1D_CURVE) {
 		drm_dbg(dev, "Shaper TF colorop with ID: %d\n", colorop->base.id);
 		tf->type = TF_TYPE_DISTRIBUTED_POINTS;
 		tf->tf = default_tf = amdgpu_colorop_tf_to_dc_tf(colorop_state->curve_1d_type);
@@ -1637,22 +1608,17 @@ __set_dm_plane_colorop_shaper(struct drm_plane_state *plane_state,
 	}
 
 	/* 1D LUT - SHAPER LUT */
-	colorop = old_colorop->next;
+	colorop = colorop->next;
 	if (!colorop) {
 		drm_dbg(dev, "no Shaper LUT colorop found\n");
 		return -EINVAL;
 	}
 
-	old_colorop = colorop;
-	for_each_new_colorop_in_state(state, colorop, new_colorop_state, i) {
-		if (new_colorop_state->colorop == old_colorop &&
-		    new_colorop_state->colorop->type == DRM_COLOROP_1D_LUT) {
-			colorop_state = new_colorop_state;
-			break;
-		}
-	}
+	colorop_state = drm_atomic_get_new_colorop_state(state, colorop);
+	if (!colorop_state)
+		colorop_state = colorop->state;
 
-	if (colorop_state && !colorop_state->bypass && colorop->type == DRM_COLOROP_1D_LUT) {
+	if (!colorop_state->bypass && colorop->type == DRM_COLOROP_1D_LUT) {
 		drm_dbg(dev, "Shaper LUT colorop with ID: %d\n", colorop->base.id);
 		tf->type = TF_TYPE_DISTRIBUTED_POINTS;
 		tf->tf = default_tf;
@@ -1707,8 +1673,7 @@ __set_dm_plane_colorop_3dlut(struct drm_plane_state *plane_state,
 			     struct dc_plane_state *dc_plane_state,
 			     struct drm_colorop *colorop)
 {
-	struct drm_colorop *old_colorop;
-	struct drm_colorop_state *colorop_state = NULL, *new_colorop_state;
+	struct drm_colorop_state *colorop_state;
 	struct dc_transfer_func *tf = &dc_plane_state->in_shaper_func;
 	struct drm_atomic_commit *state = plane_state->state;
 	const struct amdgpu_device *adev = drm_to_adev(colorop->dev);
@@ -1716,19 +1681,14 @@ __set_dm_plane_colorop_3dlut(struct drm_plane_state *plane_state,
 	const struct drm_device *dev = colorop->dev;
 	const struct drm_color_lut32 *lut3d;
 	uint32_t lut3d_size;
-	int i = 0, ret = 0;
+	int ret = 0;
 
 	/* 3D LUT */
-	old_colorop = colorop;
-	for_each_new_colorop_in_state(state, colorop, new_colorop_state, i) {
-		if (new_colorop_state->colorop == old_colorop &&
-		    new_colorop_state->colorop->type == DRM_COLOROP_3D_LUT) {
-			colorop_state = new_colorop_state;
-			break;
-		}
-	}
+	colorop_state = drm_atomic_get_new_colorop_state(state, colorop);
+	if (!colorop_state)
+		colorop_state = colorop->state;
 
-	if (colorop_state && !colorop_state->bypass && colorop->type == DRM_COLOROP_3D_LUT) {
+	if (!colorop_state->bypass && colorop->type == DRM_COLOROP_3D_LUT) {
 		if (!has_3dlut) {
 			drm_dbg(dev, "3D LUT is not supported by hardware\n");
 			return -EINVAL;
@@ -1763,29 +1723,22 @@ __set_dm_plane_colorop_blend(struct drm_plane_state *plane_state,
 			     struct dc_plane_state *dc_plane_state,
 			     struct drm_colorop *colorop)
 {
-	struct drm_colorop *old_colorop;
-	struct drm_colorop_state *colorop_state = NULL, *new_colorop_state;
+	struct drm_colorop_state *colorop_state;
 	struct drm_atomic_commit *state = plane_state->state;
 	enum dc_transfer_func_predefined default_tf = TRANSFER_FUNCTION_LINEAR;
 	struct dc_transfer_func *tf = &dc_plane_state->blend_tf;
 	const struct drm_color_lut32 *blend_lut = NULL;
 	struct drm_device *dev = colorop->dev;
 	uint32_t blend_size = 0;
-	int i = 0;
 
 	tf->type = TF_TYPE_BYPASS;
 
 	/* 1D Curve - BLND TF */
-	old_colorop = colorop;
-	for_each_new_colorop_in_state(state, colorop, new_colorop_state, i) {
-		if (new_colorop_state->colorop == old_colorop &&
-		    (BIT(new_colorop_state->curve_1d_type) & amdgpu_dm_supported_blnd_tfs)) {
-			colorop_state = new_colorop_state;
-			break;
-		}
-	}
+	colorop_state = drm_atomic_get_new_colorop_state(state, colorop);
+	if (!colorop_state)
+		colorop_state = colorop->state;
 
-	if (colorop_state && !colorop_state->bypass && colorop->type == DRM_COLOROP_1D_CURVE &&
+	if (!colorop_state->bypass && colorop->type == DRM_COLOROP_1D_CURVE &&
 	    (BIT(colorop_state->curve_1d_type) & amdgpu_dm_supported_blnd_tfs)) {
 		drm_dbg(dev, "Blend TF colorop with ID: %d\n", colorop->base.id);
 		tf->type = TF_TYPE_DISTRIBUTED_POINTS;
@@ -1795,22 +1748,17 @@ __set_dm_plane_colorop_blend(struct drm_plane_state *plane_state,
 	}
 
 	/* 1D Curve - BLND LUT */
-	colorop = old_colorop->next;
+	colorop = colorop->next;
 	if (!colorop) {
 		drm_dbg(dev, "no Blend LUT colorop found\n");
 		return -EINVAL;
 	}
 
-	old_colorop = colorop;
-	for_each_new_colorop_in_state(state, colorop, new_colorop_state, i) {
-		if (new_colorop_state->colorop == old_colorop &&
-		    new_colorop_state->colorop->type == DRM_COLOROP_1D_LUT) {
-			colorop_state = new_colorop_state;
-			break;
-		}
-	}
+	colorop_state = drm_atomic_get_new_colorop_state(state, colorop);
+	if (!colorop_state)
+		colorop_state = colorop->state;
 
-	if (colorop_state && !colorop_state->bypass && colorop->type == DRM_COLOROP_1D_LUT &&
+	if (!colorop_state->bypass && colorop->type == DRM_COLOROP_1D_LUT &&
 	    (BIT(colorop_state->curve_1d_type) & amdgpu_dm_supported_blnd_tfs)) {
 		drm_dbg(dev, "Blend LUT colorop with ID: %d\n", colorop->base.id);
 		tf->type = TF_TYPE_DISTRIBUTED_POINTS;
-- 
2.53.0

Re: [PATCH v3 7/7] drm/amd/display: allow individual colorop changes

[sashiko-bot]

Thank you for your contribution! Sashiko AI review found 1 potential issue(s) to consider:

Pre-existing issues:
- [Critical] Potential NULL pointer dereference when accessing `blob->length` in `__set_dm_plane_colorop_3x4_matrix` if the data blob is NULL.
--

commit f99935be74382989d52703e3315aeec4d0efd059
Author: Melissa Wen <mwen@igalia.com>

drm/amd/display: allow individual colorop changes

Change all colorop helpers to get the committed state if there's no new
state for a given colorop. This allows userspace to modify a single
property of a colorop without resubmitting the whole color pipeline by
falling back to colorop settings from the committed state.

> diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_color.c b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_color.c
> index 2d91d88a45742..51bd937153d41 100644
> --- a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_color.c
> +++ b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_color.c

[ ... ]

> @@ -1561,43 +1550,37 @@ __set_dm_plane_colorop_3x4_matrix(struct drm_plane_state *plane_state,

[ ... ]

> +	if (colorop_state->bypass) {
> +		dc_plane_state->gamut_remap_matrix.enable_remap = false;
> +		dc_plane_state->input_csc_color_matrix.enable_adjustment = false;
> +		return 0;
> +	}
> +
> +	drm_dbg(dev, "3x4 matrix colorop with ID: %d\n", colorop->base.id);
> +	blob = colorop_state->data;
> +	if (blob->length == sizeof(struct drm_color_ctm_3x4)) {

[Severity: Critical]
This is a pre-existing issue, but could this lead to a NULL pointer 
dereference if the data blob is missing?

If userspace configures a 3x4 matrix colorop with bypass set to false but
doesn't provide a valid data blob, the DRM core might leave colorop_state->data
as NULL. Dereferencing blob->length here without checking if blob is valid
would then crash the system. 

Should __set_dm_plane_colorop_3x4_matrix() explicitly check if blob is not NULL
before attempting to access its length?

> +		ctm = (struct drm_color_ctm_3x4 *) blob->data;
> +		__drm_ctm_3x4_to_dc_matrix(ctm, dc_plane_state->gamut_remap_matrix.matrix);
> +		dc_plane_state->gamut_remap_matrix.enable_remap = true;
> +		dc_plane_state->input_csc_color_matrix.enable_adjustment = false;
> +	} else {

-- 
Sashiko AI review · https://sashiko.dev/#/patchset/20260609121230.1358786-1-mwen@igalia.com?part=7

✗ CI.checkpatch: warning for don't allow changes to inactive colorops (rev3)

[Patchwork]

== Series Details ==

Series: don't allow changes to inactive colorops (rev3)
URL   : https://patchwork.freedesktop.org/series/167294/
State : warning

== Summary ==

+ KERNEL=/kernel
+ git clone https://gitlab.freedesktop.org/drm/maintainer-tools mt
Cloning into 'mt'...
warning: redirecting to https://gitlab.freedesktop.org/drm/maintainer-tools.git/
+ git -C mt rev-list -n1 origin/master
061140b9bc586ae7f40abc1249c97e1cc72d1b9d
+ cd /kernel
+ git config --global --add safe.directory /kernel
+ git log -n1
commit 9ab90121f1d56693cfe94d1a72bb2b6d5dfa5113
Author: Melissa Wen <mwen@igalia.com>
Date:   Tue Jun 9 13:51:41 2026 +0200

    drm/amd/display: allow individual colorop changes
    
    Every AMD colorop helper requires new colorop state to update a single
    active colorop, i.e. if the userspace modifies a single property of a
    colorop, but doesn't resubmit the whole color pipeline, the driver
    rejects the atomic commit, instead of just restore colorop settings from
    committed state. Change all colorop helpers to get the committed state
    if there's no new state for a given colorop. It keeps walking in the
    active color pipeline and update a color block if the related colorop
    changed.
    
    Signed-off-by: Melissa Wen <mwen@igalia.com>
+ /mt/dim checkpatch 1e8798282ef0590ad21ca33d80e225208d9c7864 drm-intel
032def906841 drm/atomic: only add states of active or transient active colorops
-:113: CHECK:MACRO_ARG_REUSE: Macro argument reuse 'colorop' - possible side-effects?
#113: FILE: include/drm/drm_colorop.h:462:
+#define drm_for_each_colorop_in_pipeline(colorop, pipeline) \
+	for ((colorop) = (pipeline); (colorop); (colorop) = (colorop)->next)

total: 0 errors, 0 warnings, 1 checks, 92 lines checked
cd01410327b0 drm/atomic: reject colorop update from inactive color pipeline
47a53753f936 drm/amd/display: don't check colorop status if its in an inactive pipeline
-:15: WARNING:BAD_REPORTED_BY_LINK: Reported-by: should be immediately followed by Closes: with a URL to the report
#15: 
Reported-by: Sashiko <sashiko-bot@kernel.org>
Fixes: d3a549f4df78 ("drm/amd/display: Use overlay cursor when color pipeline is active")

total: 0 errors, 1 warnings, 0 checks, 48 lines checked
71a1dd6e4b29 drm/amd/display: truly bypass plane colorop 3x4 matrix and hdr mult
-:44: WARNING:LONG_LINE: line length of 105 exceeds 100 columns
#44: FILE: drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_color.c:1632:
+			dc_plane_state->hdr_mult = amdgpu_dm_fixpt_from_s3132(colorop_state->multiplier);

total: 0 errors, 1 warnings, 0 checks, 30 lines checked
40cc0431a0ed drm/amd/display: make shaper bypass mode cleaner
-:6: WARNING:TYPO_SPELLING: 'tranfer' may be misspelled - perhaps 'transfer'?
#6: 
Start shaper tranfer function setup in bypass mode, i.e. tf->type ==
             ^^^^^^^

total: 0 errors, 1 warnings, 0 checks, 32 lines checked
53515f3958e8 drm/amd/display: fix bnld colorop bypass mode
9ab90121f1d5 drm/amd/display: allow individual colorop changes
-:105: CHECK:SPACING: No space is necessary after a cast
#105: FILE: drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_color.c:1576:
+		ctm = (struct drm_color_ctm_3x4 *) blob->data;

total: 0 errors, 0 warnings, 1 checks, 290 lines checked

✓ CI.KUnit: success for don't allow changes to inactive colorops (rev3)

[Patchwork]

== Series Details ==

Series: don't allow changes to inactive colorops (rev3)
URL   : https://patchwork.freedesktop.org/series/167294/
State : success

== Summary ==

+ trap cleanup EXIT
+ /kernel/tools/testing/kunit/kunit.py run --kunitconfig /kernel/drivers/gpu/drm/xe/.kunitconfig
[12:50:14] Configuring KUnit Kernel ...
Generating .config ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
[12:50:18] Building KUnit Kernel ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
Building with:
$ make all compile_commands.json scripts_gdb ARCH=um O=.kunit --jobs=48
[12:50:49] Starting KUnit Kernel (1/1)...
[12:50:49] ============================================================
Running tests with:
$ .kunit/linux kunit.enable=1 mem=1G console=tty kunit_shutdown=halt
[12:50:49] ================== guc_buf (11 subtests) ===================
[12:50:49] [PASSED] test_smallest
[12:50:49] [PASSED] test_largest
[12:50:50] [PASSED] test_granular
[12:50:50] [PASSED] test_unique
[12:50:50] [PASSED] test_overlap
[12:50:50] [PASSED] test_reusable
[12:50:50] [PASSED] test_too_big
[12:50:50] [PASSED] test_flush
[12:50:50] [PASSED] test_lookup
[12:50:50] [PASSED] test_data
[12:50:50] [PASSED] test_class
[12:50:50] ===================== [PASSED] guc_buf =====================
[12:50:50] =================== guc_dbm (7 subtests) ===================
[12:50:50] [PASSED] test_empty
[12:50:50] [PASSED] test_default
[12:50:50] ======================== test_size  ========================
[12:50:50] [PASSED] 4
[12:50:50] [PASSED] 8
[12:50:50] [PASSED] 32
[12:50:50] [PASSED] 256
[12:50:50] ==================== [PASSED] test_size ====================
[12:50:50] ======================= test_reuse  ========================
[12:50:50] [PASSED] 4
[12:50:50] [PASSED] 8
[12:50:50] [PASSED] 32
[12:50:50] [PASSED] 256
[12:50:50] =================== [PASSED] test_reuse ====================
[12:50:50] =================== test_range_overlap  ====================
[12:50:50] [PASSED] 4
[12:50:50] [PASSED] 8
[12:50:50] [PASSED] 32
[12:50:50] [PASSED] 256
[12:50:50] =============== [PASSED] test_range_overlap ================
[12:50:50] =================== test_range_compact  ====================
[12:50:50] [PASSED] 4
[12:50:50] [PASSED] 8
[12:50:50] [PASSED] 32
[12:50:50] [PASSED] 256
[12:50:50] =============== [PASSED] test_range_compact ================
[12:50:50] ==================== test_range_spare  =====================
[12:50:50] [PASSED] 4
[12:50:50] [PASSED] 8
[12:50:50] [PASSED] 32
[12:50:50] [PASSED] 256
[12:50:50] ================ [PASSED] test_range_spare =================
[12:50:50] ===================== [PASSED] guc_dbm =====================
[12:50:50] =================== guc_idm (6 subtests) ===================
[12:50:50] [PASSED] bad_init
[12:50:50] [PASSED] no_init
[12:50:50] [PASSED] init_fini
[12:50:50] [PASSED] check_used
[12:50:50] [PASSED] check_quota
[12:50:50] [PASSED] check_all
[12:50:50] ===================== [PASSED] guc_idm =====================
[12:50:50] ================== no_relay (3 subtests) ===================
[12:50:50] [PASSED] xe_drops_guc2pf_if_not_ready
[12:50:50] [PASSED] xe_drops_guc2vf_if_not_ready
[12:50:50] [PASSED] xe_rejects_send_if_not_ready
[12:50:50] ==================== [PASSED] no_relay =====================
[12:50:50] ================== pf_relay (14 subtests) ==================
[12:50:50] [PASSED] pf_rejects_guc2pf_too_short
[12:50:50] [PASSED] pf_rejects_guc2pf_too_long
[12:50:50] [PASSED] pf_rejects_guc2pf_no_payload
[12:50:50] [PASSED] pf_fails_no_payload
[12:50:50] [PASSED] pf_fails_bad_origin
[12:50:50] [PASSED] pf_fails_bad_type
[12:50:50] [PASSED] pf_txn_reports_error
[12:50:50] [PASSED] pf_txn_sends_pf2guc
[12:50:50] [PASSED] pf_sends_pf2guc
[12:50:50] [SKIPPED] pf_loopback_nop
[12:50:50] [SKIPPED] pf_loopback_echo
[12:50:50] [SKIPPED] pf_loopback_fail
[12:50:50] [SKIPPED] pf_loopback_busy
[12:50:50] [SKIPPED] pf_loopback_retry
[12:50:50] ==================== [PASSED] pf_relay =====================
[12:50:50] ================== vf_relay (3 subtests) ===================
[12:50:50] [PASSED] vf_rejects_guc2vf_too_short
[12:50:50] [PASSED] vf_rejects_guc2vf_too_long
[12:50:50] [PASSED] vf_rejects_guc2vf_no_payload
[12:50:50] ==================== [PASSED] vf_relay =====================
[12:50:50] ================ pf_gt_config (9 subtests) =================
[12:50:50] [PASSED] fair_contexts_1vf
[12:50:50] [PASSED] fair_doorbells_1vf
[12:50:50] [PASSED] fair_ggtt_1vf
[12:50:50] ====================== fair_vram_1vf  ======================
[12:50:50] [PASSED] 3.50 GiB
[12:50:50] [PASSED] 11.5 GiB
[12:50:50] [PASSED] 15.5 GiB
[12:50:50] [PASSED] 31.5 GiB
[12:50:50] [PASSED] 63.5 GiB
[12:50:50] [PASSED] 1.91 GiB
[12:50:50] ================== [PASSED] fair_vram_1vf ==================
[12:50:50] ================ fair_vram_1vf_admin_only  =================
[12:50:50] [PASSED] 3.50 GiB
[12:50:50] [PASSED] 11.5 GiB
[12:50:50] [PASSED] 15.5 GiB
[12:50:50] [PASSED] 31.5 GiB
[12:50:50] [PASSED] 63.5 GiB
[12:50:50] [PASSED] 1.91 GiB
[12:50:50] ============ [PASSED] fair_vram_1vf_admin_only =============
[12:50:50] ====================== fair_contexts  ======================
[12:50:50] [PASSED] 1 VF
[12:50:50] [PASSED] 2 VFs
[12:50:50] [PASSED] 3 VFs
[12:50:50] [PASSED] 4 VFs
[12:50:50] [PASSED] 5 VFs
[12:50:50] [PASSED] 6 VFs
[12:50:50] [PASSED] 7 VFs
[12:50:50] [PASSED] 8 VFs
[12:50:50] [PASSED] 9 VFs
[12:50:50] [PASSED] 10 VFs
[12:50:50] [PASSED] 11 VFs
[12:50:50] [PASSED] 12 VFs
[12:50:50] [PASSED] 13 VFs
[12:50:50] [PASSED] 14 VFs
[12:50:50] [PASSED] 15 VFs
[12:50:50] [PASSED] 16 VFs
[12:50:50] [PASSED] 17 VFs
[12:50:50] [PASSED] 18 VFs
[12:50:50] [PASSED] 19 VFs
[12:50:50] [PASSED] 20 VFs
[12:50:50] [PASSED] 21 VFs
[12:50:50] [PASSED] 22 VFs
[12:50:50] [PASSED] 23 VFs
[12:50:50] [PASSED] 24 VFs
[12:50:50] [PASSED] 25 VFs
[12:50:50] [PASSED] 26 VFs
[12:50:50] [PASSED] 27 VFs
[12:50:50] [PASSED] 28 VFs
[12:50:50] [PASSED] 29 VFs
[12:50:50] [PASSED] 30 VFs
[12:50:50] [PASSED] 31 VFs
[12:50:50] [PASSED] 32 VFs
[12:50:50] [PASSED] 33 VFs
[12:50:50] [PASSED] 34 VFs
[12:50:50] [PASSED] 35 VFs
[12:50:50] [PASSED] 36 VFs
[12:50:50] [PASSED] 37 VFs
[12:50:50] [PASSED] 38 VFs
[12:50:50] [PASSED] 39 VFs
[12:50:50] [PASSED] 40 VFs
[12:50:50] [PASSED] 41 VFs
[12:50:50] [PASSED] 42 VFs
[12:50:50] [PASSED] 43 VFs
[12:50:50] [PASSED] 44 VFs
[12:50:50] [PASSED] 45 VFs
[12:50:50] [PASSED] 46 VFs
[12:50:50] [PASSED] 47 VFs
[12:50:50] [PASSED] 48 VFs
[12:50:50] [PASSED] 49 VFs
[12:50:50] [PASSED] 50 VFs
[12:50:50] [PASSED] 51 VFs
[12:50:50] [PASSED] 52 VFs
[12:50:50] [PASSED] 53 VFs
[12:50:50] [PASSED] 54 VFs
[12:50:50] [PASSED] 55 VFs
[12:50:50] [PASSED] 56 VFs
[12:50:50] [PASSED] 57 VFs
[12:50:50] [PASSED] 58 VFs
[12:50:50] [PASSED] 59 VFs
[12:50:50] [PASSED] 60 VFs
[12:50:50] [PASSED] 61 VFs
[12:50:50] [PASSED] 62 VFs
[12:50:50] [PASSED] 63 VFs
[12:50:50] ================== [PASSED] fair_contexts ==================
[12:50:50] ===================== fair_doorbells  ======================
[12:50:50] [PASSED] 1 VF
[12:50:50] [PASSED] 2 VFs
[12:50:50] [PASSED] 3 VFs
[12:50:50] [PASSED] 4 VFs
[12:50:50] [PASSED] 5 VFs
[12:50:50] [PASSED] 6 VFs
[12:50:50] [PASSED] 7 VFs
[12:50:50] [PASSED] 8 VFs
[12:50:50] [PASSED] 9 VFs
[12:50:50] [PASSED] 10 VFs
[12:50:50] [PASSED] 11 VFs
[12:50:50] [PASSED] 12 VFs
[12:50:50] [PASSED] 13 VFs
[12:50:50] [PASSED] 14 VFs
[12:50:50] [PASSED] 15 VFs
[12:50:50] [PASSED] 16 VFs
[12:50:50] [PASSED] 17 VFs
[12:50:50] [PASSED] 18 VFs
[12:50:50] [PASSED] 19 VFs
[12:50:50] [PASSED] 20 VFs
[12:50:50] [PASSED] 21 VFs
[12:50:50] [PASSED] 22 VFs
[12:50:50] [PASSED] 23 VFs
[12:50:50] [PASSED] 24 VFs
[12:50:50] [PASSED] 25 VFs
[12:50:50] [PASSED] 26 VFs
[12:50:50] [PASSED] 27 VFs
[12:50:50] [PASSED] 28 VFs
[12:50:50] [PASSED] 29 VFs
[12:50:50] [PASSED] 30 VFs
[12:50:50] [PASSED] 31 VFs
[12:50:50] [PASSED] 32 VFs
[12:50:50] [PASSED] 33 VFs
[12:50:50] [PASSED] 34 VFs
[12:50:50] [PASSED] 35 VFs
[12:50:50] [PASSED] 36 VFs
[12:50:50] [PASSED] 37 VFs
[12:50:50] [PASSED] 38 VFs
[12:50:50] [PASSED] 39 VFs
[12:50:50] [PASSED] 40 VFs
[12:50:50] [PASSED] 41 VFs
[12:50:50] [PASSED] 42 VFs
[12:50:50] [PASSED] 43 VFs
[12:50:50] [PASSED] 44 VFs
[12:50:50] [PASSED] 45 VFs
[12:50:50] [PASSED] 46 VFs
[12:50:50] [PASSED] 47 VFs
[12:50:50] [PASSED] 48 VFs
[12:50:50] [PASSED] 49 VFs
[12:50:50] [PASSED] 50 VFs
[12:50:50] [PASSED] 51 VFs
[12:50:50] [PASSED] 52 VFs
[12:50:50] [PASSED] 53 VFs
[12:50:50] [PASSED] 54 VFs
[12:50:50] [PASSED] 55 VFs
[12:50:50] [PASSED] 56 VFs
[12:50:50] [PASSED] 57 VFs
[12:50:50] [PASSED] 58 VFs
[12:50:50] [PASSED] 59 VFs
[12:50:50] [PASSED] 60 VFs
[12:50:50] [PASSED] 61 VFs
[12:50:50] [PASSED] 62 VFs
[12:50:50] [PASSED] 63 VFs
[12:50:50] ================= [PASSED] fair_doorbells ==================
[12:50:50] ======================== fair_ggtt  ========================
[12:50:50] [PASSED] 1 VF
[12:50:50] [PASSED] 2 VFs
[12:50:50] [PASSED] 3 VFs
[12:50:50] [PASSED] 4 VFs
[12:50:50] [PASSED] 5 VFs
[12:50:50] [PASSED] 6 VFs
[12:50:50] [PASSED] 7 VFs
[12:50:50] [PASSED] 8 VFs
[12:50:50] [PASSED] 9 VFs
[12:50:50] [PASSED] 10 VFs
[12:50:50] [PASSED] 11 VFs
[12:50:50] [PASSED] 12 VFs
[12:50:50] [PASSED] 13 VFs
[12:50:50] [PASSED] 14 VFs
[12:50:50] [PASSED] 15 VFs
[12:50:50] [PASSED] 16 VFs
[12:50:50] [PASSED] 17 VFs
[12:50:50] [PASSED] 18 VFs
[12:50:50] [PASSED] 19 VFs
[12:50:50] [PASSED] 20 VFs
[12:50:50] [PASSED] 21 VFs
[12:50:50] [PASSED] 22 VFs
[12:50:50] [PASSED] 23 VFs
[12:50:50] [PASSED] 24 VFs
[12:50:50] [PASSED] 25 VFs
[12:50:50] [PASSED] 26 VFs
[12:50:50] [PASSED] 27 VFs
[12:50:50] [PASSED] 28 VFs
[12:50:50] [PASSED] 29 VFs
[12:50:50] [PASSED] 30 VFs
[12:50:50] [PASSED] 31 VFs
[12:50:50] [PASSED] 32 VFs
[12:50:50] [PASSED] 33 VFs
[12:50:50] [PASSED] 34 VFs
[12:50:50] [PASSED] 35 VFs
[12:50:50] [PASSED] 36 VFs
[12:50:50] [PASSED] 37 VFs
[12:50:50] [PASSED] 38 VFs
[12:50:50] [PASSED] 39 VFs
[12:50:50] [PASSED] 40 VFs
[12:50:50] [PASSED] 41 VFs
[12:50:50] [PASSED] 42 VFs
[12:50:50] [PASSED] 43 VFs
[12:50:50] [PASSED] 44 VFs
[12:50:50] [PASSED] 45 VFs
[12:50:50] [PASSED] 46 VFs
[12:50:50] [PASSED] 47 VFs
[12:50:50] [PASSED] 48 VFs
[12:50:50] [PASSED] 49 VFs
[12:50:50] [PASSED] 50 VFs
[12:50:50] [PASSED] 51 VFs
[12:50:50] [PASSED] 52 VFs
[12:50:50] [PASSED] 53 VFs
[12:50:50] [PASSED] 54 VFs
[12:50:50] [PASSED] 55 VFs
[12:50:50] [PASSED] 56 VFs
[12:50:50] [PASSED] 57 VFs
[12:50:50] [PASSED] 58 VFs
[12:50:50] [PASSED] 59 VFs
[12:50:50] [PASSED] 60 VFs
[12:50:50] [PASSED] 61 VFs
[12:50:50] [PASSED] 62 VFs
[12:50:50] [PASSED] 63 VFs
[12:50:50] ==================== [PASSED] fair_ggtt ====================
[12:50:50] ======================== fair_vram  ========================
[12:50:50] [PASSED] 1 VF
[12:50:50] [PASSED] 2 VFs
[12:50:50] [PASSED] 3 VFs
[12:50:50] [PASSED] 4 VFs
[12:50:50] [PASSED] 5 VFs
[12:50:50] [PASSED] 6 VFs
[12:50:50] [PASSED] 7 VFs
[12:50:50] [PASSED] 8 VFs
[12:50:50] [PASSED] 9 VFs
[12:50:50] [PASSED] 10 VFs
[12:50:50] [PASSED] 11 VFs
[12:50:50] [PASSED] 12 VFs
[12:50:50] [PASSED] 13 VFs
[12:50:50] [PASSED] 14 VFs
[12:50:50] [PASSED] 15 VFs
[12:50:50] [PASSED] 16 VFs
[12:50:50] [PASSED] 17 VFs
[12:50:50] [PASSED] 18 VFs
[12:50:50] [PASSED] 19 VFs
[12:50:50] [PASSED] 20 VFs
[12:50:50] [PASSED] 21 VFs
[12:50:50] [PASSED] 22 VFs
[12:50:50] [PASSED] 23 VFs
[12:50:50] [PASSED] 24 VFs
[12:50:50] [PASSED] 25 VFs
[12:50:50] [PASSED] 26 VFs
[12:50:50] [PASSED] 27 VFs
[12:50:50] [PASSED] 28 VFs
[12:50:50] [PASSED] 29 VFs
[12:50:50] [PASSED] 30 VFs
[12:50:50] [PASSED] 31 VFs
[12:50:50] [PASSED] 32 VFs
[12:50:50] [PASSED] 33 VFs
[12:50:50] [PASSED] 34 VFs
[12:50:50] [PASSED] 35 VFs
[12:50:50] [PASSED] 36 VFs
[12:50:50] [PASSED] 37 VFs
[12:50:50] [PASSED] 38 VFs
[12:50:50] [PASSED] 39 VFs
[12:50:50] [PASSED] 40 VFs
[12:50:50] [PASSED] 41 VFs
[12:50:50] [PASSED] 42 VFs
[12:50:50] [PASSED] 43 VFs
[12:50:50] [PASSED] 44 VFs
[12:50:50] [PASSED] 45 VFs
[12:50:50] [PASSED] 46 VFs
[12:50:50] [PASSED] 47 VFs
[12:50:50] [PASSED] 48 VFs
[12:50:50] [PASSED] 49 VFs
[12:50:50] [PASSED] 50 VFs
[12:50:50] [PASSED] 51 VFs
[12:50:50] [PASSED] 52 VFs
[12:50:50] [PASSED] 53 VFs
[12:50:50] [PASSED] 54 VFs
[12:50:50] [PASSED] 55 VFs
[12:50:50] [PASSED] 56 VFs
[12:50:50] [PASSED] 57 VFs
[12:50:50] [PASSED] 58 VFs
[12:50:50] [PASSED] 59 VFs
[12:50:50] [PASSED] 60 VFs
[12:50:50] [PASSED] 61 VFs
[12:50:50] [PASSED] 62 VFs
[12:50:50] [PASSED] 63 VFs
[12:50:50] ==================== [PASSED] fair_vram ====================
[12:50:50] ================== [PASSED] pf_gt_config ===================
[12:50:50] ===================== lmtt (1 subtest) =====================
[12:50:50] ======================== test_ops  =========================
[12:50:50] [PASSED] 2-level
[12:50:50] [PASSED] multi-level
[12:50:50] ==================== [PASSED] test_ops =====================
[12:50:50] ====================== [PASSED] lmtt =======================
[12:50:50] ================= pf_service (11 subtests) =================
[12:50:50] [PASSED] pf_negotiate_any
[12:50:50] [PASSED] pf_negotiate_base_match
[12:50:50] [PASSED] pf_negotiate_base_newer
[12:50:50] [PASSED] pf_negotiate_base_next
[12:50:50] [SKIPPED] pf_negotiate_base_older
[12:50:50] [PASSED] pf_negotiate_base_prev
[12:50:50] [PASSED] pf_negotiate_latest_match
[12:50:50] [PASSED] pf_negotiate_latest_newer
[12:50:50] [PASSED] pf_negotiate_latest_next
[12:50:50] [SKIPPED] pf_negotiate_latest_older
[12:50:50] [SKIPPED] pf_negotiate_latest_prev
[12:50:50] =================== [PASSED] pf_service ====================
[12:50:50] ================= xe_guc_g2g (2 subtests) ==================
[12:50:50] ============== xe_live_guc_g2g_kunit_default  ==============
[12:50:50] ========= [SKIPPED] xe_live_guc_g2g_kunit_default ==========
[12:50:50] ============== xe_live_guc_g2g_kunit_allmem  ===============
[12:50:50] ========== [SKIPPED] xe_live_guc_g2g_kunit_allmem ==========
[12:50:50] =================== [SKIPPED] xe_guc_g2g ===================
[12:50:50] =================== xe_mocs (2 subtests) ===================
[12:50:50] ================ xe_live_mocs_kernel_kunit  ================
[12:50:50] =========== [SKIPPED] xe_live_mocs_kernel_kunit ============
[12:50:50] ================ xe_live_mocs_reset_kunit  =================
[12:50:50] ============ [SKIPPED] xe_live_mocs_reset_kunit ============
[12:50:50] ==================== [SKIPPED] xe_mocs =====================
[12:50:50] ================= xe_migrate (2 subtests) ==================
[12:50:50] ================= xe_migrate_sanity_kunit  =================
[12:50:50] ============ [SKIPPED] xe_migrate_sanity_kunit =============
[12:50:50] ================== xe_validate_ccs_kunit  ==================
[12:50:50] ============= [SKIPPED] xe_validate_ccs_kunit ==============
[12:50:50] =================== [SKIPPED] xe_migrate ===================
[12:50:50] ================== xe_dma_buf (1 subtest) ==================
[12:50:50] ==================== xe_dma_buf_kunit  =====================
[12:50:50] ================ [SKIPPED] xe_dma_buf_kunit ================
[12:50:50] =================== [SKIPPED] xe_dma_buf ===================
[12:50:50] ================= xe_bo_shrink (1 subtest) =================
[12:50:50] =================== xe_bo_shrink_kunit  ====================
[12:50:50] =============== [SKIPPED] xe_bo_shrink_kunit ===============
[12:50:50] ================== [SKIPPED] xe_bo_shrink ==================
[12:50:50] ==================== xe_bo (2 subtests) ====================
[12:50:50] ================== xe_ccs_migrate_kunit  ===================
[12:50:50] ============== [SKIPPED] xe_ccs_migrate_kunit ==============
[12:50:50] ==================== xe_bo_evict_kunit  ====================
[12:50:50] =============== [SKIPPED] xe_bo_evict_kunit ================
[12:50:50] ===================== [SKIPPED] xe_bo ======================
[12:50:50] ==================== args (13 subtests) ====================
[12:50:50] [PASSED] count_args_test
[12:50:50] [PASSED] call_args_example
[12:50:50] [PASSED] call_args_test
[12:50:50] [PASSED] drop_first_arg_example
[12:50:50] [PASSED] drop_first_arg_test
[12:50:50] [PASSED] first_arg_example
[12:50:50] [PASSED] first_arg_test
[12:50:50] [PASSED] last_arg_example
[12:50:50] [PASSED] last_arg_test
[12:50:50] [PASSED] pick_arg_example
[12:50:50] [PASSED] if_args_example
[12:50:50] [PASSED] if_args_test
[12:50:50] [PASSED] sep_comma_example
[12:50:50] ====================== [PASSED] args =======================
[12:50:50] =================== xe_pci (3 subtests) ====================
[12:50:50] ==================== check_graphics_ip  ====================
[12:50:50] [PASSED] 12.00 Xe_LP
[12:50:50] [PASSED] 12.10 Xe_LP+
[12:50:50] [PASSED] 12.55 Xe_HPG
[12:50:50] [PASSED] 12.60 Xe_HPC
[12:50:50] [PASSED] 12.70 Xe_LPG
[12:50:50] [PASSED] 12.71 Xe_LPG
[12:50:50] [PASSED] 12.74 Xe_LPG+
[12:50:50] [PASSED] 20.01 Xe2_HPG
[12:50:50] [PASSED] 20.02 Xe2_HPG
[12:50:50] [PASSED] 20.04 Xe2_LPG
[12:50:50] [PASSED] 30.00 Xe3_LPG
[12:50:50] [PASSED] 30.01 Xe3_LPG
[12:50:50] [PASSED] 30.03 Xe3_LPG
[12:50:50] [PASSED] 30.04 Xe3_LPG
[12:50:50] [PASSED] 30.05 Xe3_LPG
[12:50:50] [PASSED] 35.10 Xe3p_LPG
[12:50:50] [PASSED] 35.11 Xe3p_XPC
[12:50:50] ================ [PASSED] check_graphics_ip ================
[12:50:50] ===================== check_media_ip  ======================
[12:50:50] [PASSED] 12.00 Xe_M
[12:50:50] [PASSED] 12.55 Xe_HPM
[12:50:50] [PASSED] 13.00 Xe_LPM+
[12:50:50] [PASSED] 13.01 Xe2_HPM
[12:50:50] [PASSED] 20.00 Xe2_LPM
[12:50:50] [PASSED] 30.00 Xe3_LPM
[12:50:50] [PASSED] 30.02 Xe3_LPM
[12:50:50] [PASSED] 35.00 Xe3p_LPM
[12:50:50] [PASSED] 35.03 Xe3p_HPM
[12:50:50] ================= [PASSED] check_media_ip ==================
[12:50:50] =================== check_platform_desc  ===================
[12:50:50] [PASSED] 0x9A60 (TIGERLAKE)
[12:50:50] [PASSED] 0x9A68 (TIGERLAKE)
[12:50:50] [PASSED] 0x9A70 (TIGERLAKE)
[12:50:50] [PASSED] 0x9A40 (TIGERLAKE)
[12:50:50] [PASSED] 0x9A49 (TIGERLAKE)
[12:50:50] [PASSED] 0x9A59 (TIGERLAKE)
[12:50:50] [PASSED] 0x9A78 (TIGERLAKE)
[12:50:50] [PASSED] 0x9AC0 (TIGERLAKE)
[12:50:50] [PASSED] 0x9AC9 (TIGERLAKE)
[12:50:50] [PASSED] 0x9AD9 (TIGERLAKE)
[12:50:50] [PASSED] 0x9AF8 (TIGERLAKE)
[12:50:50] [PASSED] 0x4C80 (ROCKETLAKE)
[12:50:50] [PASSED] 0x4C8A (ROCKETLAKE)
[12:50:50] [PASSED] 0x4C8B (ROCKETLAKE)
[12:50:50] [PASSED] 0x4C8C (ROCKETLAKE)
[12:50:50] [PASSED] 0x4C90 (ROCKETLAKE)
[12:50:50] [PASSED] 0x4C9A (ROCKETLAKE)
[12:50:50] [PASSED] 0x4680 (ALDERLAKE_S)
[12:50:50] [PASSED] 0x4682 (ALDERLAKE_S)
[12:50:50] [PASSED] 0x4688 (ALDERLAKE_S)
[12:50:50] [PASSED] 0x468A (ALDERLAKE_S)
[12:50:50] [PASSED] 0x468B (ALDERLAKE_S)
[12:50:50] [PASSED] 0x4690 (ALDERLAKE_S)
[12:50:50] [PASSED] 0x4692 (ALDERLAKE_S)
[12:50:50] [PASSED] 0x4693 (ALDERLAKE_S)
[12:50:50] [PASSED] 0x46A0 (ALDERLAKE_P)
[12:50:50] [PASSED] 0x46A1 (ALDERLAKE_P)
[12:50:50] [PASSED] 0x46A2 (ALDERLAKE_P)
[12:50:50] [PASSED] 0x46A3 (ALDERLAKE_P)
[12:50:50] [PASSED] 0x46A6 (ALDERLAKE_P)
[12:50:50] [PASSED] 0x46A8 (ALDERLAKE_P)
[12:50:50] [PASSED] 0x46AA (ALDERLAKE_P)
[12:50:50] [PASSED] 0x462A (ALDERLAKE_P)
[12:50:50] [PASSED] 0x4626 (ALDERLAKE_P)
[12:50:50] [PASSED] 0x4628 (ALDERLAKE_P)
[12:50:50] [PASSED] 0x46B0 (ALDERLAKE_P)
[12:50:50] [PASSED] 0x46B1 (ALDERLAKE_P)
[12:50:50] [PASSED] 0x46B2 (ALDERLAKE_P)
[12:50:50] [PASSED] 0x46B3 (ALDERLAKE_P)
[12:50:50] [PASSED] 0x46C0 (ALDERLAKE_P)
[12:50:50] [PASSED] 0x46C1 (ALDERLAKE_P)
[12:50:50] [PASSED] 0x46C2 (ALDERLAKE_P)
[12:50:50] [PASSED] 0x46C3 (ALDERLAKE_P)
[12:50:50] [PASSED] 0x46D0 (ALDERLAKE_N)
[12:50:50] [PASSED] 0x46D1 (ALDERLAKE_N)
[12:50:50] [PASSED] 0x46D2 (ALDERLAKE_N)
[12:50:50] [PASSED] 0x46D3 (ALDERLAKE_N)
[12:50:50] [PASSED] 0x46D4 (ALDERLAKE_N)
[12:50:50] [PASSED] 0xA721 (ALDERLAKE_P)
[12:50:50] [PASSED] 0xA7A1 (ALDERLAKE_P)
[12:50:50] [PASSED] 0xA7A9 (ALDERLAKE_P)
[12:50:50] [PASSED] 0xA7AC (ALDERLAKE_P)
[12:50:50] [PASSED] 0xA7AD (ALDERLAKE_P)
[12:50:50] [PASSED] 0xA720 (ALDERLAKE_P)
[12:50:50] [PASSED] 0xA7A0 (ALDERLAKE_P)
[12:50:50] [PASSED] 0xA7A8 (ALDERLAKE_P)
[12:50:50] [PASSED] 0xA7AA (ALDERLAKE_P)
[12:50:50] [PASSED] 0xA7AB (ALDERLAKE_P)
[12:50:50] [PASSED] 0xA780 (ALDERLAKE_S)
[12:50:50] [PASSED] 0xA781 (ALDERLAKE_S)
[12:50:50] [PASSED] 0xA782 (ALDERLAKE_S)
[12:50:50] [PASSED] 0xA783 (ALDERLAKE_S)
[12:50:50] [PASSED] 0xA788 (ALDERLAKE_S)
[12:50:50] [PASSED] 0xA789 (ALDERLAKE_S)
[12:50:50] [PASSED] 0xA78A (ALDERLAKE_S)
[12:50:50] [PASSED] 0xA78B (ALDERLAKE_S)
[12:50:50] [PASSED] 0x4905 (DG1)
[12:50:50] [PASSED] 0x4906 (DG1)
[12:50:50] [PASSED] 0x4907 (DG1)
[12:50:50] [PASSED] 0x4908 (DG1)
[12:50:50] [PASSED] 0x4909 (DG1)
[12:50:50] [PASSED] 0x56C0 (DG2)
[12:50:50] [PASSED] 0x56C2 (DG2)
[12:50:50] [PASSED] 0x56C1 (DG2)
[12:50:50] [PASSED] 0x7D51 (METEORLAKE)
[12:50:50] [PASSED] 0x7DD1 (METEORLAKE)
[12:50:50] [PASSED] 0x7D41 (METEORLAKE)
[12:50:50] [PASSED] 0x7D67 (METEORLAKE)
[12:50:50] [PASSED] 0xB640 (METEORLAKE)
[12:50:50] [PASSED] 0x56A0 (DG2)
[12:50:50] [PASSED] 0x56A1 (DG2)
[12:50:50] [PASSED] 0x56A2 (DG2)
[12:50:50] [PASSED] 0x56BE (DG2)
[12:50:50] [PASSED] 0x56BF (DG2)
[12:50:50] [PASSED] 0x5690 (DG2)
[12:50:50] [PASSED] 0x5691 (DG2)
[12:50:50] [PASSED] 0x5692 (DG2)
[12:50:50] [PASSED] 0x56A5 (DG2)
[12:50:50] [PASSED] 0x56A6 (DG2)
[12:50:50] [PASSED] 0x56B0 (DG2)
[12:50:50] [PASSED] 0x56B1 (DG2)
[12:50:50] [PASSED] 0x56BA (DG2)
[12:50:50] [PASSED] 0x56BB (DG2)
[12:50:50] [PASSED] 0x56BC (DG2)
[12:50:50] [PASSED] 0x56BD (DG2)
[12:50:50] [PASSED] 0x5693 (DG2)
[12:50:50] [PASSED] 0x5694 (DG2)
[12:50:50] [PASSED] 0x5695 (DG2)
[12:50:50] [PASSED] 0x56A3 (DG2)
[12:50:50] [PASSED] 0x56A4 (DG2)
[12:50:50] [PASSED] 0x56B2 (DG2)
[12:50:50] [PASSED] 0x56B3 (DG2)
[12:50:50] [PASSED] 0x5696 (DG2)
[12:50:50] [PASSED] 0x5697 (DG2)
[12:50:50] [PASSED] 0xB69 (PVC)
[12:50:50] [PASSED] 0xB6E (PVC)
[12:50:50] [PASSED] 0xBD4 (PVC)
[12:50:50] [PASSED] 0xBD5 (PVC)
[12:50:50] [PASSED] 0xBD6 (PVC)
[12:50:50] [PASSED] 0xBD7 (PVC)
[12:50:50] [PASSED] 0xBD8 (PVC)
[12:50:50] [PASSED] 0xBD9 (PVC)
[12:50:50] [PASSED] 0xBDA (PVC)
[12:50:50] [PASSED] 0xBDB (PVC)
[12:50:50] [PASSED] 0xBE0 (PVC)
[12:50:50] [PASSED] 0xBE1 (PVC)
[12:50:50] [PASSED] 0xBE5 (PVC)
[12:50:50] [PASSED] 0x7D40 (METEORLAKE)
[12:50:50] [PASSED] 0x7D45 (METEORLAKE)
[12:50:50] [PASSED] 0x7D55 (METEORLAKE)
[12:50:50] [PASSED] 0x7D60 (METEORLAKE)
[12:50:50] [PASSED] 0x7DD5 (METEORLAKE)
[12:50:50] [PASSED] 0x6420 (LUNARLAKE)
[12:50:50] [PASSED] 0x64A0 (LUNARLAKE)
[12:50:50] [PASSED] 0x64B0 (LUNARLAKE)
[12:50:50] [PASSED] 0xE202 (BATTLEMAGE)
[12:50:50] [PASSED] 0xE209 (BATTLEMAGE)
[12:50:50] [PASSED] 0xE20B (BATTLEMAGE)
[12:50:50] [PASSED] 0xE20C (BATTLEMAGE)
[12:50:50] [PASSED] 0xE20D (BATTLEMAGE)
[12:50:50] [PASSED] 0xE210 (BATTLEMAGE)
[12:50:50] [PASSED] 0xE211 (BATTLEMAGE)
[12:50:50] [PASSED] 0xE212 (BATTLEMAGE)
[12:50:50] [PASSED] 0xE216 (BATTLEMAGE)
[12:50:50] [PASSED] 0xE220 (BATTLEMAGE)
[12:50:50] [PASSED] 0xE221 (BATTLEMAGE)
[12:50:50] [PASSED] 0xE222 (BATTLEMAGE)
[12:50:50] [PASSED] 0xE223 (BATTLEMAGE)
[12:50:50] [PASSED] 0xB080 (PANTHERLAKE)
[12:50:50] [PASSED] 0xB081 (PANTHERLAKE)
[12:50:50] [PASSED] 0xB082 (PANTHERLAKE)
[12:50:50] [PASSED] 0xB083 (PANTHERLAKE)
[12:50:50] [PASSED] 0xB084 (PANTHERLAKE)
[12:50:50] [PASSED] 0xB085 (PANTHERLAKE)
[12:50:50] [PASSED] 0xB086 (PANTHERLAKE)
[12:50:50] [PASSED] 0xB087 (PANTHERLAKE)
[12:50:50] [PASSED] 0xB08F (PANTHERLAKE)
[12:50:50] [PASSED] 0xB090 (PANTHERLAKE)
[12:50:50] [PASSED] 0xB0A0 (PANTHERLAKE)
[12:50:50] [PASSED] 0xB0B0 (PANTHERLAKE)
[12:50:50] [PASSED] 0xFD80 (PANTHERLAKE)
[12:50:50] [PASSED] 0xFD81 (PANTHERLAKE)
[12:50:50] [PASSED] 0xD740 (NOVALAKE_S)
[12:50:50] [PASSED] 0xD741 (NOVALAKE_S)
[12:50:50] [PASSED] 0xD742 (NOVALAKE_S)
[12:50:50] [PASSED] 0xD743 (NOVALAKE_S)
[12:50:50] [PASSED] 0xD744 (NOVALAKE_S)
[12:50:50] [PASSED] 0xD745 (NOVALAKE_S)
[12:50:50] [PASSED] 0x674C (CRESCENTISLAND)
[12:50:50] [PASSED] 0x674D (CRESCENTISLAND)
[12:50:50] [PASSED] 0x674E (CRESCENTISLAND)
[12:50:50] [PASSED] 0x674F (CRESCENTISLAND)
[12:50:50] [PASSED] 0x6750 (CRESCENTISLAND)
[12:50:50] [PASSED] 0xD750 (NOVALAKE_P)
[12:50:50] [PASSED] 0xD751 (NOVALAKE_P)
[12:50:50] [PASSED] 0xD752 (NOVALAKE_P)
[12:50:50] [PASSED] 0xD753 (NOVALAKE_P)
[12:50:50] [PASSED] 0xD754 (NOVALAKE_P)
[12:50:50] [PASSED] 0xD755 (NOVALAKE_P)
[12:50:50] [PASSED] 0xD756 (NOVALAKE_P)
[12:50:50] [PASSED] 0xD757 (NOVALAKE_P)
[12:50:50] [PASSED] 0xD75F (NOVALAKE_P)
[12:50:50] =============== [PASSED] check_platform_desc ===============
[12:50:50] ===================== [PASSED] xe_pci ======================
[12:50:50] ============= xe_rtp_tables_test (4 subtests) ==============
[12:50:50] ================== xe_rtp_table_gt_test  ===================
[12:50:50] [PASSED] gt_was/14011060649
[12:50:50] [PASSED] gt_was/14011059788
[12:50:50] [PASSED] gt_was/14015795083
[12:50:50] [PASSED] gt_was/16021867713
[12:50:50] [PASSED] gt_was/14019449301
[12:50:50] [PASSED] gt_was/16028005424
[12:50:50] [PASSED] gt_was/14026578760
[12:50:50] [PASSED] gt_was/1409420604
[12:50:50] [PASSED] gt_was/1408615072
[12:50:50] [PASSED] gt_was/22010523718
[12:50:50] [PASSED] gt_was/14011006942
[12:50:50] [PASSED] gt_was/14014830051
[12:50:50] [PASSED] gt_was/18018781329
[12:50:50] [PASSED] gt_was/1509235366
[12:50:50] [PASSED] gt_was/18018781329
[12:50:50] [PASSED] gt_was/16016694945
[12:50:50] [PASSED] gt_was/14018575942
[12:50:50] [PASSED] gt_was/22016670082
[12:50:50] [PASSED] gt_was/22016670082
[12:50:50] [PASSED] gt_was/14017421178
[12:50:50] [PASSED] gt_was/16025250150
[12:50:50] [PASSED] gt_was/14021871409
[12:50:50] [PASSED] gt_was/16021865536
[12:50:50] [PASSED] gt_was/14021486841
[12:50:50] [PASSED] gt_was/14025160223
[12:50:50] [PASSED] gt_was/14026144927, 16029437861
[12:50:50] [PASSED] gt_was/14025635424
[12:50:50] [PASSED] gt_was/16028005424
[12:50:50] ============== [PASSED] xe_rtp_table_gt_test ===============
[12:50:50] ================== xe_rtp_table_gt_test  ===================
[12:50:50] [PASSED] gt_tunings/Tuning: Blend Fill Caching Optimization Disable
[12:50:50] [PASSED] gt_tunings/Tuning: 32B Access Enable
[12:50:50] [PASSED] gt_tunings/Tuning: L3 cache
[12:50:50] [PASSED] gt_tunings/Tuning: L3 cache - media
[12:50:50] [PASSED] gt_tunings/Tuning: Compression Overfetch
[12:50:50] [PASSED] gt_tunings/Tuning: Compression Overfetch - media
[12:50:50] [PASSED] gt_tunings/Tuning: Enable compressible partial write overfetch in L3
[12:50:50] [PASSED] gt_tunings/Tuning: Enable compressible partial write overfetch in L3 - media
[12:50:50] [PASSED] gt_tunings/Tuning: L2 Overfetch Compressible Only
[12:50:50] [PASSED] gt_tunings/Tuning: L2 Overfetch Compressible Only - media
[12:50:50] [PASSED] gt_tunings/Tuning: Stateless compression control
[12:50:50] [PASSED] gt_tunings/Tuning: Stateless compression control - media
[12:50:50] [PASSED] gt_tunings/Tuning: L3 RW flush all Cache
[12:50:50] [PASSED] gt_tunings/Tuning: L3 RW flush all cache - media
[12:50:50] [PASSED] gt_tunings/Tuning: Set STLB Bank Hash Mode to 4KB
[12:50:50] ============== [PASSED] xe_rtp_table_gt_test ===============
[12:50:50] ================== xe_rtp_table_oob_test  ==================
[12:50:50] [PASSED] oob_was/1607983814
[12:50:50] [PASSED] oob_was/16010904313
[12:50:50] [PASSED] oob_was/18022495364
[12:50:50] [PASSED] oob_was/22012773006
[12:50:50] [PASSED] oob_was/14014475959
[12:50:50] [PASSED] oob_was/22011391025
[12:50:50] [PASSED] oob_was/22012727170
[12:50:50] [PASSED] oob_was/22012727685
[12:50:50] [PASSED] oob_was/22016596838
[12:50:50] [PASSED] oob_was/18020744125
[12:50:50] [PASSED] oob_was/1409600907
[12:50:50] [PASSED] oob_was/22014953428
[12:50:50] [PASSED] oob_was/16017236439
[12:50:50] [PASSED] oob_was/14019821291
[12:50:50] [PASSED] oob_was/14015076503
[12:50:50] [PASSED] oob_was/14018913170
[12:50:50] [PASSED] oob_was/14018094691
[12:50:50] [PASSED] oob_was/18024947630
[12:50:50] [PASSED] oob_was/16022287689
[12:50:50] [PASSED] oob_was/13011645652
[12:50:50] [PASSED] oob_was/14022293748
[12:50:50] [PASSED] oob_was/22019794406
[12:50:50] [PASSED] oob_was/22019338487
[12:50:50] [PASSED] oob_was/16023588340
[12:50:50] [PASSED] oob_was/14019789679
[12:50:50] [PASSED] oob_was/14022866841
[12:50:50] [PASSED] oob_was/16021333562
[12:50:50] [PASSED] oob_was/14016712196
[12:50:50] [PASSED] oob_was/14015568240
[12:50:50] [PASSED] oob_was/18013179988
[12:50:50] [PASSED] oob_was/1508761755
[12:50:50] [PASSED] oob_was/16023105232
[12:50:50] [PASSED] oob_was/16026508708
[12:50:50] [PASSED] oob_was/14020001231
[12:50:50] [PASSED] oob_was/16023683509
[12:50:50] [PASSED] oob_was/14025515070
[12:50:50] [PASSED] oob_was/15015404425_disable
[12:50:50] [PASSED] oob_was/16026007364
[12:50:50] [PASSED] oob_was/14020316580
[12:50:50] [PASSED] oob_was/14025883347
[12:50:50] ============== [PASSED] xe_rtp_table_oob_test ==============
[12:50:50] ================ xe_rtp_table_dev_oob_test  ================
[12:50:50] [PASSED] device_oob_was/22010954014
[12:50:50] [PASSED] device_oob_was/15015404425
[12:50:50] [PASSED] device_oob_was/22019338487_display
[12:50:50] [PASSED] device_oob_was/14022085890
[12:50:50] [PASSED] device_oob_was/14026539277
[12:50:50] [PASSED] device_oob_was/14026633728
[12:50:50] [PASSED] device_oob_was/14026746987
[12:50:50] [PASSED] device_oob_was/14026779378
[12:50:50] ============ [PASSED] xe_rtp_table_dev_oob_test ============
[12:50:50] =============== [PASSED] xe_rtp_tables_test ================
[12:50:50] =================== xe_rtp (3 subtests) ====================
[12:50:50] =================== xe_rtp_rules_tests  ====================
[12:50:50] [PASSED] no
[12:50:50] [PASSED] yes
[12:50:50] [PASSED] no-and-no
[12:50:50] [PASSED] no-and-yes
[12:50:50] [PASSED] yes-and-no
[12:50:50] [PASSED] yes-and-yes
[12:50:50] [PASSED] no-or-no
[12:50:50] [PASSED] no-or-yes
[12:50:50] [PASSED] yes-or-no
[12:50:50] [PASSED] yes-or-yes
[12:50:50] [PASSED] no-yes-or-yes-no
[12:50:50] [PASSED] no-yes-or-yes-yes
[12:50:50] [PASSED] yes-yes-or-no-yes
[12:50:50] [PASSED] yes-yes-or-yes-yes
[12:50:50] [PASSED] no-no-or-yes-or-no
[12:50:50] [PASSED] or
[12:50:50] [PASSED] or-yes
[12:50:50] [PASSED] or-no
[12:50:50] [PASSED] yes-or
[12:50:50] [PASSED] no-or
[12:50:50] [PASSED] no-or-or-yes
[12:50:50] [PASSED] yes-or-or-no
[12:50:50] [PASSED] no-or-or-no
[12:50:50] [PASSED] missing-context-engine-class
[12:50:50] [PASSED] missing-context-engine-class-or-yes
[12:50:50] [PASSED] missing-context-engine-class-or-or-yes
[12:50:50] =============== [PASSED] xe_rtp_rules_tests ================
[12:50:50] =============== xe_rtp_process_to_sr_tests  ================
[12:50:50] [PASSED] coalesce-same-reg
[12:50:50] [PASSED] no-match-no-add
[12:50:50] [PASSED] two-regs-two-entries
[12:50:50] [PASSED] clr-one-set-other
[12:50:50] [PASSED] set-field
[12:50:50] [PASSED] conflict-duplicate
[12:50:50] [PASSED] conflict-not-disjoint
[12:50:50] [PASSED] conflict-reg-type
[12:50:50] [PASSED] bad-mcr-reg-forced-to-regular
[12:50:50] [PASSED] bad-regular-reg-forced-to-mcr
[12:50:50] =========== [PASSED] xe_rtp_process_to_sr_tests ============
[12:50:50] ================== xe_rtp_process_tests  ===================
[12:50:50] [PASSED] active1
[12:50:50] [PASSED] active2
[12:50:50] [PASSED] active-inactive
[12:50:50] [PASSED] inactive-active
[12:50:50] [PASSED] inactive-active-inactive
[12:50:50] [PASSED] inactive-inactive-inactive
[12:50:50] ============== [PASSED] xe_rtp_process_tests ===============
[12:50:50] ===================== [PASSED] xe_rtp ======================
[12:50:50] ==================== xe_wa (1 subtest) =====================
[12:50:50] ======================== xe_wa_gt  =========================
[12:50:50] [PASSED] TIGERLAKE B0
[12:50:50] [PASSED] DG1 A0
[12:50:50] [PASSED] DG1 B0
[12:50:50] [PASSED] ALDERLAKE_S A0
[12:50:50] [PASSED] ALDERLAKE_S B0
[12:50:50] [PASSED] ALDERLAKE_S C0
[12:50:50] [PASSED] ALDERLAKE_S D0
[12:50:50] [PASSED] ALDERLAKE_P A0
[12:50:50] [PASSED] ALDERLAKE_P B0
[12:50:50] [PASSED] ALDERLAKE_P C0
[12:50:50] [PASSED] ALDERLAKE_S RPLS D0
[12:50:50] [PASSED] ALDERLAKE_P RPLU E0
[12:50:50] [PASSED] DG2 G10 C0
[12:50:50] [PASSED] DG2 G11 B1
[12:50:50] [PASSED] DG2 G12 A1
[12:50:50] [PASSED] METEORLAKE 12.70(Xe_LPG) A0 13.00(Xe_LPM+) A0
[12:50:50] [PASSED] METEORLAKE 12.71(Xe_LPG) A0 13.00(Xe_LPM+) A0
[12:50:50] [PASSED] METEORLAKE 12.74(Xe_LPG+) A0 13.00(Xe_LPM+) A0
[12:50:50] [PASSED] LUNARLAKE 20.04(Xe2_LPG) A0 20.00(Xe2_LPM) A0
[12:50:50] [PASSED] LUNARLAKE 20.04(Xe2_LPG) B0 20.00(Xe2_LPM) A0
[12:50:50] [PASSED] BATTLEMAGE 20.01(Xe2_HPG) A0 13.01(Xe2_HPM) A1
[12:50:50] [PASSED] PANTHERLAKE 30.00(Xe3_LPG) A0 30.00(Xe3_LPM) A0
[12:50:50] ==================== [PASSED] xe_wa_gt =====================
[12:50:50] ====================== [PASSED] xe_wa ======================
[12:50:50] ============================================================
[12:50:50] Testing complete. Ran 715 tests: passed: 697, skipped: 18
[12:50:50] Elapsed time: 36.255s total, 4.335s configuring, 31.253s building, 0.647s running

+ /kernel/tools/testing/kunit/kunit.py run --kunitconfig /kernel/drivers/gpu/drm/tests/.kunitconfig
[12:50:50] Configuring KUnit Kernel ...
Regenerating .config ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
[12:50:52] Building KUnit Kernel ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
Building with:
$ make all compile_commands.json scripts_gdb ARCH=um O=.kunit --jobs=48
[12:51:16] Starting KUnit Kernel (1/1)...
[12:51:16] ============================================================
Running tests with:
$ .kunit/linux kunit.enable=1 mem=1G console=tty kunit_shutdown=halt
[12:51:16] ============ drm_test_pick_cmdline (2 subtests) ============
[12:51:16] [PASSED] drm_test_pick_cmdline_res_1920_1080_60
[12:51:16] =============== drm_test_pick_cmdline_named  ===============
[12:51:16] [PASSED] NTSC
[12:51:16] [PASSED] NTSC-J
[12:51:16] [PASSED] PAL
[12:51:16] [PASSED] PAL-M
[12:51:16] =========== [PASSED] drm_test_pick_cmdline_named ===========
[12:51:16] ============== [PASSED] drm_test_pick_cmdline ==============
[12:51:16] == drm_test_atomic_get_connector_for_encoder (1 subtest) ===
[12:51:16] [PASSED] drm_test_drm_atomic_get_connector_for_encoder
[12:51:16] ==== [PASSED] drm_test_atomic_get_connector_for_encoder ====
[12:51:16] =========== drm_validate_clone_mode (2 subtests) ===========
[12:51:16] ============== drm_test_check_in_clone_mode  ===============
[12:51:16] [PASSED] in_clone_mode
[12:51:16] [PASSED] not_in_clone_mode
[12:51:16] ========== [PASSED] drm_test_check_in_clone_mode ===========
[12:51:16] =============== drm_test_check_valid_clones  ===============
[12:51:16] [PASSED] not_in_clone_mode
[12:51:16] [PASSED] valid_clone
[12:51:16] [PASSED] invalid_clone
[12:51:16] =========== [PASSED] drm_test_check_valid_clones ===========
[12:51:16] ============= [PASSED] drm_validate_clone_mode =============
[12:51:16] ============= drm_validate_modeset (1 subtest) =============
[12:51:16] [PASSED] drm_test_check_connector_changed_modeset
[12:51:16] ============== [PASSED] drm_validate_modeset ===============
[12:51:16] ====== drm_test_bridge_get_current_state (2 subtests) ======
[12:51:16] [PASSED] drm_test_drm_bridge_get_current_state_atomic
[12:51:16] [PASSED] drm_test_drm_bridge_get_current_state_legacy
[12:51:16] ======== [PASSED] drm_test_bridge_get_current_state ========
[12:51:16] ====== drm_test_bridge_helper_reset_crtc (3 subtests) ======
[12:51:16] [PASSED] drm_test_drm_bridge_helper_reset_crtc_atomic
[12:51:16] [PASSED] drm_test_drm_bridge_helper_reset_crtc_atomic_disabled
[12:51:16] [PASSED] drm_test_drm_bridge_helper_reset_crtc_legacy
[12:51:16] ======== [PASSED] drm_test_bridge_helper_reset_crtc ========
[12:51:16] ============== drm_bridge_alloc (2 subtests) ===============
[12:51:16] [PASSED] drm_test_drm_bridge_alloc_basic
[12:51:16] [PASSED] drm_test_drm_bridge_alloc_get_put
[12:51:16] ================ [PASSED] drm_bridge_alloc =================
[12:51:16] ============= drm_cmdline_parser (40 subtests) =============
[12:51:16] [PASSED] drm_test_cmdline_force_d_only
[12:51:16] [PASSED] drm_test_cmdline_force_D_only_dvi
[12:51:16] [PASSED] drm_test_cmdline_force_D_only_hdmi
[12:51:16] [PASSED] drm_test_cmdline_force_D_only_not_digital
[12:51:16] [PASSED] drm_test_cmdline_force_e_only
[12:51:16] [PASSED] drm_test_cmdline_res
[12:51:16] [PASSED] drm_test_cmdline_res_vesa
[12:51:16] [PASSED] drm_test_cmdline_res_vesa_rblank
[12:51:16] [PASSED] drm_test_cmdline_res_rblank
[12:51:16] [PASSED] drm_test_cmdline_res_bpp
[12:51:16] [PASSED] drm_test_cmdline_res_refresh
[12:51:16] [PASSED] drm_test_cmdline_res_bpp_refresh
[12:51:16] [PASSED] drm_test_cmdline_res_bpp_refresh_interlaced
[12:51:16] [PASSED] drm_test_cmdline_res_bpp_refresh_margins
[12:51:16] [PASSED] drm_test_cmdline_res_bpp_refresh_force_off
[12:51:16] [PASSED] drm_test_cmdline_res_bpp_refresh_force_on
[12:51:16] [PASSED] drm_test_cmdline_res_bpp_refresh_force_on_analog
[12:51:16] [PASSED] drm_test_cmdline_res_bpp_refresh_force_on_digital
[12:51:16] [PASSED] drm_test_cmdline_res_bpp_refresh_interlaced_margins_force_on
[12:51:16] [PASSED] drm_test_cmdline_res_margins_force_on
[12:51:16] [PASSED] drm_test_cmdline_res_vesa_margins
[12:51:16] [PASSED] drm_test_cmdline_name
[12:51:16] [PASSED] drm_test_cmdline_name_bpp
[12:51:16] [PASSED] drm_test_cmdline_name_option
[12:51:16] [PASSED] drm_test_cmdline_name_bpp_option
[12:51:16] [PASSED] drm_test_cmdline_rotate_0
[12:51:16] [PASSED] drm_test_cmdline_rotate_90
[12:51:16] [PASSED] drm_test_cmdline_rotate_180
[12:51:16] [PASSED] drm_test_cmdline_rotate_270
[12:51:16] [PASSED] drm_test_cmdline_hmirror
[12:51:16] [PASSED] drm_test_cmdline_vmirror
[12:51:16] [PASSED] drm_test_cmdline_margin_options
[12:51:16] [PASSED] drm_test_cmdline_multiple_options
[12:51:16] [PASSED] drm_test_cmdline_bpp_extra_and_option
[12:51:16] [PASSED] drm_test_cmdline_extra_and_option
[12:51:16] [PASSED] drm_test_cmdline_freestanding_options
[12:51:16] [PASSED] drm_test_cmdline_freestanding_force_e_and_options
[12:51:16] [PASSED] drm_test_cmdline_panel_orientation
[12:51:16] ================ drm_test_cmdline_invalid  =================
[12:51:16] [PASSED] margin_only
[12:51:16] [PASSED] interlace_only
[12:51:16] [PASSED] res_missing_x
[12:51:16] [PASSED] res_missing_y
[12:51:16] [PASSED] res_bad_y
[12:51:16] [PASSED] res_missing_y_bpp
[12:51:16] [PASSED] res_bad_bpp
[12:51:16] [PASSED] res_bad_refresh
[12:51:16] [PASSED] res_bpp_refresh_force_on_off
[12:51:16] [PASSED] res_invalid_mode
[12:51:16] [PASSED] res_bpp_wrong_place_mode
[12:51:16] [PASSED] name_bpp_refresh
[12:51:16] [PASSED] name_refresh
[12:51:16] [PASSED] name_refresh_wrong_mode
[12:51:16] [PASSED] name_refresh_invalid_mode
[12:51:16] [PASSED] rotate_multiple
[12:51:16] [PASSED] rotate_invalid_val
[12:51:16] [PASSED] rotate_truncated
[12:51:16] [PASSED] invalid_option
[12:51:16] [PASSED] invalid_tv_option
[12:51:16] [PASSED] truncated_tv_option
[12:51:16] ============ [PASSED] drm_test_cmdline_invalid =============
[12:51:16] =============== drm_test_cmdline_tv_options  ===============
[12:51:16] [PASSED] NTSC
[12:51:16] [PASSED] NTSC_443
[12:51:16] [PASSED] NTSC_J
[12:51:16] [PASSED] PAL
[12:51:16] [PASSED] PAL_M
[12:51:16] [PASSED] PAL_N
[12:51:16] [PASSED] SECAM
[12:51:16] [PASSED] MONO_525
[12:51:16] [PASSED] MONO_625
[12:51:16] =========== [PASSED] drm_test_cmdline_tv_options ===========
[12:51:16] =============== [PASSED] drm_cmdline_parser ================
[12:51:16] ========== drmm_connector_hdmi_init (20 subtests) ==========
[12:51:16] [PASSED] drm_test_connector_hdmi_init_valid
[12:51:16] [PASSED] drm_test_connector_hdmi_init_bpc_8
[12:51:16] [PASSED] drm_test_connector_hdmi_init_bpc_10
[12:51:16] [PASSED] drm_test_connector_hdmi_init_bpc_12
[12:51:16] [PASSED] drm_test_connector_hdmi_init_bpc_invalid
[12:51:16] [PASSED] drm_test_connector_hdmi_init_bpc_null
[12:51:16] [PASSED] drm_test_connector_hdmi_init_formats_empty
[12:51:16] [PASSED] drm_test_connector_hdmi_init_formats_no_rgb
[12:51:16] === drm_test_connector_hdmi_init_formats_yuv420_allowed  ===
[12:51:16] [PASSED] supported_formats=0x9 yuv420_allowed=1
[12:51:16] [PASSED] supported_formats=0x9 yuv420_allowed=0
[12:51:16] [PASSED] supported_formats=0x5 yuv420_allowed=1
[12:51:16] [PASSED] supported_formats=0x5 yuv420_allowed=0
[12:51:16] === [PASSED] drm_test_connector_hdmi_init_formats_yuv420_allowed ===
[12:51:16] [PASSED] drm_test_connector_hdmi_init_null_ddc
[12:51:16] [PASSED] drm_test_connector_hdmi_init_null_product
[12:51:16] [PASSED] drm_test_connector_hdmi_init_null_vendor
[12:51:16] [PASSED] drm_test_connector_hdmi_init_product_length_exact
[12:51:16] [PASSED] drm_test_connector_hdmi_init_product_length_too_long
[12:51:16] [PASSED] drm_test_connector_hdmi_init_product_valid
[12:51:16] [PASSED] drm_test_connector_hdmi_init_vendor_length_exact
[12:51:16] [PASSED] drm_test_connector_hdmi_init_vendor_length_too_long
[12:51:16] [PASSED] drm_test_connector_hdmi_init_vendor_valid
[12:51:16] ========= drm_test_connector_hdmi_init_type_valid  =========
[12:51:16] [PASSED] HDMI-A
[12:51:16] [PASSED] HDMI-B
[12:51:16] ===== [PASSED] drm_test_connector_hdmi_init_type_valid =====
[12:51:16] ======== drm_test_connector_hdmi_init_type_invalid  ========
[12:51:16] [PASSED] Unknown
[12:51:16] [PASSED] VGA
[12:51:16] [PASSED] DVI-I
[12:51:16] [PASSED] DVI-D
[12:51:16] [PASSED] DVI-A
[12:51:16] [PASSED] Composite
[12:51:16] [PASSED] SVIDEO
[12:51:16] [PASSED] LVDS
[12:51:16] [PASSED] Component
[12:51:16] [PASSED] DIN
[12:51:16] [PASSED] DP
[12:51:16] [PASSED] TV
[12:51:16] [PASSED] eDP
[12:51:16] [PASSED] Virtual
[12:51:16] [PASSED] DSI
[12:51:16] [PASSED] DPI
[12:51:16] [PASSED] Writeback
[12:51:16] [PASSED] SPI
[12:51:16] [PASSED] USB
[12:51:16] ==== [PASSED] drm_test_connector_hdmi_init_type_invalid ====
[12:51:16] ============ [PASSED] drmm_connector_hdmi_init =============
[12:51:16] ============= drmm_connector_init (3 subtests) =============
[12:51:16] [PASSED] drm_test_drmm_connector_init
[12:51:16] [PASSED] drm_test_drmm_connector_init_null_ddc
[12:51:16] ========= drm_test_drmm_connector_init_type_valid  =========
[12:51:16] [PASSED] Unknown
[12:51:16] [PASSED] VGA
[12:51:16] [PASSED] DVI-I
[12:51:16] [PASSED] DVI-D
[12:51:16] [PASSED] DVI-A
[12:51:16] [PASSED] Composite
[12:51:16] [PASSED] SVIDEO
[12:51:16] [PASSED] LVDS
[12:51:16] [PASSED] Component
[12:51:16] [PASSED] DIN
[12:51:16] [PASSED] DP
[12:51:16] [PASSED] HDMI-A
[12:51:16] [PASSED] HDMI-B
[12:51:16] [PASSED] TV
[12:51:16] [PASSED] eDP
[12:51:16] [PASSED] Virtual
[12:51:16] [PASSED] DSI
[12:51:16] [PASSED] DPI
[12:51:16] [PASSED] Writeback
[12:51:16] [PASSED] SPI
[12:51:16] [PASSED] USB
[12:51:16] ===== [PASSED] drm_test_drmm_connector_init_type_valid =====
[12:51:16] =============== [PASSED] drmm_connector_init ===============
[12:51:16] ========= drm_connector_dynamic_init (6 subtests) ==========
[12:51:16] [PASSED] drm_test_drm_connector_dynamic_init
[12:51:16] [PASSED] drm_test_drm_connector_dynamic_init_null_ddc
[12:51:16] [PASSED] drm_test_drm_connector_dynamic_init_not_added
[12:51:16] [PASSED] drm_test_drm_connector_dynamic_init_properties
[12:51:16] ===== drm_test_drm_connector_dynamic_init_type_valid  ======
[12:51:16] [PASSED] Unknown
[12:51:16] [PASSED] VGA
[12:51:16] [PASSED] DVI-I
[12:51:16] [PASSED] DVI-D
[12:51:16] [PASSED] DVI-A
[12:51:16] [PASSED] Composite
[12:51:16] [PASSED] SVIDEO
[12:51:16] [PASSED] LVDS
[12:51:16] [PASSED] Component
[12:51:16] [PASSED] DIN
[12:51:16] [PASSED] DP
[12:51:16] [PASSED] HDMI-A
[12:51:16] [PASSED] HDMI-B
[12:51:16] [PASSED] TV
[12:51:16] [PASSED] eDP
[12:51:16] [PASSED] Virtual
[12:51:16] [PASSED] DSI
[12:51:16] [PASSED] DPI
[12:51:16] [PASSED] Writeback
[12:51:16] [PASSED] SPI
[12:51:16] [PASSED] USB
[12:51:16] = [PASSED] drm_test_drm_connector_dynamic_init_type_valid ==
[12:51:16] ======== drm_test_drm_connector_dynamic_init_name  =========
[12:51:16] [PASSED] Unknown
[12:51:16] [PASSED] VGA
[12:51:16] [PASSED] DVI-I
[12:51:16] [PASSED] DVI-D
[12:51:16] [PASSED] DVI-A
[12:51:16] [PASSED] Composite
[12:51:16] [PASSED] SVIDEO
[12:51:16] [PASSED] LVDS
[12:51:16] [PASSED] Component
[12:51:16] [PASSED] DIN
[12:51:16] [PASSED] DP
[12:51:16] [PASSED] HDMI-A
[12:51:16] [PASSED] HDMI-B
[12:51:16] [PASSED] TV
[12:51:16] [PASSED] eDP
[12:51:16] [PASSED] Virtual
[12:51:16] [PASSED] DSI
[12:51:16] [PASSED] DPI
[12:51:16] [PASSED] Writeback
[12:51:16] [PASSED] SPI
[12:51:16] [PASSED] USB
[12:51:16] ==== [PASSED] drm_test_drm_connector_dynamic_init_name =====
[12:51:16] =========== [PASSED] drm_connector_dynamic_init ============
[12:51:16] ==== drm_connector_dynamic_register_early (4 subtests) =====
[12:51:16] [PASSED] drm_test_drm_connector_dynamic_register_early_on_list
[12:51:16] [PASSED] drm_test_drm_connector_dynamic_register_early_defer
[12:51:16] [PASSED] drm_test_drm_connector_dynamic_register_early_no_init
[12:51:16] [PASSED] drm_test_drm_connector_dynamic_register_early_no_mode_object
[12:51:16] ====== [PASSED] drm_connector_dynamic_register_early =======
[12:51:16] ======= drm_connector_dynamic_register (7 subtests) ========
[12:51:16] [PASSED] drm_test_drm_connector_dynamic_register_on_list
[12:51:16] [PASSED] drm_test_drm_connector_dynamic_register_no_defer
[12:51:16] [PASSED] drm_test_drm_connector_dynamic_register_no_init
[12:51:16] [PASSED] drm_test_drm_connector_dynamic_register_mode_object
[12:51:16] [PASSED] drm_test_drm_connector_dynamic_register_sysfs
[12:51:16] [PASSED] drm_test_drm_connector_dynamic_register_sysfs_name
[12:51:16] [PASSED] drm_test_drm_connector_dynamic_register_debugfs
[12:51:16] ========= [PASSED] drm_connector_dynamic_register ==========
[12:51:16] = drm_connector_attach_broadcast_rgb_property (2 subtests) =
[12:51:16] [PASSED] drm_test_drm_connector_attach_broadcast_rgb_property
[12:51:16] [PASSED] drm_test_drm_connector_attach_broadcast_rgb_property_hdmi_connector
[12:51:16] === [PASSED] drm_connector_attach_broadcast_rgb_property ===
[12:51:16] ========== drm_get_tv_mode_from_name (2 subtests) ==========
[12:51:16] ========== drm_test_get_tv_mode_from_name_valid  ===========
[12:51:16] [PASSED] NTSC
[12:51:16] [PASSED] NTSC-443
[12:51:16] [PASSED] NTSC-J
[12:51:16] [PASSED] PAL
[12:51:16] [PASSED] PAL-M
[12:51:16] [PASSED] PAL-N
[12:51:16] [PASSED] SECAM
[12:51:16] [PASSED] Mono
[12:51:16] ====== [PASSED] drm_test_get_tv_mode_from_name_valid =======
[12:51:16] [PASSED] drm_test_get_tv_mode_from_name_truncated
[12:51:16] ============ [PASSED] drm_get_tv_mode_from_name ============
[12:51:16] = drm_test_connector_hdmi_compute_mode_clock (12 subtests) =
[12:51:16] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb
[12:51:16] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_10bpc
[12:51:16] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_10bpc_vic_1
[12:51:16] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_12bpc
[12:51:16] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_12bpc_vic_1
[12:51:16] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_double
[12:51:16] = drm_test_connector_hdmi_compute_mode_clock_yuv420_valid  =
[12:51:16] [PASSED] VIC 96
[12:51:16] [PASSED] VIC 97
[12:51:16] [PASSED] VIC 101
[12:51:16] [PASSED] VIC 102
[12:51:16] [PASSED] VIC 106
[12:51:16] [PASSED] VIC 107
[12:51:16] === [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv420_valid ===
[12:51:16] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv420_10_bpc
[12:51:16] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv420_12_bpc
[12:51:16] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv422_8_bpc
[12:51:16] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv422_10_bpc
[12:51:16] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv422_12_bpc
[12:51:16] === [PASSED] drm_test_connector_hdmi_compute_mode_clock ====
[12:51:16] == drm_hdmi_connector_get_broadcast_rgb_name (2 subtests) ==
[12:51:16] === drm_test_drm_hdmi_connector_get_broadcast_rgb_name  ====
[12:51:16] [PASSED] Automatic
[12:51:16] [PASSED] Full
[12:51:16] [PASSED] Limited 16:235
[12:51:16] === [PASSED] drm_test_drm_hdmi_connector_get_broadcast_rgb_name ===
[12:51:16] [PASSED] drm_test_drm_hdmi_connector_get_broadcast_rgb_name_invalid
[12:51:16] ==== [PASSED] drm_hdmi_connector_get_broadcast_rgb_name ====
[12:51:16] == drm_hdmi_connector_get_output_format_name (2 subtests) ==
[12:51:16] === drm_test_drm_hdmi_connector_get_output_format_name  ====
[12:51:16] [PASSED] RGB
[12:51:16] [PASSED] YUV 4:2:0
[12:51:16] [PASSED] YUV 4:2:2
[12:51:16] [PASSED] YUV 4:4:4
[12:51:16] === [PASSED] drm_test_drm_hdmi_connector_get_output_format_name ===
[12:51:16] [PASSED] drm_test_drm_hdmi_connector_get_output_format_name_invalid
[12:51:16] ==== [PASSED] drm_hdmi_connector_get_output_format_name ====
[12:51:16] ============= drm_damage_helper (21 subtests) ==============
[12:51:16] [PASSED] drm_test_damage_iter_no_damage
[12:51:16] [PASSED] drm_test_damage_iter_no_damage_fractional_src
[12:51:16] [PASSED] drm_test_damage_iter_no_damage_src_moved
[12:51:16] [PASSED] drm_test_damage_iter_no_damage_fractional_src_moved
[12:51:16] [PASSED] drm_test_damage_iter_no_damage_not_visible
[12:51:16] [PASSED] drm_test_damage_iter_no_damage_no_crtc
[12:51:16] [PASSED] drm_test_damage_iter_no_damage_no_fb
[12:51:16] [PASSED] drm_test_damage_iter_simple_damage
[12:51:16] [PASSED] drm_test_damage_iter_single_damage
[12:51:16] [PASSED] drm_test_damage_iter_single_damage_intersect_src
[12:51:16] [PASSED] drm_test_damage_iter_single_damage_outside_src
[12:51:16] [PASSED] drm_test_damage_iter_single_damage_fractional_src
[12:51:16] [PASSED] drm_test_damage_iter_single_damage_intersect_fractional_src
[12:51:16] [PASSED] drm_test_damage_iter_single_damage_outside_fractional_src
[12:51:16] [PASSED] drm_test_damage_iter_single_damage_src_moved
[12:51:16] [PASSED] drm_test_damage_iter_single_damage_fractional_src_moved
[12:51:16] [PASSED] drm_test_damage_iter_damage
[12:51:16] [PASSED] drm_test_damage_iter_damage_one_intersect
[12:51:16] [PASSED] drm_test_damage_iter_damage_one_outside
[12:51:16] [PASSED] drm_test_damage_iter_damage_src_moved
[12:51:16] [PASSED] drm_test_damage_iter_damage_not_visible
[12:51:16] ================ [PASSED] drm_damage_helper ================
[12:51:16] ============== drm_dp_mst_helper (3 subtests) ==============
[12:51:16] ============== drm_test_dp_mst_calc_pbn_mode  ==============
[12:51:16] [PASSED] Clock 154000 BPP 30 DSC disabled
[12:51:16] [PASSED] Clock 234000 BPP 30 DSC disabled
[12:51:16] [PASSED] Clock 297000 BPP 24 DSC disabled
[12:51:16] [PASSED] Clock 332880 BPP 24 DSC enabled
[12:51:16] [PASSED] Clock 324540 BPP 24 DSC enabled
[12:51:16] ========== [PASSED] drm_test_dp_mst_calc_pbn_mode ==========
[12:51:16] ============== drm_test_dp_mst_calc_pbn_div  ===============
[12:51:16] [PASSED] Link rate 2000000 lane count 4
[12:51:16] [PASSED] Link rate 2000000 lane count 2
[12:51:16] [PASSED] Link rate 2000000 lane count 1
[12:51:16] [PASSED] Link rate 1350000 lane count 4
[12:51:16] [PASSED] Link rate 1350000 lane count 2
[12:51:16] [PASSED] Link rate 1350000 lane count 1
[12:51:16] [PASSED] Link rate 1000000 lane count 4
[12:51:16] [PASSED] Link rate 1000000 lane count 2
[12:51:16] [PASSED] Link rate 1000000 lane count 1
[12:51:16] [PASSED] Link rate 810000 lane count 4
[12:51:16] [PASSED] Link rate 810000 lane count 2
[12:51:16] [PASSED] Link rate 810000 lane count 1
[12:51:16] [PASSED] Link rate 540000 lane count 4
[12:51:16] [PASSED] Link rate 540000 lane count 2
[12:51:16] [PASSED] Link rate 540000 lane count 1
[12:51:16] [PASSED] Link rate 270000 lane count 4
[12:51:16] [PASSED] Link rate 270000 lane count 2
[12:51:16] [PASSED] Link rate 270000 lane count 1
[12:51:16] [PASSED] Link rate 162000 lane count 4
[12:51:16] [PASSED] Link rate 162000 lane count 2
[12:51:16] [PASSED] Link rate 162000 lane count 1
[12:51:16] ========== [PASSED] drm_test_dp_mst_calc_pbn_div ===========
[12:51:16] ========= drm_test_dp_mst_sideband_msg_req_decode  =========
[12:51:16] [PASSED] DP_ENUM_PATH_RESOURCES with port number
[12:51:16] [PASSED] DP_POWER_UP_PHY with port number
[12:51:16] [PASSED] DP_POWER_DOWN_PHY with port number
[12:51:16] [PASSED] DP_ALLOCATE_PAYLOAD with SDP stream sinks
[12:51:16] [PASSED] DP_ALLOCATE_PAYLOAD with port number
[12:51:16] [PASSED] DP_ALLOCATE_PAYLOAD with VCPI
[12:51:16] [PASSED] DP_ALLOCATE_PAYLOAD with PBN
[12:51:16] [PASSED] DP_QUERY_PAYLOAD with port number
[12:51:16] [PASSED] DP_QUERY_PAYLOAD with VCPI
[12:51:16] [PASSED] DP_REMOTE_DPCD_READ with port number
[12:51:16] [PASSED] DP_REMOTE_DPCD_READ with DPCD address
[12:51:16] [PASSED] DP_REMOTE_DPCD_READ with max number of bytes
[12:51:16] [PASSED] DP_REMOTE_DPCD_WRITE with port number
[12:51:16] [PASSED] DP_REMOTE_DPCD_WRITE with DPCD address
[12:51:16] [PASSED] DP_REMOTE_DPCD_WRITE with data array
[12:51:16] [PASSED] DP_REMOTE_I2C_READ with port number
[12:51:16] [PASSED] DP_REMOTE_I2C_READ with I2C device ID
[12:51:16] [PASSED] DP_REMOTE_I2C_READ with transactions array
[12:51:16] [PASSED] DP_REMOTE_I2C_WRITE with port number
[12:51:16] [PASSED] DP_REMOTE_I2C_WRITE with I2C device ID
[12:51:16] [PASSED] DP_REMOTE_I2C_WRITE with data array
[12:51:16] [PASSED] DP_QUERY_STREAM_ENC_STATUS with stream ID
[12:51:16] [PASSED] DP_QUERY_STREAM_ENC_STATUS with client ID
[12:51:16] [PASSED] DP_QUERY_STREAM_ENC_STATUS with stream event
[12:51:16] [PASSED] DP_QUERY_STREAM_ENC_STATUS with valid stream event
[12:51:16] [PASSED] DP_QUERY_STREAM_ENC_STATUS with stream behavior
[12:51:16] [PASSED] DP_QUERY_STREAM_ENC_STATUS with a valid stream behavior
[12:51:16] ===== [PASSED] drm_test_dp_mst_sideband_msg_req_decode =====
[12:51:16] ================ [PASSED] drm_dp_mst_helper ================
[12:51:16] ================== drm_exec (7 subtests) ===================
[12:51:16] [PASSED] sanitycheck
[12:51:16] [PASSED] test_lock
[12:51:16] [PASSED] test_lock_unlock
[12:51:16] [PASSED] test_duplicates
[12:51:16] [PASSED] test_prepare
[12:51:16] [PASSED] test_prepare_array
[12:51:16] [PASSED] test_multiple_loops
[12:51:16] ==================== [PASSED] drm_exec =====================
[12:51:16] =========== drm_format_helper_test (17 subtests) ===========
[12:51:16] ============== drm_test_fb_xrgb8888_to_gray8  ==============
[12:51:16] [PASSED] single_pixel_source_buffer
[12:51:16] [PASSED] single_pixel_clip_rectangle
[12:51:16] [PASSED] well_known_colors
[12:51:16] [PASSED] destination_pitch
[12:51:16] ========== [PASSED] drm_test_fb_xrgb8888_to_gray8 ==========
[12:51:16] ============= drm_test_fb_xrgb8888_to_rgb332  ==============
[12:51:16] [PASSED] single_pixel_source_buffer
[12:51:16] [PASSED] single_pixel_clip_rectangle
[12:51:16] [PASSED] well_known_colors
[12:51:16] [PASSED] destination_pitch
[12:51:16] ========= [PASSED] drm_test_fb_xrgb8888_to_rgb332 ==========
[12:51:16] ============= drm_test_fb_xrgb8888_to_rgb565  ==============
[12:51:16] [PASSED] single_pixel_source_buffer
[12:51:16] [PASSED] single_pixel_clip_rectangle
[12:51:16] [PASSED] well_known_colors
[12:51:16] [PASSED] destination_pitch
[12:51:16] ========= [PASSED] drm_test_fb_xrgb8888_to_rgb565 ==========
[12:51:16] ============ drm_test_fb_xrgb8888_to_xrgb1555  =============
[12:51:16] [PASSED] single_pixel_source_buffer
[12:51:16] [PASSED] single_pixel_clip_rectangle
[12:51:16] [PASSED] well_known_colors
[12:51:16] [PASSED] destination_pitch
[12:51:16] ======== [PASSED] drm_test_fb_xrgb8888_to_xrgb1555 =========
[12:51:16] ============ drm_test_fb_xrgb8888_to_argb1555  =============
[12:51:16] [PASSED] single_pixel_source_buffer
[12:51:16] [PASSED] single_pixel_clip_rectangle
[12:51:16] [PASSED] well_known_colors
[12:51:16] [PASSED] destination_pitch
[12:51:16] ======== [PASSED] drm_test_fb_xrgb8888_to_argb1555 =========
[12:51:16] ============ drm_test_fb_xrgb8888_to_rgba5551  =============
[12:51:16] [PASSED] single_pixel_source_buffer
[12:51:16] [PASSED] single_pixel_clip_rectangle
[12:51:16] [PASSED] well_known_colors
[12:51:16] [PASSED] destination_pitch
[12:51:16] ======== [PASSED] drm_test_fb_xrgb8888_to_rgba5551 =========
[12:51:16] ============= drm_test_fb_xrgb8888_to_rgb888  ==============
[12:51:16] [PASSED] single_pixel_source_buffer
[12:51:16] [PASSED] single_pixel_clip_rectangle
[12:51:16] [PASSED] well_known_colors
[12:51:16] [PASSED] destination_pitch
[12:51:16] ========= [PASSED] drm_test_fb_xrgb8888_to_rgb888 ==========
[12:51:16] ============= drm_test_fb_xrgb8888_to_bgr888  ==============
[12:51:16] [PASSED] single_pixel_source_buffer
[12:51:16] [PASSED] single_pixel_clip_rectangle
[12:51:16] [PASSED] well_known_colors
[12:51:16] [PASSED] destination_pitch
[12:51:16] ========= [PASSED] drm_test_fb_xrgb8888_to_bgr888 ==========
[12:51:16] ============ drm_test_fb_xrgb8888_to_argb8888  =============
[12:51:16] [PASSED] single_pixel_source_buffer
[12:51:16] [PASSED] single_pixel_clip_rectangle
[12:51:16] [PASSED] well_known_colors
[12:51:16] [PASSED] destination_pitch
[12:51:16] ======== [PASSED] drm_test_fb_xrgb8888_to_argb8888 =========
[12:51:16] =========== drm_test_fb_xrgb8888_to_xrgb2101010  ===========
[12:51:16] [PASSED] single_pixel_source_buffer
[12:51:16] [PASSED] single_pixel_clip_rectangle
[12:51:16] [PASSED] well_known_colors
[12:51:16] [PASSED] destination_pitch
[12:51:16] ======= [PASSED] drm_test_fb_xrgb8888_to_xrgb2101010 =======
[12:51:16] =========== drm_test_fb_xrgb8888_to_argb2101010  ===========
[12:51:16] [PASSED] single_pixel_source_buffer
[12:51:16] [PASSED] single_pixel_clip_rectangle
[12:51:16] [PASSED] well_known_colors
[12:51:16] [PASSED] destination_pitch
[12:51:16] ======= [PASSED] drm_test_fb_xrgb8888_to_argb2101010 =======
[12:51:16] ============== drm_test_fb_xrgb8888_to_mono  ===============
[12:51:16] [PASSED] single_pixel_source_buffer
[12:51:16] [PASSED] single_pixel_clip_rectangle
[12:51:16] [PASSED] well_known_colors
[12:51:16] [PASSED] destination_pitch
[12:51:16] ========== [PASSED] drm_test_fb_xrgb8888_to_mono ===========
[12:51:16] ==================== drm_test_fb_swab  =====================
[12:51:16] [PASSED] single_pixel_source_buffer
[12:51:16] [PASSED] single_pixel_clip_rectangle
[12:51:16] [PASSED] well_known_colors
[12:51:16] [PASSED] destination_pitch
[12:51:16] ================ [PASSED] drm_test_fb_swab =================
[12:51:16] ============ drm_test_fb_xrgb8888_to_xbgr8888  =============
[12:51:16] [PASSED] single_pixel_source_buffer
[12:51:16] [PASSED] single_pixel_clip_rectangle
[12:51:16] [PASSED] well_known_colors
[12:51:16] [PASSED] destination_pitch
[12:51:16] ======== [PASSED] drm_test_fb_xrgb8888_to_xbgr8888 =========
[12:51:16] ============ drm_test_fb_xrgb8888_to_abgr8888  =============
[12:51:16] [PASSED] single_pixel_source_buffer
[12:51:16] [PASSED] single_pixel_clip_rectangle
[12:51:16] [PASSED] well_known_colors
[12:51:16] [PASSED] destination_pitch
[12:51:16] ======== [PASSED] drm_test_fb_xrgb8888_to_abgr8888 =========
[12:51:16] ================= drm_test_fb_clip_offset  =================
[12:51:16] [PASSED] pass through
[12:51:16] [PASSED] horizontal offset
[12:51:16] [PASSED] vertical offset
[12:51:16] [PASSED] horizontal and vertical offset
[12:51:16] [PASSED] horizontal offset (custom pitch)
[12:51:16] [PASSED] vertical offset (custom pitch)
[12:51:16] [PASSED] horizontal and vertical offset (custom pitch)
[12:51:16] ============= [PASSED] drm_test_fb_clip_offset =============
[12:51:16] =================== drm_test_fb_memcpy  ====================
[12:51:16] [PASSED] single_pixel_source_buffer: XR24 little-endian (0x34325258)
[12:51:16] [PASSED] single_pixel_source_buffer: XRA8 little-endian (0x38415258)
[12:51:16] [PASSED] single_pixel_source_buffer: YU24 little-endian (0x34325559)
[12:51:16] [PASSED] single_pixel_clip_rectangle: XB24 little-endian (0x34324258)
[12:51:16] [PASSED] single_pixel_clip_rectangle: XRA8 little-endian (0x38415258)
[12:51:16] [PASSED] single_pixel_clip_rectangle: YU24 little-endian (0x34325559)
[12:51:16] [PASSED] well_known_colors: XB24 little-endian (0x34324258)
[12:51:16] [PASSED] well_known_colors: XRA8 little-endian (0x38415258)
[12:51:16] [PASSED] well_known_colors: YU24 little-endian (0x34325559)
[12:51:16] [PASSED] destination_pitch: XB24 little-endian (0x34324258)
[12:51:16] [PASSED] destination_pitch: XRA8 little-endian (0x38415258)
[12:51:16] [PASSED] destination_pitch: YU24 little-endian (0x34325559)
[12:51:16] =============== [PASSED] drm_test_fb_memcpy ================
[12:51:16] ============= [PASSED] drm_format_helper_test ==============
[12:51:16] ================= drm_format (18 subtests) =================
[12:51:16] [PASSED] drm_test_format_block_width_invalid
[12:51:16] [PASSED] drm_test_format_block_width_one_plane
[12:51:16] [PASSED] drm_test_format_block_width_two_plane
[12:51:16] [PASSED] drm_test_format_block_width_three_plane
[12:51:16] [PASSED] drm_test_format_block_width_tiled
[12:51:16] [PASSED] drm_test_format_block_height_invalid
[12:51:16] [PASSED] drm_test_format_block_height_one_plane
[12:51:16] [PASSED] drm_test_format_block_height_two_plane
[12:51:16] [PASSED] drm_test_format_block_height_three_plane
[12:51:16] [PASSED] drm_test_format_block_height_tiled
[12:51:16] [PASSED] drm_test_format_min_pitch_invalid
[12:51:16] [PASSED] drm_test_format_min_pitch_one_plane_8bpp
[12:51:16] [PASSED] drm_test_format_min_pitch_one_plane_16bpp
[12:51:16] [PASSED] drm_test_format_min_pitch_one_plane_24bpp
[12:51:16] [PASSED] drm_test_format_min_pitch_one_plane_32bpp
[12:51:16] [PASSED] drm_test_format_min_pitch_two_plane
[12:51:16] [PASSED] drm_test_format_min_pitch_three_plane_8bpp
[12:51:16] [PASSED] drm_test_format_min_pitch_tiled
[12:51:16] =================== [PASSED] drm_format ====================
[12:51:16] ============== drm_framebuffer (10 subtests) ===============
[12:51:16] ========== drm_test_framebuffer_check_src_coords  ==========
[12:51:16] [PASSED] Success: source fits into fb
[12:51:16] [PASSED] Fail: overflowing fb with x-axis coordinate
[12:51:16] [PASSED] Fail: overflowing fb with y-axis coordinate
[12:51:16] [PASSED] Fail: overflowing fb with source width
[12:51:16] [PASSED] Fail: overflowing fb with source height
[12:51:16] ====== [PASSED] drm_test_framebuffer_check_src_coords ======
[12:51:16] [PASSED] drm_test_framebuffer_cleanup
[12:51:16] =============== drm_test_framebuffer_create  ===============
[12:51:16] [PASSED] ABGR8888 normal sizes
[12:51:16] [PASSED] ABGR8888 max sizes
[12:51:16] [PASSED] ABGR8888 pitch greater than min required
[12:51:16] [PASSED] ABGR8888 pitch less than min required
[12:51:16] [PASSED] ABGR8888 Invalid width
[12:51:16] [PASSED] ABGR8888 Invalid buffer handle
[12:51:16] [PASSED] No pixel format
[12:51:16] [PASSED] ABGR8888 Width 0
[12:51:16] [PASSED] ABGR8888 Height 0
[12:51:16] [PASSED] ABGR8888 Out of bound height * pitch combination
[12:51:16] [PASSED] ABGR8888 Large buffer offset
[12:51:16] [PASSED] ABGR8888 Buffer offset for inexistent plane
[12:51:16] [PASSED] ABGR8888 Invalid flag
[12:51:16] [PASSED] ABGR8888 Set DRM_MODE_FB_MODIFIERS without modifiers
[12:51:16] [PASSED] ABGR8888 Valid buffer modifier
[12:51:16] [PASSED] ABGR8888 Invalid buffer modifier(DRM_FORMAT_MOD_SAMSUNG_64_32_TILE)
[12:51:16] [PASSED] ABGR8888 Extra pitches without DRM_MODE_FB_MODIFIERS
[12:51:16] [PASSED] ABGR8888 Extra pitches with DRM_MODE_FB_MODIFIERS
[12:51:16] [PASSED] NV12 Normal sizes
[12:51:16] [PASSED] NV12 Max sizes
[12:51:16] [PASSED] NV12 Invalid pitch
[12:51:16] [PASSED] NV12 Invalid modifier/missing DRM_MODE_FB_MODIFIERS flag
[12:51:16] [PASSED] NV12 different  modifier per-plane
[12:51:16] [PASSED] NV12 with DRM_FORMAT_MOD_SAMSUNG_64_32_TILE
[12:51:16] [PASSED] NV12 Valid modifiers without DRM_MODE_FB_MODIFIERS
[12:51:16] [PASSED] NV12 Modifier for inexistent plane
[12:51:16] [PASSED] NV12 Handle for inexistent plane
[12:51:16] [PASSED] NV12 Handle for inexistent plane without DRM_MODE_FB_MODIFIERS
[12:51:16] [PASSED] YVU420 DRM_MODE_FB_MODIFIERS set without modifier
[12:51:16] [PASSED] YVU420 Normal sizes
[12:51:16] [PASSED] YVU420 Max sizes
[12:51:16] [PASSED] YVU420 Invalid pitch
[12:51:16] [PASSED] YVU420 Different pitches
[12:51:16] [PASSED] YVU420 Different buffer offsets/pitches
[12:51:16] [PASSED] YVU420 Modifier set just for plane 0, without DRM_MODE_FB_MODIFIERS
[12:51:16] [PASSED] YVU420 Modifier set just for planes 0, 1, without DRM_MODE_FB_MODIFIERS
[12:51:16] [PASSED] YVU420 Modifier set just for plane 0, 1, with DRM_MODE_FB_MODIFIERS
[12:51:16] [PASSED] YVU420 Valid modifier
[12:51:16] [PASSED] YVU420 Different modifiers per plane
[12:51:16] [PASSED] YVU420 Modifier for inexistent plane
[12:51:16] [PASSED] YUV420_10BIT Invalid modifier(DRM_FORMAT_MOD_LINEAR)
[12:51:16] [PASSED] X0L2 Normal sizes
[12:51:16] [PASSED] X0L2 Max sizes
[12:51:16] [PASSED] X0L2 Invalid pitch
[12:51:16] [PASSED] X0L2 Pitch greater than minimum required
[12:51:16] [PASSED] X0L2 Handle for inexistent plane
[12:51:16] [PASSED] X0L2 Offset for inexistent plane, without DRM_MODE_FB_MODIFIERS set
[12:51:16] [PASSED] X0L2 Modifier without DRM_MODE_FB_MODIFIERS set
[12:51:16] [PASSED] X0L2 Valid modifier
[12:51:16] [PASSED] X0L2 Modifier for inexistent plane
[12:51:16] =========== [PASSED] drm_test_framebuffer_create ===========
[12:51:16] [PASSED] drm_test_framebuffer_free
[12:51:16] [PASSED] drm_test_framebuffer_init
[12:51:16] [PASSED] drm_test_framebuffer_init_bad_format
[12:51:16] [PASSED] drm_test_framebuffer_init_dev_mismatch
[12:51:16] [PASSED] drm_test_framebuffer_lookup
[12:51:16] [PASSED] drm_test_framebuffer_lookup_inexistent
[12:51:16] [PASSED] drm_test_framebuffer_modifiers_not_supported
[12:51:16] ================= [PASSED] drm_framebuffer =================
[12:51:16] ================ drm_gem_shmem (8 subtests) ================
[12:51:16] [PASSED] drm_gem_shmem_test_obj_create
[12:51:16] [PASSED] drm_gem_shmem_test_obj_create_private
[12:51:16] [PASSED] drm_gem_shmem_test_pin_pages
[12:51:16] [PASSED] drm_gem_shmem_test_vmap
[12:51:16] [PASSED] drm_gem_shmem_test_get_sg_table
[12:51:16] [PASSED] drm_gem_shmem_test_get_pages_sgt
[12:51:16] [PASSED] drm_gem_shmem_test_madvise
[12:51:16] [PASSED] drm_gem_shmem_test_purge
[12:51:16] ================== [PASSED] drm_gem_shmem ==================
[12:51:16] === drm_atomic_helper_connector_hdmi_check (27 subtests) ===
[12:51:16] [PASSED] drm_test_check_broadcast_rgb_auto_cea_mode
[12:51:16] [PASSED] drm_test_check_broadcast_rgb_auto_cea_mode_vic_1
[12:51:16] [PASSED] drm_test_check_broadcast_rgb_full_cea_mode
[12:51:16] [PASSED] drm_test_check_broadcast_rgb_full_cea_mode_vic_1
[12:51:16] [PASSED] drm_test_check_broadcast_rgb_limited_cea_mode
[12:51:16] [PASSED] drm_test_check_broadcast_rgb_limited_cea_mode_vic_1
[12:51:16] ====== drm_test_check_broadcast_rgb_cea_mode_yuv420  =======
[12:51:16] [PASSED] Automatic
[12:51:16] [PASSED] Full
[12:51:16] [PASSED] Limited 16:235
[12:51:16] == [PASSED] drm_test_check_broadcast_rgb_cea_mode_yuv420 ===
[12:51:16] [PASSED] drm_test_check_broadcast_rgb_crtc_mode_changed
[12:51:16] [PASSED] drm_test_check_broadcast_rgb_crtc_mode_not_changed
[12:51:16] [PASSED] drm_test_check_disable_connector
[12:51:16] [PASSED] drm_test_check_hdmi_funcs_reject_rate
[12:51:16] [PASSED] drm_test_check_max_tmds_rate_bpc_fallback_rgb
[12:51:16] [PASSED] drm_test_check_max_tmds_rate_bpc_fallback_yuv420
[12:51:16] [PASSED] drm_test_check_max_tmds_rate_bpc_fallback_ignore_yuv422
[12:51:16] [PASSED] drm_test_check_max_tmds_rate_bpc_fallback_ignore_yuv420
[12:51:16] [PASSED] drm_test_check_driver_unsupported_fallback_yuv420
[12:51:16] [PASSED] drm_test_check_output_bpc_crtc_mode_changed
[12:51:16] [PASSED] drm_test_check_output_bpc_crtc_mode_not_changed
[12:51:16] [PASSED] drm_test_check_output_bpc_dvi
[12:51:16] [PASSED] drm_test_check_output_bpc_format_vic_1
[12:51:16] [PASSED] drm_test_check_output_bpc_format_display_8bpc_only
[12:51:16] [PASSED] drm_test_check_output_bpc_format_display_rgb_only
[12:51:16] [PASSED] drm_test_check_output_bpc_format_driver_8bpc_only
[12:51:16] [PASSED] drm_test_check_output_bpc_format_driver_rgb_only
[12:51:16] [PASSED] drm_test_check_tmds_char_rate_rgb_8bpc
[12:51:16] [PASSED] drm_test_check_tmds_char_rate_rgb_10bpc
[12:51:16] [PASSED] drm_test_check_tmds_char_rate_rgb_12bpc
[12:51:16] ===== [PASSED] drm_atomic_helper_connector_hdmi_check ======
[12:51:16] === drm_atomic_helper_connector_hdmi_reset (6 subtests) ====
[12:51:16] [PASSED] drm_test_check_broadcast_rgb_value
[12:51:16] [PASSED] drm_test_check_bpc_8_value
[12:51:16] [PASSED] drm_test_check_bpc_10_value
[12:51:16] [PASSED] drm_test_check_bpc_12_value
[12:51:16] [PASSED] drm_test_check_format_value
[12:51:16] [PASSED] drm_test_check_tmds_char_value
[12:51:16] ===== [PASSED] drm_atomic_helper_connector_hdmi_reset ======
[12:51:16] = drm_atomic_helper_connector_hdmi_mode_valid (4 subtests) =
[12:51:16] [PASSED] drm_test_check_mode_valid
[12:51:16] [PASSED] drm_test_check_mode_valid_reject
[12:51:16] [PASSED] drm_test_check_mode_valid_reject_rate
[12:51:16] [PASSED] drm_test_check_mode_valid_reject_max_clock
[12:51:16] === [PASSED] drm_atomic_helper_connector_hdmi_mode_valid ===
[12:51:16] = drm_atomic_helper_connector_hdmi_infoframes (5 subtests) =
[12:51:16] [PASSED] drm_test_check_infoframes
[12:51:16] [PASSED] drm_test_check_reject_avi_infoframe
[12:51:16] [PASSED] drm_test_check_reject_hdr_infoframe_bpc_8
[12:51:16] [PASSED] drm_test_check_reject_hdr_infoframe_bpc_10
[12:51:16] [PASSED] drm_test_check_reject_audio_infoframe
[12:51:16] === [PASSED] drm_atomic_helper_connector_hdmi_infoframes ===
[12:51:16] ================= drm_managed (2 subtests) =================
[12:51:16] [PASSED] drm_test_managed_release_action
[12:51:16] [PASSED] drm_test_managed_run_action
[12:51:16] =================== [PASSED] drm_managed ===================
[12:51:16] =================== drm_mm (6 subtests) ====================
[12:51:16] [PASSED] drm_test_mm_init
[12:51:16] [PASSED] drm_test_mm_debug
[12:51:16] [PASSED] drm_test_mm_align32
[12:51:16] [PASSED] drm_test_mm_align64
[12:51:16] [PASSED] drm_test_mm_lowest
[12:51:16] [PASSED] drm_test_mm_highest
[12:51:16] ===================== [PASSED] drm_mm ======================
[12:51:16] ============= drm_modes_analog_tv (5 subtests) =============
[12:51:16] [PASSED] drm_test_modes_analog_tv_mono_576i
[12:51:16] [PASSED] drm_test_modes_analog_tv_ntsc_480i
[12:51:16] [PASSED] drm_test_modes_analog_tv_ntsc_480i_inlined
[12:51:16] [PASSED] drm_test_modes_analog_tv_pal_576i
[12:51:16] [PASSED] drm_test_modes_analog_tv_pal_576i_inlined
[12:51:16] =============== [PASSED] drm_modes_analog_tv ===============
[12:51:16] ============== drm_plane_helper (2 subtests) ===============
[12:51:16] =============== drm_test_check_plane_state  ================
[12:51:16] [PASSED] clipping_simple
[12:51:16] [PASSED] clipping_rotate_reflect
[12:51:16] [PASSED] positioning_simple
[12:51:16] [PASSED] upscaling
[12:51:16] [PASSED] downscaling
[12:51:16] [PASSED] rounding1
[12:51:16] [PASSED] rounding2
[12:51:16] [PASSED] rounding3
[12:51:16] [PASSED] rounding4
[12:51:16] =========== [PASSED] drm_test_check_plane_state ============
[12:51:16] =========== drm_test_check_invalid_plane_state  ============
[12:51:16] [PASSED] positioning_invalid
[12:51:16] [PASSED] upscaling_invalid
[12:51:16] [PASSED] downscaling_invalid
[12:51:16] ======= [PASSED] drm_test_check_invalid_plane_state ========
[12:51:16] ================ [PASSED] drm_plane_helper =================
[12:51:16] ====== drm_connector_helper_tv_get_modes (1 subtest) =======
[12:51:16] ====== drm_test_connector_helper_tv_get_modes_check  =======
[12:51:16] [PASSED] None
[12:51:16] [PASSED] PAL
[12:51:16] [PASSED] NTSC
[12:51:16] [PASSED] Both, NTSC Default
[12:51:16] [PASSED] Both, PAL Default
[12:51:16] [PASSED] Both, NTSC Default, with PAL on command-line
[12:51:16] [PASSED] Both, PAL Default, with NTSC on command-line
[12:51:16] == [PASSED] drm_test_connector_helper_tv_get_modes_check ===
[12:51:16] ======== [PASSED] drm_connector_helper_tv_get_modes ========
[12:51:16] ================== drm_rect (9 subtests) ===================
[12:51:16] [PASSED] drm_test_rect_clip_scaled_div_by_zero
[12:51:16] [PASSED] drm_test_rect_clip_scaled_not_clipped
[12:51:16] [PASSED] drm_test_rect_clip_scaled_clipped
[12:51:16] [PASSED] drm_test_rect_clip_scaled_signed_vs_unsigned
[12:51:16] ================= drm_test_rect_intersect  =================
[12:51:16] [PASSED] top-left x bottom-right: 2x2+1+1 x 2x2+0+0
[12:51:16] [PASSED] top-right x bottom-left: 2x2+0+0 x 2x2+1-1
[12:51:16] [PASSED] bottom-left x top-right: 2x2+1-1 x 2x2+0+0
[12:51:16] [PASSED] bottom-right x top-left: 2x2+0+0 x 2x2+1+1
[12:51:16] [PASSED] right x left: 2x1+0+0 x 3x1+1+0
[12:51:16] [PASSED] left x right: 3x1+1+0 x 2x1+0+0
[12:51:16] [PASSED] up x bottom: 1x2+0+0 x 1x3+0-1
[12:51:16] [PASSED] bottom x up: 1x3+0-1 x 1x2+0+0
[12:51:16] [PASSED] touching corner: 1x1+0+0 x 2x2+1+1
[12:51:16] [PASSED] touching side: 1x1+0+0 x 1x1+1+0
[12:51:16] [PASSED] equal rects: 2x2+0+0 x 2x2+0+0
[12:51:16] [PASSED] inside another: 2x2+0+0 x 1x1+1+1
[12:51:16] [PASSED] far away: 1x1+0+0 x 1x1+3+6
[12:51:16] [PASSED] points intersecting: 0x0+5+10 x 0x0+5+10
[12:51:16] [PASSED] points not intersecting: 0x0+0+0 x 0x0+5+10
[12:51:16] ============= [PASSED] drm_test_rect_intersect =============
[12:51:16] ================ drm_test_rect_calc_hscale  ================
[12:51:16] [PASSED] normal use
[12:51:16] [PASSED] out of max range
[12:51:16] [PASSED] out of min range
[12:51:16] [PASSED] zero dst
[12:51:16] [PASSED] negative src
[12:51:16] [PASSED] negative dst
[12:51:16] ============ [PASSED] drm_test_rect_calc_hscale ============
[12:51:16] ================ drm_test_rect_calc_vscale  ================
[12:51:16] [PASSED] normal use
[12:51:16] [PASSED] out of max range
[12:51:16] [PASSED] out of min range
[12:51:16] [PASSED] zero dst
[12:51:16] [PASSED] negative src
[12:51:16] [PASSED] negative dst
[12:51:16] ============ [PASSED] drm_test_rect_calc_vscale ============
[12:51:16] ================== drm_test_rect_rotate  ===================
[12:51:16] [PASSED] reflect-x
[12:51:16] [PASSED] reflect-y
[12:51:16] [PASSED] rotate-0
[12:51:16] [PASSED] rotate-90
[12:51:16] [PASSED] rotate-180
[12:51:16] [PASSED] rotate-270
[12:51:16] ============== [PASSED] drm_test_rect_rotate ===============
[12:51:16] ================ drm_test_rect_rotate_inv  =================
[12:51:16] [PASSED] reflect-x
[12:51:16] [PASSED] reflect-y
[12:51:16] [PASSED] rotate-0
[12:51:16] [PASSED] rotate-90
[12:51:16] [PASSED] rotate-180
[12:51:16] [PASSED] rotate-270
[12:51:16] ============ [PASSED] drm_test_rect_rotate_inv =============
[12:51:16] ==================== [PASSED] drm_rect =====================
[12:51:16] ============ drm_sysfb_modeset_test (1 subtest) ============
[12:51:16] ============ drm_test_sysfb_build_fourcc_list  =============
[12:51:16] [PASSED] no native formats
[12:51:16] [PASSED] XRGB8888 as native format
[12:51:16] [PASSED] remove duplicates
[12:51:16] [PASSED] convert alpha formats
[12:51:16] [PASSED] random formats
[12:51:16] ======== [PASSED] drm_test_sysfb_build_fourcc_list =========
[12:51:16] ============= [PASSED] drm_sysfb_modeset_test ==============
[12:51:16] ================== drm_fixp (2 subtests) ===================
[12:51:16] [PASSED] drm_test_int2fixp
[12:51:16] [PASSED] drm_test_sm2fixp
[12:51:16] ==================== [PASSED] drm_fixp =====================
[12:51:16] ============================================================
[12:51:16] Testing complete. Ran 621 tests: passed: 621
[12:51:16] Elapsed time: 26.215s total, 1.789s configuring, 24.303s building, 0.122s running

+ /kernel/tools/testing/kunit/kunit.py run --kunitconfig /kernel/drivers/gpu/drm/ttm/tests/.kunitconfig
[12:51:16] Configuring KUnit Kernel ...
Regenerating .config ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
[12:51:18] Building KUnit Kernel ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
Building with:
$ make all compile_commands.json scripts_gdb ARCH=um O=.kunit --jobs=48
[12:51:28] Starting KUnit Kernel (1/1)...
[12:51:28] ============================================================
Running tests with:
$ .kunit/linux kunit.enable=1 mem=1G console=tty kunit_shutdown=halt
[12:51:28] ================= ttm_device (5 subtests) ==================
[12:51:28] [PASSED] ttm_device_init_basic
[12:51:28] [PASSED] ttm_device_init_multiple
[12:51:28] [PASSED] ttm_device_fini_basic
[12:51:28] [PASSED] ttm_device_init_no_vma_man
[12:51:28] ================== ttm_device_init_pools  ==================
[12:51:28] [PASSED] No DMA allocations, no DMA32 required
[12:51:28] [PASSED] DMA allocations, DMA32 required
[12:51:28] [PASSED] No DMA allocations, DMA32 required
[12:51:28] [PASSED] DMA allocations, no DMA32 required
[12:51:28] ============== [PASSED] ttm_device_init_pools ==============
[12:51:28] =================== [PASSED] ttm_device ====================
[12:51:28] ================== ttm_pool (8 subtests) ===================
[12:51:28] ================== ttm_pool_alloc_basic  ===================
[12:51:28] [PASSED] One page
[12:51:28] [PASSED] More than one page
[12:51:28] [PASSED] Above the allocation limit
[12:51:28] [PASSED] One page, with coherent DMA mappings enabled
[12:51:28] [PASSED] Above the allocation limit, with coherent DMA mappings enabled
[12:51:28] ============== [PASSED] ttm_pool_alloc_basic ===============
[12:51:28] ============== ttm_pool_alloc_basic_dma_addr  ==============
[12:51:28] [PASSED] One page
[12:51:28] [PASSED] More than one page
[12:51:28] [PASSED] Above the allocation limit
[12:51:28] [PASSED] One page, with coherent DMA mappings enabled
[12:51:28] [PASSED] Above the allocation limit, with coherent DMA mappings enabled
[12:51:28] ========== [PASSED] ttm_pool_alloc_basic_dma_addr ==========
[12:51:28] [PASSED] ttm_pool_alloc_order_caching_match
[12:51:28] [PASSED] ttm_pool_alloc_caching_mismatch
[12:51:28] [PASSED] ttm_pool_alloc_order_mismatch
[12:51:28] [PASSED] ttm_pool_free_dma_alloc
[12:51:28] [PASSED] ttm_pool_free_no_dma_alloc
[12:51:28] [PASSED] ttm_pool_fini_basic
[12:51:28] ==================== [PASSED] ttm_pool =====================
[12:51:28] ================ ttm_resource (8 subtests) =================
[12:51:28] ================= ttm_resource_init_basic  =================
[12:51:28] [PASSED] Init resource in TTM_PL_SYSTEM
[12:51:28] [PASSED] Init resource in TTM_PL_VRAM
[12:51:28] [PASSED] Init resource in a private placement
[12:51:28] [PASSED] Init resource in TTM_PL_SYSTEM, set placement flags
[12:51:28] ============= [PASSED] ttm_resource_init_basic =============
[12:51:28] [PASSED] ttm_resource_init_pinned
[12:51:28] [PASSED] ttm_resource_fini_basic
[12:51:28] [PASSED] ttm_resource_manager_init_basic
[12:51:28] [PASSED] ttm_resource_manager_usage_basic
[12:51:28] [PASSED] ttm_resource_manager_set_used_basic
[12:51:28] [PASSED] ttm_sys_man_alloc_basic
[12:51:28] [PASSED] ttm_sys_man_free_basic
[12:51:28] ================== [PASSED] ttm_resource ===================
[12:51:28] =================== ttm_tt (15 subtests) ===================
[12:51:28] ==================== ttm_tt_init_basic  ====================
[12:51:28] [PASSED] Page-aligned size
[12:51:28] [PASSED] Extra pages requested
[12:51:28] ================ [PASSED] ttm_tt_init_basic ================
[12:51:28] [PASSED] ttm_tt_init_misaligned
[12:51:28] [PASSED] ttm_tt_fini_basic
[12:51:28] [PASSED] ttm_tt_fini_sg
[12:51:28] [PASSED] ttm_tt_fini_shmem
[12:51:28] [PASSED] ttm_tt_create_basic
[12:51:28] [PASSED] ttm_tt_create_invalid_bo_type
[12:51:28] [PASSED] ttm_tt_create_ttm_exists
[12:51:28] [PASSED] ttm_tt_create_failed
[12:51:28] [PASSED] ttm_tt_destroy_basic
[12:51:28] [PASSED] ttm_tt_populate_null_ttm
[12:51:28] [PASSED] ttm_tt_populate_populated_ttm
[12:51:28] [PASSED] ttm_tt_unpopulate_basic
[12:51:28] [PASSED] ttm_tt_unpopulate_empty_ttm
[12:51:28] [PASSED] ttm_tt_swapin_basic
[12:51:28] ===================== [PASSED] ttm_tt ======================
[12:51:28] =================== ttm_bo (14 subtests) ===================
[12:51:28] =========== ttm_bo_reserve_optimistic_no_ticket  ===========
[12:51:28] [PASSED] Cannot be interrupted and sleeps
[12:51:28] [PASSED] Cannot be interrupted, locks straight away
[12:51:28] [PASSED] Can be interrupted, sleeps
[12:51:28] ======= [PASSED] ttm_bo_reserve_optimistic_no_ticket =======
[12:51:28] [PASSED] ttm_bo_reserve_locked_no_sleep
[12:51:28] [PASSED] ttm_bo_reserve_no_wait_ticket
[12:51:28] [PASSED] ttm_bo_reserve_double_resv
[12:51:28] [PASSED] ttm_bo_reserve_interrupted
[12:51:28] [PASSED] ttm_bo_reserve_deadlock
[12:51:28] [PASSED] ttm_bo_unreserve_basic
[12:51:28] [PASSED] ttm_bo_unreserve_pinned
[12:51:28] [PASSED] ttm_bo_unreserve_bulk
[12:51:28] [PASSED] ttm_bo_fini_basic
[12:51:28] [PASSED] ttm_bo_fini_shared_resv
[12:51:28] [PASSED] ttm_bo_pin_basic
[12:51:28] [PASSED] ttm_bo_pin_unpin_resource
[12:51:28] [PASSED] ttm_bo_multiple_pin_one_unpin
[12:51:28] ===================== [PASSED] ttm_bo ======================
[12:51:28] ============== ttm_bo_validate (22 subtests) ===============
[12:51:28] ============== ttm_bo_init_reserved_sys_man  ===============
[12:51:28] [PASSED] Buffer object for userspace
[12:51:28] [PASSED] Kernel buffer object
[12:51:28] [PASSED] Shared buffer object
[12:51:28] ========== [PASSED] ttm_bo_init_reserved_sys_man ===========
[12:51:28] ============== ttm_bo_init_reserved_mock_man  ==============
[12:51:28] [PASSED] Buffer object for userspace
[12:51:28] [PASSED] Kernel buffer object
[12:51:28] [PASSED] Shared buffer object
[12:51:28] ========== [PASSED] ttm_bo_init_reserved_mock_man ==========
[12:51:28] [PASSED] ttm_bo_init_reserved_resv
[12:51:28] ================== ttm_bo_validate_basic  ==================
[12:51:28] [PASSED] Buffer object for userspace
[12:51:28] [PASSED] Kernel buffer object
[12:51:28] [PASSED] Shared buffer object
[12:51:28] ============== [PASSED] ttm_bo_validate_basic ==============
[12:51:28] [PASSED] ttm_bo_validate_invalid_placement
[12:51:28] ============= ttm_bo_validate_same_placement  ==============
[12:51:28] [PASSED] System manager
[12:51:28] [PASSED] VRAM manager
[12:51:28] ========= [PASSED] ttm_bo_validate_same_placement ==========
[12:51:28] [PASSED] ttm_bo_validate_failed_alloc
[12:51:28] [PASSED] ttm_bo_validate_pinned
[12:51:28] [PASSED] ttm_bo_validate_busy_placement
[12:51:28] ================ ttm_bo_validate_multihop  =================
[12:51:28] [PASSED] Buffer object for userspace
[12:51:28] [PASSED] Kernel buffer object
[12:51:28] [PASSED] Shared buffer object
[12:51:28] ============ [PASSED] ttm_bo_validate_multihop =============
[12:51:28] ========== ttm_bo_validate_no_placement_signaled  ==========
[12:51:28] [PASSED] Buffer object in system domain, no page vector
[12:51:28] [PASSED] Buffer object in system domain with an existing page vector
[12:51:28] ====== [PASSED] ttm_bo_validate_no_placement_signaled ======
[12:51:28] ======== ttm_bo_validate_no_placement_not_signaled  ========
[12:51:28] [PASSED] Buffer object for userspace
[12:51:28] [PASSED] Kernel buffer object
[12:51:28] [PASSED] Shared buffer object
[12:51:28] ==== [PASSED] ttm_bo_validate_no_placement_not_signaled ====
[12:51:28] [PASSED] ttm_bo_validate_move_fence_signaled
[12:51:28] ========= ttm_bo_validate_move_fence_not_signaled  =========
[12:51:28] [PASSED] Waits for GPU
[12:51:28] [PASSED] Tries to lock straight away
[12:51:28] ===== [PASSED] ttm_bo_validate_move_fence_not_signaled =====
[12:51:28] [PASSED] ttm_bo_validate_swapout
[12:51:28] [PASSED] ttm_bo_validate_happy_evict
[12:51:28] [PASSED] ttm_bo_validate_all_pinned_evict
[12:51:28] [PASSED] ttm_bo_validate_allowed_only_evict
[12:51:28] [PASSED] ttm_bo_validate_deleted_evict
[12:51:28] [PASSED] ttm_bo_validate_busy_domain_evict
[12:51:28] [PASSED] ttm_bo_validate_evict_gutting
[12:51:28] [PASSED] ttm_bo_validate_recrusive_evict
[12:51:28] ================= [PASSED] ttm_bo_validate =================
[12:51:28] ============================================================
[12:51:28] Testing complete. Ran 102 tests: passed: 102
[12:51:28] Elapsed time: 11.579s total, 1.779s configuring, 9.585s building, 0.179s running

+ cleanup
++ stat -c %u:%g /kernel
+ chown -R 1003:1003 /kernel

✓ Xe.CI.BAT: success for don't allow changes to inactive colorops (rev3)

[Patchwork]

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== Series Details ==

Series: don't allow changes to inactive colorops (rev3)
URL   : https://patchwork.freedesktop.org/series/167294/
State : success

== Summary ==

CI Bug Log - changes from xe-5225-1e8798282ef0590ad21ca33d80e225208d9c7864_BAT -> xe-pw-167294v3_BAT
====================================================

Summary
-------

  **SUCCESS**

  No regressions found.

  

Participating hosts (13 -> 13)
------------------------------

  No changes in participating hosts


Changes
-------

  No changes found


Build changes
-------------

  * Linux: xe-5225-1e8798282ef0590ad21ca33d80e225208d9c7864 -> xe-pw-167294v3

  IGT_8955: 8955
  xe-5225-1e8798282ef0590ad21ca33d80e225208d9c7864: 1e8798282ef0590ad21ca33d80e225208d9c7864
  xe-pw-167294v3: 167294v3

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-167294v3/index.html

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✓ i915.CI.BAT: success for don't allow changes to inactive colorops (rev3)

[Patchwork]

[-- Attachment #1: Type: text/plain, Size: 1006 bytes --]

== Series Details ==

Series: don't allow changes to inactive colorops (rev3)
URL   : https://patchwork.freedesktop.org/series/167293/
State : success

== Summary ==

CI Bug Log - changes from CI_DRM_18648 -> Patchwork_167293v3
====================================================

Summary
-------

  **SUCCESS**

  No regressions found.

  External URL: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_167293v3/index.html

Participating hosts (42 -> 40)
------------------------------

  Missing    (2): bat-dg2-13 fi-snb-2520m 


Changes
-------

  No changes found


Build changes
-------------

  * Linux: CI_DRM_18648 -> Patchwork_167293v3

  CI-20190529: 20190529
  CI_DRM_18648: 1e8798282ef0590ad21ca33d80e225208d9c7864 @ git://anongit.freedesktop.org/gfx-ci/linux
  IGT_8955: 8955
  Patchwork_167293v3: 1e8798282ef0590ad21ca33d80e225208d9c7864 @ git://anongit.freedesktop.org/gfx-ci/linux

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_167293v3/index.html

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