Re: [PATCH v3 4/6] cxl/test: Add hierarchy enumeration support for type2 device

[sashiko-bot@kernel.org]

Thank you for your contribution! Sashiko AI review found 1 potential issue(s) to consider:
- [Medium] Teardown loops iterate backwards but incorrectly use `break` when encountering a NULL pointer, causing persistent resource leaks on error paths.
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commit 53bf17c5a72c46ea341694a714ad1ee38917639a
Author: Dave Jiang <dave.jiang@intel.com>

cxl/test: Add hierarchy enumeration support for type2 device

Add enumeration of type2 device hierarchy in cxl-test. The type2 device
is setup to be directly attached to a root port instead of rp -> switch
-> device that type3 hierarchy is setup..

> diff --git a/tools/testing/cxl/test/cxl.c b/tools/testing/cxl/test/cxl.c
> index b29be2597064e..5186a13b20aa9 100644
> --- a/tools/testing/cxl/test/cxl.c
> +++ b/tools/testing/cxl/test/cxl.c
[ ... ]
> +static int cxl_type2_mem_init(void)
> +{
> +	int i, rc;
[ ... ]
> +err_mem:
> +	for (i = NR_CXL_TYPE2_ACCEL - 1; i >= 0; i--) {
> +		struct platform_device *pdev = cxl_mem[i];
> +
> +		if (!pdev)
> +			break;
> +		platform_device_unregister(cxl_mem[i]);
> +	}
> +	return rc;
>  }

[Severity: Medium]
Will this teardown loop leak successfully allocated devices if an error
occurs before all iterations complete?

Because cxl_mem is populated sequentially starting from index 0, the higher
indices remain NULL if initialization fails partway through. Since this
teardown loop iterates backwards from the max index, it will immediately
hit an uninitialized NULL pointer at the top and break. This skips the
unregistration for any devices that were successfully allocated at lower
indices.

Could this use continue instead of break? Alternatively, since
platform_device_unregister() handles NULL pointers safely, could the check
be omitted entirely?

This same pattern appears in cxl_type2_mem_exit() and cxl_type3_mem_exit()
in this patch, as well as in pre-existing teardown loops like
cxl_usps_remove().

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Sashiko AI review · https://sashiko.dev/#/patchset/20260610222328.2272427-1-dave.jiang@intel.com?part=4