Re: [PATCH v4 5/6] cxl/test: Fixup hdm init for auto region to support type2

[sashiko-bot@kernel.org]

Thank you for your contribution! Sashiko AI review found 1 potential issue(s) to consider:

Pre-existing issues:
- [Medium] Concurrent modification of shared switch/root decoders and their registry entries without synchronization.
--

commit 7bae93279b06918f3ff41cc5d5704995d896c3cb
Author: Dave Jiang <dave.jiang@intel.com>

cxl/test: Fixup hdm init for auto region to support type2
    
Add support to setup initialization of decoders in order to support type2
auto region.

> diff --git a/tools/testing/cxl/test/cxl.c b/tools/testing/cxl/test/cxl.c
> index de4124afa1328..0310f2efd3319 100644
> --- a/tools/testing/cxl/test/cxl.c
> +++ b/tools/testing/cxl/test/cxl.c
[ ... ]
> @@ -1239,7 +1287,76 @@ static bool mock_init_hdm_decoder(struct cxl_decoder *cxld)
>  		cxld_registry_update(cxld);

[Severity: Medium]
This is a pre-existing issue, but is there a potential data race here?

Because cxl_mem.0 and cxl_mem.4 are probed asynchronously, both threads
can reach mock_init_hdm_type3_cxled() concurrently. They both look up the
shared upstream switch and root port decoders via device_find_child(),
and then simultaneously modify shared fields like cxlsd->target[] and
call cxld_registry_update(cxld).

Could this lack of mutual exclusion corrupt the mock cxld state via
non-atomic writes or concurrent registry updates?

>  		put_device(dev);
>  	}
> +}

-- 
Sashiko AI review · https://sashiko.dev/#/patchset/20260611152124.3656434-1-dave.jiang@intel.com?part=5