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[80.230.85.71]) by smtp.gmail.com with ESMTPSA id 5b1f17b1804b1-490e2c7ead0sm105147645e9.3.2026.06.11.14.15.51 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 11 Jun 2026 14:15:52 -0700 (PDT) Date: Thu, 11 Jun 2026 17:15:50 -0400 From: "Michael S. Tsirkin" To: Peter Maydell Cc: Gavin Shan , Peter Xu , Pavel Hrdina , Daniel =?iso-8859-1?Q?P=2E_Berrang=E9?= , qemu-devel@nongnu.org, qemu-arm@nongnu.org, jugraham@redhat.com, shan.gavin@gmail.com, Alex Williamson , David Hildenbrand Subject: Re: [PATCH RFCv1] virtio: Inherit max bounce buffer size from bus parent if possible Message-ID: <20260611171353-mutt-send-email-mst@kernel.org> References: <20260611093049-mutt-send-email-mst@kernel.org> <20260611110156-mutt-send-email-mst@kernel.org> <20260611114811-mutt-send-email-mst@kernel.org> <20260611123952-mutt-send-email-mst@kernel.org> <20260611130037-mutt-send-email-mst@kernel.org> MIME-Version: 1.0 In-Reply-To: <20260611130037-mutt-send-email-mst@kernel.org> X-Mimecast-Spam-Score: 0 X-Mimecast-MFC-PROC-ID: cEmSiC_zHld211yjnvCRAAIZ7DB6ZgFAQRdtR58YNHk_1781212555 X-Mimecast-Originator: redhat.com Content-Type: text/plain; charset=us-ascii Content-Disposition: inline Received-SPF: pass client-ip=170.10.129.124; envelope-from=mst@redhat.com; helo=us-smtp-delivery-124.mimecast.com X-Spam_score_int: -24 X-Spam_score: -2.5 X-Spam_bar: -- X-Spam_report: (-2.5 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=-0.445, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, RCVD_IN_MSPIKE_H3=0.001, RCVD_IN_MSPIKE_WL=0.001, SPF_HELO_PASS=-0.001, SPF_PASS=-0.001 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-arm@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-arm-bounces+qemu-arm=archiver.kernel.org@nongnu.org Sender: qemu-arm-bounces+qemu-arm=archiver.kernel.org@nongnu.org On Thu, Jun 11, 2026 at 01:02:39PM -0400, Michael S. Tsirkin wrote: > On Thu, Jun 11, 2026 at 05:53:54PM +0100, Peter Maydell wrote: > > On Thu, 11 Jun 2026 at 17:42, Michael S. Tsirkin wrote: > > > > > > On Thu, Jun 11, 2026 at 05:16:09PM +0100, Peter Maydell wrote: > > > > On Thu, 11 Jun 2026 at 16:57, Michael S. Tsirkin wrote: > > > > > Then I'd like to see an example where we have an actual good reason > > > > > to do execute arbitrary width accesses on device RAM when the > > > > > driver does not execute them, please. > > > > > > > > That's the case we started with, with this GPU where the > > > > virtio data structures are in this PCI BAR. We want the > > > > virtio backend to have the freedom to say "I'm just going > > > > to assume the ring buffer etc is in RAM, and I don't need to > > > > care about carefully ensuring that I only do word accesses". > > > > > > virtio backend does not need to assume anything. any spec > > > compliant guest guarantees it. any address given to > > > a virtio device is ram. > > > > OK, but how do we tell if the mmap() PCI BAR we have is RAM > > or not ? Some of them are, some of them aren't... > > > > -- PMM > > We don't care? If guest asked a virtio device to access > memory then that memory better support accesses guest > requested, and on virtio that means any width. And by the way, current "direct access" code that translates a fixed width guest access to a variable length memcpy, resulting by byte accesses - is broken for everything, including RAM, because guests expect atomicity. -- MST