From: Stefan Hajnoczi <stefanha@redhat.com>
To: Peter Maydell <peter.maydell@linaro.org>
Cc: qemu-devel@nongnu.org
Subject: Re: [PULL 00/71] target-arm queue
Date: Thu, 11 Jun 2026 15:16:46 -0400 [thread overview]
Message-ID: <20260611191646.GA228482@fedora> (raw)
In-Reply-To: <20260610161202.2235298-1-peter.maydell@linaro.org>
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Applied, thanks.
Please update the changelog at https://wiki.qemu.org/ChangeLog/11.1 for any user-visible changes.
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prev parent reply other threads:[~2026-06-11 19:17 UTC|newest]
Thread overview: 73+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-06-10 16:10 [PULL 00/71] target-arm queue Peter Maydell
2026-06-10 16:10 ` [PULL 01/71] hw/core/qdev-clock: Fix potential null pointer dereference Peter Maydell
2026-06-10 16:10 ` [PULL 02/71] target/arm: implement MTE_PERM Peter Maydell
2026-06-10 16:10 ` [PULL 03/71] target/arm: add TCSO bitmasks to SCTLR Peter Maydell
2026-06-10 16:10 ` [PULL 04/71] target/arm: mte_check unemitted on STORE_ONLY load Peter Maydell
2026-06-10 16:10 ` [PULL 05/71] linux-user: add MTE_STORE_ONLY to prctl Peter Maydell
2026-06-10 16:10 ` [PULL 06/71] target/arm: emit tag check when MTX without TBI Peter Maydell
2026-06-10 16:10 ` [PULL 07/71] target/arm: add MTX to MTEDESC and DisasContext Peter Maydell
2026-06-10 16:10 ` [PULL 08/71] target/arm: add canonical tag check helper Peter Maydell
2026-06-10 16:11 ` [PULL 09/71] target/arm: add canonical MTE check logic Peter Maydell
2026-06-10 16:11 ` [PULL 10/71] target/arm: load on canonical tag loads ext bits Peter Maydell
2026-06-10 16:11 ` [PULL 11/71] target/arm: fault on tag store to canonical tag Peter Maydell
2026-06-10 16:11 ` [PULL 12/71] target/arm: skip tag bit bounds check if MTX is on Peter Maydell
2026-06-10 16:11 ` [PULL 13/71] target/arm: tag is not a part of PAuth with MTX Peter Maydell
2026-06-10 16:11 ` [PULL 14/71] docs: add MTE4 features to docs Peter Maydell
2026-06-10 16:11 ` [PULL 15/71] tests/tcg: add test for MTE FAR Peter Maydell
2026-06-10 16:11 ` [PULL 16/71] tests/tcg: add test for MTE_STORE_ONLY Peter Maydell
2026-06-10 16:11 ` [PULL 17/71] hw/usb/hcd-ohci: Assert isochronous TDs are never deferred Peter Maydell
2026-06-10 16:11 ` [PULL 18/71] hw/usb/hcd-ohci: Clean up USBPacket before freeing ISO TD packet Peter Maydell
2026-06-10 16:11 ` [PULL 19/71] target/arm: fix WFET typo in syndrome Peter Maydell
2026-06-10 16:11 ` [PULL 20/71] target/arm: teach arm_cpu_has_work about halting reasons Peter Maydell
2026-06-10 16:11 ` [PULL 21/71] target/arm: redefine event stream fields Peter Maydell
2026-06-10 16:11 ` [PULL 22/71] target/arm: ensure aarch64 DISAS_WFE will exit Peter Maydell
2026-06-10 16:11 ` [PULL 23/71] hw/intc/exynos4210_combiner: Avoid hw_error for guest errors Peter Maydell
2026-06-10 16:11 ` [PULL 24/71] hw/dma/pl080: Don't use hw_error() for unimplemented features Peter Maydell
2026-06-10 16:11 ` [PULL 25/71] fpu: Handle all rounding modes in partsN_uncanon_normal Peter Maydell
2026-06-10 16:11 ` [PULL 26/71] fpu: Handle all rounding modes in partsN_round_to_int_normal Peter Maydell
2026-06-10 16:11 ` [PULL 27/71] target/arm: Use FloatParts64 in bfdotadd_ebf Peter Maydell
2026-06-10 16:11 ` [PULL 28/71] target/arm: Drop oddstatus from is_ebf and bfdotadd_ebf Peter Maydell
2026-06-10 16:11 ` [PULL 29/71] target/arm: Use FloatParts64 in f16_dotadd Peter Maydell
2026-06-10 16:11 ` [PULL 30/71] target/arm: Generalize TRANS_FEAT_STREAMING_SME2 Peter Maydell
2026-06-10 16:11 ` [PULL 31/71] target/arm: Introduce arm_init_fp_status Peter Maydell
2026-06-10 16:11 ` [PULL 32/71] target/arm: Set e4m3_nan_is_snan Peter Maydell
2026-06-10 16:11 ` [PULL 33/71] target/arm: Implement BF1CVTL, BF1CVTL2, BF2CVTL, BF2CVTL2 for AdvSIMD Peter Maydell
2026-06-10 16:11 ` [PULL 34/71] target/arm: Implement BF1CVT, BF1CVTLT, BF2CVT, BF2CVTLT for SVE Peter Maydell
2026-06-10 16:11 ` [PULL 35/71] target/arm: Rename SME BFCVT patterns to BFCVT_hs Peter Maydell
2026-06-10 16:11 ` [PULL 36/71] target/arm: Implement BF1CVT, BF1CVTL, BF2CVT, BF2CVTL for SME Peter Maydell
2026-06-10 16:11 ` [PULL 37/71] target/arm: Implement F1CVTL, F1CVTL2, F2CVTL, F2CVTL2 for AdvSIMD Peter Maydell
2026-06-10 16:11 ` [PULL 38/71] target/arm: Implement F1CVT, F1CVTLT, F2CVT, F2CVTLT for SVE Peter Maydell
2026-06-10 16:11 ` [PULL 39/71] target/arm: Implement F1CVT, F1CVTL, F2CVT, F2CVTL for SME Peter Maydell
2026-06-10 16:11 ` [PULL 40/71] target/arm: Implement BFCVTN for SVE Peter Maydell
2026-06-10 16:11 ` [PULL 41/71] target/arm: Implement FCVTN (16- to 8-bit fp) for AdvSIMD Peter Maydell
2026-06-10 16:11 ` [PULL 42/71] target/arm: Implement FCVTN, FCVTN2 (32- " Peter Maydell
2026-06-10 16:11 ` [PULL 43/71] target/arm: Implement FCVTN (16- to 8-bit fp) for SVE Peter Maydell
2026-06-10 16:11 ` [PULL 44/71] target/arm: Implement FCVTNB, FCVTNT " Peter Maydell
2026-06-10 16:11 ` [PULL 45/71] target/arm: Implement FCVT (FP16 to FP8) for SME Peter Maydell
2026-06-10 16:11 ` [PULL 46/71] target/arm: Implement FCVT, FCVTN (FP32 " Peter Maydell
2026-06-10 16:11 ` [PULL 47/71] target/arm: Implement LUTI2, LUTI4 for AdvSIMD Peter Maydell
2026-06-10 16:11 ` [PULL 48/71] target/arm: Implement LUTI2, LUTI4 for SVE Peter Maydell
2026-06-10 16:11 ` [PULL 49/71] target/arm: Enable FEAT_LUT for -cpu max Peter Maydell
2026-06-10 16:11 ` [PULL 50/71] target/arm: Enable FEAT_FP8 " Peter Maydell
2026-06-10 16:11 ` [PULL 51/71] target/arm: Update ID_AA64SMFR0_EL1 fields to ARM M.b Peter Maydell
2026-06-10 16:11 ` [PULL 52/71] target/arm: Implement MOVT (vector to table) Peter Maydell
2026-06-10 16:11 ` [PULL 53/71] target/arm: Implement LUTI4 (four registers, 8-bit) Peter Maydell
2026-06-10 16:11 ` [PULL 54/71] target/arm: Enable FEAT_SME_LUTv2 for -cpu max Peter Maydell
2026-06-10 16:11 ` [PULL 55/71] target/arm: Implement FMLALB, FMLALT for AdvSIMD Peter Maydell
2026-06-10 16:11 ` [PULL 56/71] target/arm: Implement FMLALB, FMLALT (FP8 to FP16) for SVE Peter Maydell
2026-06-10 16:11 ` [PULL 57/71] target/arm: Implement FMLALL{BB, BT, TB, TT} for AdvSIMD Peter Maydell
2026-06-10 16:11 ` [PULL 58/71] target/arm: Implement FMLALL{BB,BT,TB,TT} for SVE Peter Maydell
2026-06-10 16:11 ` [PULL 59/71] target/arm: Enable FEAT_FP8FMA, FEAT_SSVE_FP8FMA for -cpu max Peter Maydell
2026-06-10 16:11 ` [PULL 60/71] target/arm: Implement FDOT (FP8 to FP32) for AdvSIMD Peter Maydell
2026-06-10 16:11 ` [PULL 61/71] target/arm: Implement FDOT (FP8 to FP32) for SVE Peter Maydell
2026-06-10 16:11 ` [PULL 62/71] target/arm: Enable FEAT_FP8DOT4, FEAT_SSVE_FP8DOT4 for -cpu max Peter Maydell
2026-06-10 16:11 ` [PULL 63/71] target/arm: Implement FDOT (FP8 to FP16) for AdvSIMD Peter Maydell
2026-06-10 16:11 ` [PULL 64/71] target/arm: Implement FDOT (FP8 to FP16) for SVE Peter Maydell
2026-06-10 16:11 ` [PULL 65/71] target/arm: Enable FEAT_FP8DOT2, FEAT_SSVE_FP8DOT2 for -cpu max Peter Maydell
2026-06-10 16:11 ` [PULL 66/71] target/arm: Implement FMMLA (FP8 to FP32) for AdvSIMD Peter Maydell
2026-06-10 16:11 ` [PULL 67/71] target/arm: Implement FMMLA (FP8 to FP32) for SVE Peter Maydell
2026-06-10 16:11 ` [PULL 68/71] target/arm: Enable FEAT_F8F32MM for -cpu max Peter Maydell
2026-06-10 16:12 ` [PULL 69/71] target/arm: Implement FMMLA (FP8 to FP16) for AdvSIMD Peter Maydell
2026-06-10 16:12 ` [PULL 70/71] target/arm: Implement FMMLA (FP8 to FP16) for SVE Peter Maydell
2026-06-10 16:12 ` [PULL 71/71] target/arm: Enable FEAT_F8F16MM for -cpu max Peter Maydell
2026-06-11 19:16 ` Stefan Hajnoczi [this message]
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