[nsa:xlnx/fix/buf-mmap-multibuffer 19282/27391] drivers/clk/clk-adjustable-rate.c:166: warning: expecting prototype for of_adjustable_clk_setup(). Prototype was for _of_adjustable_clk_setup() instead

[kernel test robot <lkp@intel.com>]

tree:   https://github.com/nunojsa/linux xlnx/fix/buf-mmap-multibuffer
head:   a26a8baba71e866951f6abf4fc6c0504770c272e
commit: 67d89797e6b7e313f93f3683f7dd0479895ee9b0 [19282/27391] Merge tag 'xilinx-v2021.1' of https://github.com/Xilinx/linux-xlnx.git
config: csky-allnoconfig (https://download.01.org/0day-ci/archive/20260612/202606121711.8pM5bINT-lkp@intel.com/config)
compiler: csky-linux-gcc (GCC) 16.1.0
reproduce (this is a W=1 build): (https://download.01.org/0day-ci/archive/20260612/202606121711.8pM5bINT-lkp@intel.com/reproduce)

If you fix the issue in a separate patch/commit (i.e. not just a new version of
the same patch/commit), kindly add following tags
| Reported-by: kernel test robot <lkp@intel.com>
| Closes: https://lore.kernel.org/oe-kbuild-all/202606121711.8pM5bINT-lkp@intel.com/

All warnings (new ones prefixed by >>):

   drivers/clk/clk-adjustable-rate.c:166: warning: Function parameter or member 'node' not described in '_of_adjustable_clk_setup'
>> drivers/clk/clk-adjustable-rate.c:166: warning: expecting prototype for of_adjustable_clk_setup(). Prototype was for _of_adjustable_clk_setup() instead


vim +166 drivers/clk/clk-adjustable-rate.c

32d85645476ed0 Michael Hennerich 2016-10-18  160  
32d85645476ed0 Michael Hennerich 2016-10-18  161  #ifdef CONFIG_OF
32d85645476ed0 Michael Hennerich 2016-10-18  162  /**
32d85645476ed0 Michael Hennerich 2016-10-18  163   * of_adjustable_clk_setup() - Setup function for simple adjustable rate clock
32d85645476ed0 Michael Hennerich 2016-10-18  164   */
32d85645476ed0 Michael Hennerich 2016-10-18  165  struct clk *_of_adjustable_clk_setup(struct device_node *node)
32d85645476ed0 Michael Hennerich 2016-10-18 @166  {
32d85645476ed0 Michael Hennerich 2016-10-18  167  	struct clk *clk;
32d85645476ed0 Michael Hennerich 2016-10-18  168  	const char *clk_name = node->name;
32d85645476ed0 Michael Hennerich 2016-10-18  169  	u32 rate;
32d85645476ed0 Michael Hennerich 2016-10-18  170  	u32 accuracy = 0;
32d85645476ed0 Michael Hennerich 2016-10-18  171  	int ret;
32d85645476ed0 Michael Hennerich 2016-10-18  172  
32d85645476ed0 Michael Hennerich 2016-10-18  173  	if (of_property_read_u32(node, "clock-frequency", &rate))
32d85645476ed0 Michael Hennerich 2016-10-18  174  		return ERR_PTR(-EIO);
32d85645476ed0 Michael Hennerich 2016-10-18  175  
32d85645476ed0 Michael Hennerich 2016-10-18  176  	if (of_property_read_u32(node, "clock-accuracy", &accuracy))
32d85645476ed0 Michael Hennerich 2016-10-18  177  		return ERR_PTR(-EIO);
32d85645476ed0 Michael Hennerich 2016-10-18  178  
32d85645476ed0 Michael Hennerich 2016-10-18  179  	of_property_read_string(node, "clock-output-names", &clk_name);
32d85645476ed0 Michael Hennerich 2016-10-18  180  
32d85645476ed0 Michael Hennerich 2016-10-18  181  	clk = clk_register_adjustable_rate_with_accuracy(NULL, clk_name, NULL,
32d85645476ed0 Michael Hennerich 2016-10-18  182  						    0, rate, accuracy);
32d85645476ed0 Michael Hennerich 2016-10-18  183  	if (IS_ERR(clk))
32d85645476ed0 Michael Hennerich 2016-10-18  184  		return clk;
32d85645476ed0 Michael Hennerich 2016-10-18  185  
32d85645476ed0 Michael Hennerich 2016-10-18  186  	ret = of_clk_add_provider(node, of_clk_src_simple_get, clk);
32d85645476ed0 Michael Hennerich 2016-10-18  187  	if (ret) {
32d85645476ed0 Michael Hennerich 2016-10-18  188  		clk_unregister(clk);
32d85645476ed0 Michael Hennerich 2016-10-18  189  		return ERR_PTR(ret);
32d85645476ed0 Michael Hennerich 2016-10-18  190  	}
32d85645476ed0 Michael Hennerich 2016-10-18  191  
32d85645476ed0 Michael Hennerich 2016-10-18  192  	return clk;
32d85645476ed0 Michael Hennerich 2016-10-18  193  }
32d85645476ed0 Michael Hennerich 2016-10-18  194  

:::::: The code at line 166 was first introduced by commit
:::::: 32d85645476ed0845d7e11d75647d3ab0f15239d drivers/clk/clk-adjustable-rate: CCF new adjustable rate driver

:::::: TO: Michael Hennerich <michael.hennerich@analog.com>
:::::: CC: Michael Hennerich <michael.hennerich@analog.com>

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