[PATCHv3 3/6] ata: pata_mpc52xx: reset cached DMA direction on resume

[Rosen Penev <rosenp@gmail.com>]

mpc52xx_ata_hw_init() is called from both probe and resume, but only
probe initializes priv->mpc52xx_ata_dma_last_write to -1. On resume
the hardware FIFO state is lost, yet the cached direction survives.
If the first post-resume DMA uses the same direction as before suspend,
mpc52xx_bmdma_setup() skips reconfiguring the FIFO (fifo_control,
fifo_alarm) because the cache matches, leaving the FIFO in its default
reset state.

Move the initialization of mpc52xx_ata_dma_last_write into
mpc52xx_ata_hw_init() so it is reset on both probe and resume.

Assisted-by: opencode:big-pickle
Signed-off-by: Rosen Penev <rosenp@gmail.com>
---
 drivers/ata/pata_mpc52xx.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/ata/pata_mpc52xx.c b/drivers/ata/pata_mpc52xx.c
index 72a2b677bc90..b2e2f83aa9ca 100644
--- a/drivers/ata/pata_mpc52xx.c
+++ b/drivers/ata/pata_mpc52xx.c
@@ -375,6 +375,7 @@ mpc52xx_ata_hw_init(struct mpc52xx_ata_priv *priv)
 
 	/* Init timings to PIO0 */
 	memset(priv->timings, 0x00, 2*sizeof(struct mpc52xx_ata_timings));
+	priv->mpc52xx_ata_dma_last_write = -1;
 
 	mpc52xx_ata_compute_pio_timings(priv, 0, 0);
 	mpc52xx_ata_compute_pio_timings(priv, 1, 0);
@@ -750,7 +751,6 @@ static int mpc52xx_ata_probe(struct platform_device *op)
 	priv->ata_regs_pa = res_mem.start;
 	priv->ata_irq = ata_irq;
 	priv->csel = -1;
-	priv->mpc52xx_ata_dma_last_write = -1;
 
 	if (ipb_freq/1000000 == 66) {
 		priv->mdmaspec = mdmaspec66;
-- 
2.54.0