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[80.230.85.71]) by smtp.gmail.com with ESMTPSA id ffacd0b85a97d-4606f26f23fsm36954467f8f.9.2026.06.15.12.59.16 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 15 Jun 2026 12:59:17 -0700 (PDT) Date: Mon, 15 Jun 2026 15:59:14 -0400 From: "Michael S. Tsirkin" To: Stefan Hajnoczi Cc: Peter Maydell , Gavin Shan , qemu-devel@nongnu.org, qemu-arm@nongnu.org, jugraham@redhat.com, shan.gavin@gmail.com, qemu-block@nongnu.org Subject: Re: [PATCH RFCv1] virtio: Inherit max bounce buffer size from bus parent if possible Message-ID: <20260615155855-mutt-send-email-mst@kernel.org> References: <20260610041036-mutt-send-email-mst@kernel.org> <20260610183046.GB121666@fedora> <20260610165710-mutt-send-email-mst@kernel.org> <20260611142022.GA202155@fedora> <20260611103513-mutt-send-email-mst@kernel.org> <20260611110543-mutt-send-email-mst@kernel.org> <20260611183708.GA222320@fedora> <20260611165238-mutt-send-email-mst@kernel.org> <20260615155411.GA450713@fedora> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20260615155411.GA450713@fedora> Received-SPF: pass client-ip=170.10.129.124; envelope-from=mst@redhat.com; helo=us-smtp-delivery-124.mimecast.com X-Spam_score_int: -24 X-Spam_score: -2.5 X-Spam_bar: -- X-Spam_report: (-2.5 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=-0.445, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, RCVD_IN_MSPIKE_H3=0.001, RCVD_IN_MSPIKE_WL=0.001, SPF_HELO_PASS=-0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: qemu development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org On Mon, Jun 15, 2026 at 11:54:11AM -0400, Stefan Hajnoczi wrote: > On Thu, Jun 11, 2026 at 04:54:36PM -0400, Michael S. Tsirkin wrote: > > On Thu, Jun 11, 2026 at 02:37:08PM -0400, Stefan Hajnoczi wrote: > > > On Thu, Jun 11, 2026 at 11:09:35AM -0400, Michael S. Tsirkin wrote: > > > > On Thu, Jun 11, 2026 at 04:04:20PM +0100, Peter Maydell wrote: > > > > > On Thu, 11 Jun 2026 at 15:46, Michael S. Tsirkin wrote: > > > > > > > > > > > > On Thu, Jun 11, 2026 at 10:20:22AM -0400, Stefan Hajnoczi wrote: > > > > > > > Gavin posted the lspci output: > > > > > > > > > > > > > > Region 0: Memory at 661ffd000000 (64-bit, prefetchable) [size=16M] > > > > > > > Region 2: Memory at 662000000000 (64-bit, prefetchable) [size=128G] > > > > > > > Region 4: Memory at 661ffe000000 (64-bit, prefetchable) [size=32M] > > > > > > > > > > > > > > These are prefetchable memory BARs, so I would expect them to be > > > > > > > mmappable. Why does QEMU have no way of knowing upfront whether they can > > > > > > > be mmapped? > > > > > > > > > > > > > > > > > > They can be mmapped. The issue is just that after mmap flatview uses > > > > > > memcpy/memmove on them, and that might not match what guest driver is > > > > > > expecting specifically for 1/2/4/8 byte accesses. > > > > > > > > > > Huh? The guest driver has nothing to do with it, surely. > > > > > > > > My answer is I don't know. > > > > > > > > But the commit that introduced the regression says: > > > > > > > > The assumption here is that accesses initiated by the VM are > > > > driven by a device specific driver, which knows the device > > > > capabilities. > > > > > > > > > The > > > > > problem is that for some PCI devices (like the network card > > > > > mentioned in 4a2e242bbb30's commit message) the BAR is *not* > > > > > safe for arbitrary access (because the actual real host hardware > > > > > inside it is not RAM). > > > > > > > > But we don't do arbitrary access. Why would we? > > > > > > > > > That commit disabled direct access > > > > > for all vfio MRs, which is safe but overcautious. Would > > > > > "direct access is OK if this is a prefetchable memory BAR" be OK? > > > > > Or do some prefetchable memory BARs still have restrictions > > > > > beyond those of real RAM? > > > > > > I wonder the same thing. > > > > pci spec mostly made prefetcheable the default, and made > > it a very weak signal. > > > > but really, direct access is just always ok. bounce buffers > > just do not have the bug of memory core besides that > > they buy us nothing. > > What is the next step here? > > Stefan Gavin seems to be iterating. > > > > > > > > > > > Removing mmap is one solution, this is what vfio does now. > > > > > > Fixing flatview is another. > > > > > > > > > > No, you can't fix this in flatview. If a BAR is not safe for > > > > > direct access then it is not safe for direct access. > > > > > > > > > > -- PMM > > > > > > > > There's no such thing as "not safe for direct access" in PCI. > > > > All operations are memory operations. > > > > What can be unsafe is accesses of specific width and length. > > > > > > > > So we should not use variable length memcpy/memmove which > > > > do that. Fixes length memcpy/memmove exactly mimic what > > > > guest does, so they are safe. > > > > > > The bounce buffer approach doesn't seem like a solution to me: if the > > > device has alignment and size restrictions on accesses, then the bounce > > > buffer won't get them right because it doesn't know where the registers > > > live within the BAR. > > > > > > Also, the guest initiated I/O to a VIRTIO device pointing to a buffer in > > > another PCI device's BAR. In this case any failure to handle BAR > > > accesses would be the guest's problem. It cannot assume that the VIRTIO > > > device follows a specific DMA transfer pattern with respect to > > > alignment/size. > > > > > > Stefan > > > >