From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from mail-oi1-f202.google.com (mail-oi1-f202.google.com [209.85.167.202]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id CE8833B2D0F for ; Mon, 15 Jun 2026 19:37:27 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=209.85.167.202 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1781552249; cv=none; b=jv77isWcWLEMKQYEEO71lGsqiKZlu/4w+SYZIZxQa1FI+L+Vc47Yk+PFgXVqdJ9p7MIuCBeDp0NFPyJiEvie7XdF6vVXKuFtViBgLrDQeQ9y/96k1JoODJshnGFKqFLZOK+gLJp9HoQVY/t/i9nxauTF2EhBv/7uG4PfzGvQ9DQ= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1781552249; c=relaxed/simple; bh=gTXky8O7FJNLc0oQd7j9qOQkXqpcjpDbnvVDGWTvCJk=; h=Date:In-Reply-To:Mime-Version:References:Message-ID:Subject:From: To:Cc:Content-Type; b=QTaEgXTbokI4Nizhz4hNY8NEXbs3c4hpOTCJXb5f0FqJFQMkT/T0pkO6d2Tz2bl4OYVGFYr80K38I55ePFyuPQPDrVUSUGLymI0rnUGlyfrdvbfA93oGj1cMzqXkvs02EFsMmYYWkgqWeDC1Zfn0KlnDtFpAEr33HmxqbtHs5oU= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=google.com; spf=pass smtp.mailfrom=flex--avagin.bounces.google.com; dkim=pass (2048-bit key) header.d=google.com header.i=@google.com header.b=vHuYTTd9; arc=none smtp.client-ip=209.85.167.202 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=google.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=flex--avagin.bounces.google.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=google.com header.i=@google.com header.b="vHuYTTd9" Received: by mail-oi1-f202.google.com with SMTP id 5614622812f47-4865626337fso4084959b6e.2 for ; Mon, 15 Jun 2026 12:37:27 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=20251104; t=1781552247; x=1782157047; darn=lists.linux.dev; h=cc:to:from:subject:message-id:references:mime-version:in-reply-to :date:from:to:cc:subject:date:message-id:reply-to; bh=zm0iG/jXM5qQlRuaKO+1FnC/jCl1KUYIybxup6Imlys=; b=vHuYTTd9BWqKDF1eQp6Sn0VBjbLrFqRNxfARzIscy9h9xloWOmV381kBp1Sxz8QjNl KBMwfJLf6krT28IeIpBwOKp2ml79XgUicZ35mgL4Vc4dZ2FUYhmMyA9IJ5S1s8AIRu3x TGb5GqfI0caSDnMdcOgmpWAGkIjfs71T1jt9WrpzTDpEokZT2NWg4GuI7VWWyosggB2s bSgsgKiKVkC1XBzGOwqORekVcctWZ0Tlvspv+7P36dOzY35HEdjauXRxRtKefbyMeh4W 0MiiJtgJBFGfUwwtvabsLkEELxIxzEnVxxuT7SvoHy9450T7kDkVcNjFuX+v8xR68J4W ppdA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20251104; t=1781552247; x=1782157047; h=cc:to:from:subject:message-id:references:mime-version:in-reply-to :date:x-gm-message-state:from:to:cc:subject:date:message-id:reply-to; bh=zm0iG/jXM5qQlRuaKO+1FnC/jCl1KUYIybxup6Imlys=; b=tUj4+/PpJjVS6me0KmXYg+sVDOeRKEyOVdzWUVet5r3zw1Ahks7QjJ79Svu1y6+kOh xN+8AXOxosJi6yu83Po2KHtSGZkHJ7nXM/NYi70Nu9woXf/rYHudasXloeVAx3dc61To hFIwCFi9N4LGOQyuv3Cmlv/Og/x1VrndI/sIxpU+JUYJAGW78oT5IUBy9gtLrhs1n9tc oXLXGigtqaXEkXpjWiSBaXIzBQ8MlPPT+L/qrvCdPQ3j+xxVAXQz8Pxy4Iksa4RyDoB+ X67+QKGV+7BsYHrjmH4DHAFUS6CTQJlRxLFFLRKn7rI/GxIR++ZFYu0ob8mVt6mGMWFD rwEQ== X-Forwarded-Encrypted: i=1; AFNElJ8oMceKWxlCiX1Je+wYhiI1GCJrblWnTl67BGrbmSioEHm/egvGWBQL9eKk2HUtfGMPase4@lists.linux.dev X-Gm-Message-State: AOJu0Yydc4SWK/UJ4EDETC0lR09V9AnfQa/2ueJmefw3tv+ama81ko2H ne8fg+CjB2igf5qlji/uS3dn2upmh0DJvuDxQg9wHwgdAi/QBZ+Y8drzSuGpBnSo1AoJ53GAo4j 2uZW/rA== X-Received: from iogq18.prod.google.com ([2002:a6b:7112:0:b0:967:e6c0:a4e3]) (user=avagin job=prod-delivery.src-stubby-dispatcher) by 2002:a05:6808:4f21:b0:486:5275:8144 with SMTP id 5614622812f47-4874194d5damr8090028b6e.2.1781552246548; Mon, 15 Jun 2026 12:37:26 -0700 (PDT) Date: Mon, 15 Jun 2026 19:37:09 +0000 In-Reply-To: <20260615193716.1843340-1-avagin@google.com> Precedence: bulk X-Mailing-List: criu@lists.linux.dev List-Id: List-Subscribe: List-Unsubscribe: Mime-Version: 1.0 References: <20260615193716.1843340-1-avagin@google.com> X-Mailer: git-send-email 2.54.0.1189.g8c84645362-goog Message-ID: <20260615193716.1843340-4-avagin@google.com> Subject: [PATCH 03/10] x86/fpu: Split __fpu_restore_sig to extract compat path From: Andrei Vagin To: Thomas Gleixner , Ingo Molnar , Borislav Petkov , "Chang S. Bae" Cc: linux-kernel@vger.kernel.org, criu@lists.linux.dev, Dave Hansen , x86@kernel.org, Andrei Vagin , "H. Peter Anvin" Content-Type: text/plain; charset="UTF-8" Split __fpu_restore_sig to move the restore part for the legacy/compat FPU state (when buf_f is present) to a separate helper function. The legacy 32-bit FP frame duplicates the FP state portion of the FX/XSAVE frame. For backward compatibility, the legacy FP frame is treated as the source of truth, and its state is folded into the FX/XSAVE state before restoring the registers. Signed-off-by: Andrei Vagin --- arch/x86/kernel/fpu/signal.c | 50 +++++++++++++++++++++++++++--------- 1 file changed, 38 insertions(+), 12 deletions(-) diff --git a/arch/x86/kernel/fpu/signal.c b/arch/x86/kernel/fpu/signal.c index 42c3d78bd849..6a14b528ac7f 100644 --- a/arch/x86/kernel/fpu/signal.c +++ b/arch/x86/kernel/fpu/signal.c @@ -264,6 +264,9 @@ static int __restore_fpregs_from_user(void __user *buf, u64 task_xfeatures, } } +static bool restore_fpregs_from_user_compat(void __user *buf_f, void __user *buf_fx, + u64 xrestore_mask, bool fx_only); + /* * Attempt to restore the FPU registers directly from user memory. * Pagefaults are handled and any errors returned are fatal. @@ -324,14 +327,9 @@ static bool restore_fpregs_from_user(void __user *buf, u64 xrestore_mask, bool f return true; } -static bool __fpu_restore_sig(void __user *buf_f, void __user *buf_fx, - bool ia32_fxstate) +static bool __fpu_restore_sig(void __user *buf_f, void __user *buf_fx) { - struct task_struct *tsk = current; - struct fpu *fpu = x86_task_fpu(tsk); - struct user_i387_ia32_struct env; - bool success, fx_only = false; - union fpregs_state *fpregs; + bool fx_only = false; u64 xrestore_mask = 0; if (use_xsave()) { @@ -346,11 +344,33 @@ static bool __fpu_restore_sig(void __user *buf_f, void __user *buf_fx, xrestore_mask = XFEATURE_MASK_FPSSE; } - if (likely(!ia32_fxstate)) { + if (likely(!buf_f)) { /* Restore the FPU registers directly from user memory. */ return restore_fpregs_from_user(buf_fx, xrestore_mask, fx_only); } + return restore_fpregs_from_user_compat(buf_f, buf_fx, xrestore_mask, fx_only); +} + +#if defined(CONFIG_X86_32) || defined(CONFIG_IA32_EMULATION) +/* + * Restore FPU state from a signal frame when a legacy 32-bit FP frame + * (buf_f) is present. + * + * The legacy FP frame duplicates the FP state portion of the FX/XSAVE + * frame (buf_fx). For backward compatibility, the legacy FP frame is + * treated as the source of truth, and its state is folded into the + * FX/XSAVE state before restoring the registers. + */ +static bool restore_fpregs_from_user_compat(void __user *buf_f, void __user *buf_fx, + u64 xrestore_mask, bool fx_only) +{ + struct task_struct *tsk = current; + struct fpu *fpu = x86_task_fpu(tsk); + struct user_i387_ia32_struct env; + union fpregs_state *fpregs; + bool success; + /* * Copy the legacy state because the FP portion of the FX frame has * to be ignored for histerical raisins. The legacy state is folded @@ -435,6 +455,13 @@ static bool __fpu_restore_sig(void __user *buf_f, void __user *buf_fx, fpregs_unlock(); return success; } +#else +static bool restore_fpregs_from_user_compat(void __user *buf_f, void __user *buf_fx, + u64 xrestore_mask, bool fx_only) +{ + return false; +} +#endif static inline unsigned int xstate_sigframe_size(struct fpstate *fpstate) { @@ -449,8 +476,7 @@ static inline unsigned int xstate_sigframe_size(struct fpstate *fpstate) bool fpu__restore_sig(void __user *buf, int ia32_frame) { struct fpu *fpu = x86_task_fpu(current); - void __user *buf_fx = buf; - bool ia32_fxstate = false; + void __user *buf_fx = buf, *buf_f = NULL; bool success = false; unsigned int size; @@ -471,7 +497,7 @@ bool fpu__restore_sig(void __user *buf, int ia32_frame) if (ia32_frame && use_fxsr()) { buf_fx = buf + sizeof(struct fregs_state); size += sizeof(struct fregs_state); - ia32_fxstate = true; + buf_f = buf; } if (!access_ok(buf, size)) @@ -482,7 +508,7 @@ bool fpu__restore_sig(void __user *buf, int ia32_frame) sizeof(struct user_i387_ia32_struct), NULL, buf); } else { - success = __fpu_restore_sig(buf, buf_fx, ia32_fxstate); + success = __fpu_restore_sig(buf_f, buf_fx); } out: -- 2.54.0.1189.g8c84645362-goog