From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from mail-oi1-f202.google.com (mail-oi1-f202.google.com [209.85.167.202]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 250963B2D0F for ; Mon, 15 Jun 2026 19:37:35 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=209.85.167.202 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1781552258; cv=none; b=pnF12bxLUyj0F5+1Olo7OE6n5kEN0beC1CReiB+AWAQYXiZKHfV5tMyCESaBZbRvMA6y+YWN0iabs+eqqUYD8eB8H/EHGoHQAyTw5CVT8TY8DyuyyKyrlmHR8ExAg0XAZwTeqzbGGeMQ7cU8wlcPqpVSFLXpYa7hYFdbjSFfEzo= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1781552258; c=relaxed/simple; bh=wJ/7ja3PYXbYyjyKoPzYhT+nCfrkkye7EGJB1ympoAU=; h=Date:In-Reply-To:Mime-Version:References:Message-ID:Subject:From: To:Cc:Content-Type; b=dovmfmG5Ox73EiCpJqJ21a97fDNJPJZRElHubop0MIJSxDTAktB9INWZIfXNq2wP0GVxo3HTupXKxyg+8cbnNs6cirqA4fdRQQBbkn1nVvl8CubYcTC65ZtGCk0VXxVK+4tPmjO3iRzpxsMkUtRDC50v9gJidKXV7F/mURMXnSs= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=google.com; spf=pass smtp.mailfrom=flex--avagin.bounces.google.com; dkim=pass (2048-bit key) header.d=google.com header.i=@google.com header.b=U/TqHSc8; arc=none smtp.client-ip=209.85.167.202 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=google.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=flex--avagin.bounces.google.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=google.com header.i=@google.com header.b="U/TqHSc8" Received: by mail-oi1-f202.google.com with SMTP id 5614622812f47-4867831a9a8so5613294b6e.3 for ; Mon, 15 Jun 2026 12:37:34 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=20251104; t=1781552254; x=1782157054; darn=lists.linux.dev; h=cc:to:from:subject:message-id:references:mime-version:in-reply-to :date:from:to:cc:subject:date:message-id:reply-to; bh=pGBZeEjlfmNNvTjV5tfSiZHV40M51dMwYIkMg0QLWTM=; b=U/TqHSc8fjq2FWwF28RGqP4nG9de37L/W/cBI6Tz8PWC1ZJbOMUgEunZQ6OOg+rmhH wKfnSnuCwQ9UAyell+nYZD114p8d02lMfM45NbFo7leEuRT0ZY2l0XAdCbtmJRa3hmVa 3ZscxQgI4Unis+8/x3IuTqc3FWYBXMVC9ENampE8PHK7lyny0tIt3mOsjhPjxUnR7CQp ctPh3dsm839VxwgCOVkNYPKPpIIEpXirU4y36f9aPxJ/MGSxTRl96cnNRc31z/ADsDiq u5GloyYETALiA+uxyMvrQtd5ibBvpSxbL9/rMRXWlSUp24lRPQAI5TDBkMOhEqwPEko4 xpSg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20251104; t=1781552254; x=1782157054; h=cc:to:from:subject:message-id:references:mime-version:in-reply-to :date:x-gm-message-state:from:to:cc:subject:date:message-id:reply-to; bh=pGBZeEjlfmNNvTjV5tfSiZHV40M51dMwYIkMg0QLWTM=; b=rfzP/qAoc8SafgWk3iRmr/CQLJ6sXJAe+uDxd5PQOzapjZx80S8Q0bj9tg/EEoj1AG +GEgTMzBW1qfU1RYCGXHwInv5vYvGPpz+VOCpGigLjjIL35frtiDywsbon/9zclVcvJU xgq78Jdms8J3HXpBZxwig2pt0yvlFPVlWedUU3AHQXg1K0VpNEwdA6slOqPZgXkjoWVx hqXIQGTYUEHXR5t+fczpoZryurERQft5w1u2aFACl1+fDRmPbSG2Bxr2DWUJQhkL2y/S s7reLWsXu0Wqh5lpLhb/+UCB8btQ7wdPu8pF2qwpQDtjS06NLNFYw8IZyO49mg8a8dYO 9Qqw== X-Forwarded-Encrypted: i=1; AFNElJ9Y/4ZhxAxye1FQ/CAFzCg8wUmSekQTVBFmROINznQm6ls9rNq9mC2rm7fst5VSe6qeyLwW@lists.linux.dev X-Gm-Message-State: AOJu0YwhRn313FR7EHegcsy5/+qKELub+KUtjIwL5wCl/Oej0Gl3jNZR JlX61ujzmKV3wXNT0NmjFZi5IEJquML+SBiWP4P0OueL9rY6W3te3o+Y4hK8GEdDCNwwTqEgG7B WmiaU3g== X-Received: from oiic9-n2.prod.google.com ([2002:a05:6808:a5c9:20b0:487:45f9:2fa5]) (user=avagin job=prod-delivery.src-stubby-dispatcher) by 2002:a05:6809:315:10b0:487:51fa:7ba1 with SMTP id 5614622812f47-48751fa7c1fmr4150558b6e.35.1781552253939; Mon, 15 Jun 2026 12:37:33 -0700 (PDT) Date: Mon, 15 Jun 2026 19:37:13 +0000 In-Reply-To: <20260615193716.1843340-1-avagin@google.com> Precedence: bulk X-Mailing-List: criu@lists.linux.dev List-Id: List-Subscribe: List-Unsubscribe: Mime-Version: 1.0 References: <20260615193716.1843340-1-avagin@google.com> X-Mailer: git-send-email 2.54.0.1189.g8c84645362-goog Message-ID: <20260615193716.1843340-8-avagin@google.com> Subject: [PATCH 07/10] x86/fpu: Pre-fault only required size of xstate buffer From: Andrei Vagin To: Thomas Gleixner , Ingo Molnar , Borislav Petkov , "Chang S. Bae" Cc: linux-kernel@vger.kernel.org, criu@lists.linux.dev, Dave Hansen , x86@kernel.org, Andrei Vagin , "H. Peter Anvin" Content-Type: text/plain; charset="UTF-8" The kernel previously used the default task FPU state size (user_size) to fault in the user buffer when restoring FPU registers from a signal frame. This can lead to attempting to fault in memory past the end of the actual frame if the frame was smaller than the default size. Introduce consistency checks to calculate the actual required size for the features enabled in the xfeatures mask, ensure that the provided xstate_size is sufficient, and shrink it to the actual required size. Use this validated size to fault in the user buffer. Keep the strict check that the provided xstate_size does not exceed the default user_size for now. Signed-off-by: Andrei Vagin --- arch/x86/kernel/fpu/signal.c | 40 ++++++++++++++++++++++++++++-------- arch/x86/kernel/fpu/xstate.c | 2 +- arch/x86/kernel/fpu/xstate.h | 2 ++ 3 files changed, 34 insertions(+), 10 deletions(-) diff --git a/arch/x86/kernel/fpu/signal.c b/arch/x86/kernel/fpu/signal.c index 85021c5ea649..1e7cc114c186 100644 --- a/arch/x86/kernel/fpu/signal.c +++ b/arch/x86/kernel/fpu/signal.c @@ -29,7 +29,8 @@ static inline bool check_xstate_in_sigframe(struct fxregs_state __user *buf_fx, { int min_xstate_size = sizeof(struct fxregs_state) + sizeof(struct xstate_header); - void __user *fpstate = buf_fx; + struct fpstate *fpstate = x86_task_fpu(current)->fpstate; + void __user *buf = buf_fx; unsigned int magic2; if (__copy_from_user(fx_sw, &buf_fx->sw_reserved[0], sizeof(*fx_sw))) @@ -38,8 +39,9 @@ static inline bool check_xstate_in_sigframe(struct fxregs_state __user *buf_fx, /* Check for the first magic field and other error scenarios. */ if (fx_sw->magic1 != FP_XSTATE_MAGIC1 || fx_sw->xstate_size < min_xstate_size || - fx_sw->xstate_size > x86_task_fpu(current)->fpstate->user_size || - fx_sw->xstate_size > fx_sw->extended_size) + fx_sw->xstate_size > fpstate->user_size || + fx_sw->xstate_size > fx_sw->extended_size || + fx_sw->extended_size - fx_sw->xstate_size < FP_XSTATE_MAGIC2_SIZE) goto err_setfx; /* @@ -48,11 +50,27 @@ static inline bool check_xstate_in_sigframe(struct fxregs_state __user *buf_fx, * fpstate layout with out copying the extended state information * in the memory layout. */ - if (__get_user(magic2, (__u32 __user *)(fpstate + fx_sw->xstate_size))) + if (__get_user(magic2, (__u32 __user *)(buf + fx_sw->xstate_size))) return false; + if (unlikely(magic2 != FP_XSTATE_MAGIC2)) + goto err_setfx; - if (likely(magic2 == FP_XSTATE_MAGIC2)) - return true; + if (fx_sw->xstate_size != fpstate->user_size || + fx_sw->xfeatures != fpstate->user_xfeatures) { + unsigned int xsize; + u64 xfeatures; + + /* Calculate size of enabled features only. */ + xfeatures = fx_sw->xfeatures & fpstate->user_xfeatures; + + xsize = xstate_calculate_size(xfeatures, false); + if (fx_sw->xstate_size < xsize) + return false; + + fx_sw->xstate_size = xsize; + } + + return true; err_setfx: /* * The fallback to FX-only state is used to preserve backward @@ -279,7 +297,8 @@ static bool restore_fpregs_from_user_compat(void __user *buf_f, void __user *buf * Attempt to restore the FPU registers directly from user memory. * Pagefaults are handled and any errors returned are fatal. */ -static bool restore_fpregs_from_user(void __user *buf, u64 xrestore_mask, bool fx_only) +static bool restore_fpregs_from_user(void __user *buf, u64 xrestore_mask, + bool fx_only, size_t xstate_size) { struct fpu *fpu = x86_task_fpu(current); int ret; @@ -313,7 +332,7 @@ static bool restore_fpregs_from_user(void __user *buf, u64 xrestore_mask, bool f if (ret != X86_TRAP_PF) return false; - if (!fault_in_readable(buf, fpu->fpstate->user_size)) + if (!fault_in_readable(buf, xstate_size)) goto retry; return false; } @@ -339,6 +358,7 @@ static bool __fpu_restore_sig(void __user *buf_f, void __user *buf_fx) { bool fx_only = false; u64 xrestore_mask = 0; + size_t xstate_size; if (use_xsave()) { struct _fpx_sw_bytes fx_sw_user; @@ -348,13 +368,15 @@ static bool __fpu_restore_sig(void __user *buf_f, void __user *buf_fx) fx_only = !fx_sw_user.magic1; xrestore_mask = fx_sw_user.xfeatures; + xstate_size = fx_sw_user.xstate_size; } else { xrestore_mask = XFEATURE_MASK_FPSSE; + xstate_size = sizeof(struct fxregs_state); } if (likely(!buf_f)) { /* Restore the FPU registers directly from user memory. */ - return restore_fpregs_from_user(buf_fx, xrestore_mask, fx_only); + return restore_fpregs_from_user(buf_fx, xrestore_mask, fx_only, xstate_size); } return restore_fpregs_from_user_compat(buf_f, buf_fx, xrestore_mask, fx_only); diff --git a/arch/x86/kernel/fpu/xstate.c b/arch/x86/kernel/fpu/xstate.c index ed39d7051d0d..b7d0d78d2081 100644 --- a/arch/x86/kernel/fpu/xstate.c +++ b/arch/x86/kernel/fpu/xstate.c @@ -587,7 +587,7 @@ static bool __init check_xstate_against_struct(int nr) return true; } -static unsigned int xstate_calculate_size(u64 xfeatures, bool compacted) +unsigned int xstate_calculate_size(u64 xfeatures, bool compacted) { unsigned int topmost, offset, i; diff --git a/arch/x86/kernel/fpu/xstate.h b/arch/x86/kernel/fpu/xstate.h index 38a2862f09d3..c73cf2444de6 100644 --- a/arch/x86/kernel/fpu/xstate.h +++ b/arch/x86/kernel/fpu/xstate.h @@ -55,6 +55,8 @@ extern int copy_sigframe_from_user_to_xstate(struct task_struct *tsk, const void extern void fpu__init_cpu_xstate(void); extern void fpu__init_system_xstate(unsigned int legacy_size); +extern unsigned int xstate_calculate_size(u64 xfeatures, bool compacted); + extern void __user *get_xsave_addr_user(struct xregs_state __user *xsave, int xfeature_nr); static inline u64 xfeatures_mask_supervisor(void) -- 2.54.0.1189.g8c84645362-goog