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[68.180.127.24]) by smtp.gmail.com with ESMTPSA id a92af1059eb24-1384b9815a6sm11911466c88.15.2026.06.15.15.41.08 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 15 Jun 2026 15:41:08 -0700 (PDT) From: Ethan Nelson-Moore To: Geert Uytterhoeven , Ethan Nelson-Moore , linux-sh@vger.kernel.org Cc: Yoshinori Sato , Rich Felker , John Paul Adrian Glaubitz Subject: [PATCH v2] sh: mm: Remove checks for nonexistent CONFIG_CPU_SUBTYPE_ST40 Date: Mon, 15 Jun 2026 15:40:48 -0700 Message-ID: <20260615224049.19649-2-enelsonmoore@gmail.com> X-Mailer: git-send-email 2.43.0 Precedence: bulk X-Mailing-List: linux-sh@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: 8bit The CONFIG_CPU_SUBTYPE_ST40 option was removed in commit f96691872439 ("sh: Kill off the remaining ST40 cruft."), but a check for it was added later in commit d02b08f6e8b184ff ("sh: Clean up places that make 29-bit physical assumptions."). Remove this dead code. Also remove the definition of and references to the MMUCR_SE bit mask, because it is defined as zero on all CPUs other than ST40. Discovered while searching for CONFIG_* symbols referenced in code but not defined in any Kconfig file. Reviewed-by: Geert Uytterhoeven Signed-off-by: Ethan Nelson-Moore --- Changes in v2: Correctly indicate that the check was added after ST40 support was removed (thanks Geert) arch/sh/include/cpu-sh4/cpu/mmu_context.h | 8 +------- 1 file changed, 1 insertion(+), 7 deletions(-) diff --git a/arch/sh/include/cpu-sh4/cpu/mmu_context.h b/arch/sh/include/cpu-sh4/cpu/mmu_context.h index 421b56d5c595..4a6148e1ea84 100644 --- a/arch/sh/include/cpu-sh4/cpu/mmu_context.h +++ b/arch/sh/include/cpu-sh4/cpu/mmu_context.h @@ -43,12 +43,6 @@ #define MMUCR_URC 0x0000FC00 #define MMUCR_URC_SHIFT 10 -#if defined(CONFIG_32BIT) && defined(CONFIG_CPU_SUBTYPE_ST40) -#define MMUCR_SE (1 << 4) -#else -#define MMUCR_SE (0) -#endif - #ifdef CONFIG_CPU_HAS_PTEAEX #define MMUCR_AEX (1 << 6) #else @@ -69,7 +63,7 @@ #define MMU_NTLB_ENTRIES 64 #define MMU_CONTROL_INIT (MMUCR_AT | MMUCR_TI | MMUCR_SQMD | \ - MMUCR_ME | MMUCR_SE | MMUCR_AEX) + MMUCR_ME | MMUCR_AEX) #define TRA 0xff000020 #define EXPEVT 0xff000024 -- 2.43.0