From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 045DECD98E3 for ; Mon, 15 Jun 2026 22:42:44 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id BB5A810E6F1; Mon, 15 Jun 2026 22:42:43 +0000 (UTC) Authentication-Results: gabe.freedesktop.org; dkim=pass (2048-bit key; unprotected) header.d=intel.com header.i=@intel.com header.b="YxfjIlhm"; dkim-atps=neutral Received: from mgamail.intel.com (mgamail.intel.com [198.175.65.16]) by gabe.freedesktop.org (Postfix) with ESMTPS id 348A310E68A for ; Mon, 15 Jun 2026 22:42:33 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1781563353; x=1813099353; h=from:to:subject:date:message-id:in-reply-to:references: mime-version:content-transfer-encoding; bh=1MS/YyAUdd4d1rnESQnfeZTckcs0UtDRqZzt/3kxJ2E=; b=YxfjIlhmI2kQ5h/ZRocGwB251ivD8Rn0xcU8OdYZHjOIc8zRe/w/NQtm wLU6REzX32cbVgHEUmbxU2Z2MDSHIKULwi5n93JsUZapm3x205GArZAOb 8lThgQx3/jwJ67B8+sbL0awA63nBYWlOQBFOmwqzEjKpR5x/plx+jHyGq nTpkha8R1YoI4rZ/LXA8Opvs9EuWKXJ1ZKoZG0CXC96gbJeIBesFNMAYD ox68HefC6CeyYQdbRmdY0SnJpdKj7AXqTCh89zN+C9zDuSLpZH3l5FkML KCneziGt3fH0PEewEid8vKOytPKEbaKT0eGQ7UXtQV+3t0wmsCF7HbJzE A==; X-CSE-ConnectionGUID: kgYXTpk4R2Sz5ToVaZ1E8A== X-CSE-MsgGUID: DVFm716CQZ2l4wzGVWrEXQ== X-IronPort-AV: E=McAfee;i="6800,10657,11818"; a="82513160" X-IronPort-AV: E=Sophos;i="6.24,207,1774335600"; d="scan'208";a="82513160" Received: from orviesa007.jf.intel.com ([10.64.159.147]) by orvoesa108.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 15 Jun 2026 15:42:32 -0700 X-CSE-ConnectionGUID: zDs28r72QK+ngAg23S8t2g== X-CSE-MsgGUID: bt/vf5HaTQmZqZ0gtwbtKA== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.24,207,1774335600"; d="scan'208";a="247676806" Received: from orsosgc001.jf.intel.com ([10.88.27.185]) by orviesa007-auth.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 15 Jun 2026 15:42:31 -0700 From: Ashutosh Dixit To: intel-xe@lists.freedesktop.org Subject: [PATCH v3 9/9] drm/xe/rtp: Ensure locking/ref counting for OA whitelists Date: Mon, 15 Jun 2026 15:42:27 -0700 Message-ID: <20260615224227.34880-10-ashutosh.dixit@intel.com> X-Mailer: git-send-email 2.54.0 In-Reply-To: <20260615224227.34880-1-ashutosh.dixit@intel.com> References: <20260615224227.34880-1-ashutosh.dixit@intel.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-BeenThere: intel-xe@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel Xe graphics driver List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: intel-xe-bounces@lists.freedesktop.org Sender: "Intel-xe" Since multiple OA streams might be open in parallel on a gt, ensure that proper locking is in place. Also ensure that OA registers are whitelisted when the first OA stream is open and de-whitelisted after the last OA stream is closed. Signed-off-by: Ashutosh Dixit Reviewed-by: Umesh Nerlige Ramappa --- drivers/gpu/drm/xe/xe_oa_types.h | 3 +++ drivers/gpu/drm/xe/xe_reg_whitelist.c | 9 +++++++++ 2 files changed, 12 insertions(+) diff --git a/drivers/gpu/drm/xe/xe_oa_types.h b/drivers/gpu/drm/xe/xe_oa_types.h index 3d9ec8490899c..e876e9be92ba5 100644 --- a/drivers/gpu/drm/xe/xe_oa_types.h +++ b/drivers/gpu/drm/xe/xe_oa_types.h @@ -126,6 +126,9 @@ struct xe_oa_gt { /** @oa_unit: array of oa_units */ struct xe_oa_unit *oa_unit; + + /** @whitelist_count: number of open streams for which oa registers are whitelisted */ + u32 whitelist_count; }; /** diff --git a/drivers/gpu/drm/xe/xe_reg_whitelist.c b/drivers/gpu/drm/xe/xe_reg_whitelist.c index b2e7aabd19d79..3d9e3daab01a7 100644 --- a/drivers/gpu/drm/xe/xe_reg_whitelist.c +++ b/drivers/gpu/drm/xe/xe_reg_whitelist.c @@ -255,6 +255,10 @@ void xe_reg_whitelist_oa_regs(struct xe_gt *gt) struct xe_hw_engine *hwe; enum xe_hw_engine_id id; + lockdep_assert_held(>->oa.gt_lock); + if (gt->oa.whitelist_count++) + return; + for_each_hw_engine(hwe, gt, id) __whitelist_oa_regs(hwe, true); } @@ -270,6 +274,11 @@ void xe_reg_dewhitelist_oa_regs(struct xe_gt *gt) struct xe_hw_engine *hwe; enum xe_hw_engine_id id; + lockdep_assert_held(>->oa.gt_lock); + xe_assert(gt_to_xe(gt), gt->oa.whitelist_count); + if (--gt->oa.whitelist_count) + return; + for_each_hw_engine(hwe, gt, id) __whitelist_oa_regs(hwe, false); } -- 2.54.0