From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from mgamail.intel.com (mgamail.intel.com [198.175.65.10]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 1A1DA3BED44; Mon, 15 Jun 2026 23:10:09 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=198.175.65.10 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1781565010; cv=none; b=XjsQ0r6cHiHUWfwojpNVSdZoqx/7CMxY4TmIgcuFTJBHBF7r44luM+YLxtPlxCFVYqT/BM9xfCAuyyLWC69fYbMLknTArHTPnTbR/mfe9n+1OdzIk+b6ugiiensyOzTrcVl75IcMZHmQJo9LXmL5W/5Cay4aiMn8Er4ONpJwrK0= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1781565010; c=relaxed/simple; bh=uu0OcTgn3CPKXcF0xjMO0RfY0krvnzHgkkThexzDjvs=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=M8bbAkRkyGxyha6atCtwXUa0QpDaO1OJVCiVpako/x3SD/v/9WmLA2s+DibjVsscL7XG1AmGhHfxvEgj4qqvfezglhs8FoPuvjNZfKYepy8tSQoHw73f7bmaakYKWHAh7mBtzxxQPzZpJmNVug7jzOCEiCLu7fC2VhZYrEGgTiY= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=intel.com; spf=pass smtp.mailfrom=intel.com; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b=FZT+uCZD; arc=none smtp.client-ip=198.175.65.10 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=intel.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=intel.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=intel.com header.i=@intel.com header.b="FZT+uCZD" DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1781565010; x=1813101010; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=uu0OcTgn3CPKXcF0xjMO0RfY0krvnzHgkkThexzDjvs=; b=FZT+uCZD5Vo8wwowbepknD4PvecqZWlrtNS7Tonvw5YCRx25Hxi2GaDc eGWxkD0O6eUOjTYjbw88JaC7OwOjErwnWCRsKVCjdiGmiqoOkAzcn/F+c 1sDnFaOCypCIxszXU+spNxHgb2ewFb66aoUuz93B/MEXajrGXZFY9U/lo 8frQ4/T0fkqWix0ro4ydczIF7+MXsvXY3pYT2dWZvh9aUz/9FSY4xCj9g Fwfny3WglfoWZs3IN8zLdYMxreIQHvbsesgCB4r2G+9TI6ldoH3Yj7gn0 Q/g2nYyibC32AyTqlwaOG5uv45NwpytO4QOlSCYR66ACsWlwRqdQ5Xi+Y A==; X-CSE-ConnectionGUID: u6PiyQhTRKyW5cKM+6Vsgg== X-CSE-MsgGUID: C/Ilpt4DQgimyO3ZNf7v1A== X-IronPort-AV: E=McAfee;i="6800,10657,11818"; a="99738593" X-IronPort-AV: E=Sophos;i="6.24,207,1774335600"; d="scan'208";a="99738593" Received: from fmviesa003.fm.intel.com ([10.60.135.143]) by orvoesa102.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 15 Jun 2026 16:10:08 -0700 X-CSE-ConnectionGUID: MRZGq3RCQKSK0Awlr3KY7g== X-CSE-MsgGUID: pINr62ocR7eYnN8FGdsidA== X-ExtLoop1: 1 Received: from 9cc2c43eec6b.jf.intel.com ([10.54.77.29]) by fmviesa003-auth.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 15 Jun 2026 16:10:06 -0700 From: Zide Chen To: Sean Christopherson , Paolo Bonzini Cc: kvm@vger.kernel.org, linux-kernel@vger.kernel.org, Jim Mattson , Mingwei Zhang , Zide Chen , Das Sandipan , Shukla Manali , Dapeng Mi , Falcon Thomas , Xudong Hao Subject: [PATCH V3 1/4] KVM: x86/pmu: Do not map fixed counters >= 3 to generic perf events Date: Mon, 15 Jun 2026 16:01:15 -0700 Message-ID: <20260615230118.50718-2-zide.chen@intel.com> X-Mailer: git-send-email 2.54.0 In-Reply-To: <20260615230118.50718-1-zide.chen@intel.com> References: <20260615230118.50718-1-zide.chen@intel.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Only fixed counters 0..2 have matching generic cross-platform hardware perf events (INSTRUCTIONS, CPU_CYCLES, REF_CPU_CYCLES). Therefore, perf_get_hw_event_config() is only applicable to these counters. KVM does not intend to emulate fixed counters >= 3 on legacy (non-mediated) vPMU, while for mediated vPMU, KVM does not care what the fixed counter event mappings are. Therefore, return 0 for their eventsel. Also remove __always_inline as BUILD_BUG_ON() is no longer needed. Signed-off-by: Zide Chen --- v2: - Replace 3 in "if (index < 3)" with ARRAY_SIZE(fixed_pmc_perf_ids). --- arch/x86/kvm/vmx/pmu_intel.c | 26 ++++++++++++++------------ 1 file changed, 14 insertions(+), 12 deletions(-) diff --git a/arch/x86/kvm/vmx/pmu_intel.c b/arch/x86/kvm/vmx/pmu_intel.c index a73a9515d96c..59b7a90c79e1 100644 --- a/arch/x86/kvm/vmx/pmu_intel.c +++ b/arch/x86/kvm/vmx/pmu_intel.c @@ -464,28 +464,30 @@ static int intel_pmu_set_msr(struct kvm_vcpu *vcpu, struct msr_data *msr_info) * different perf_event is already utilizing the requested counter, but the end * result is the same (ignoring the fact that using a general purpose counter * will likely exacerbate counter contention). - * - * Forcibly inlined to allow asserting on @index at build time, and there should - * never be more than one user. */ -static __always_inline u64 intel_get_fixed_pmc_eventsel(unsigned int index) +static u64 intel_get_fixed_pmc_eventsel(unsigned int index) { const enum perf_hw_id fixed_pmc_perf_ids[] = { [0] = PERF_COUNT_HW_INSTRUCTIONS, [1] = PERF_COUNT_HW_CPU_CYCLES, [2] = PERF_COUNT_HW_REF_CPU_CYCLES, }; - u64 eventsel; - - BUILD_BUG_ON(ARRAY_SIZE(fixed_pmc_perf_ids) != KVM_MAX_NR_INTEL_FIXED_COUNTERS); - BUILD_BUG_ON(index >= KVM_MAX_NR_INTEL_FIXED_COUNTERS); + u64 eventsel = 0; /* - * Yell if perf reports support for a fixed counter but perf doesn't - * have a known encoding for the associated general purpose event. + * Fixed counters 3 and above don't have corresponding generic hardware + * perf event, and KVM does not intend to emulate them on non-mediated + * vPMU. */ - eventsel = perf_get_hw_event_config(fixed_pmc_perf_ids[index]); - WARN_ON_ONCE(!eventsel && index < kvm_pmu_cap.num_counters_fixed); + if (index < ARRAY_SIZE(fixed_pmc_perf_ids)) { + /* + * Yell if perf reports support for a fixed counter but perf + * doesn't have a known encoding for the associated general + * purpose event. + */ + eventsel = perf_get_hw_event_config(fixed_pmc_perf_ids[index]); + WARN_ON_ONCE(!eventsel && index < kvm_pmu_cap.num_counters_fixed); + } return eventsel; } -- 2.54.0