From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id B998FCD98E1 for ; Tue, 16 Jun 2026 14:53:41 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 6F71710EC4C; Tue, 16 Jun 2026 14:53:41 +0000 (UTC) Authentication-Results: gabe.freedesktop.org; dkim=pass (2048-bit key; unprotected) header.d=intel.com header.i=@intel.com header.b="g/gmKFKM"; dkim-atps=neutral Received: from mgamail.intel.com (mgamail.intel.com [192.198.163.16]) by gabe.freedesktop.org (Postfix) with ESMTPS id A3CDA10EC1B; Tue, 16 Jun 2026 14:53:14 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1781621595; x=1813157595; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=75//4mZMENlcpl9HI51JdgJOrvNULxRcMu6Sn8gWp8g=; b=g/gmKFKMrBfccwuqER+Qrgh3CAKq/KvZBORclkhfwjCS7tQK4X/e3iAZ DLRMLeHdIEL6Ai9dzEQTB5JVKmOdKg49yCzEEapNk39V7afdimPN2vaiW DbXBAiwg1T+HCbV+bHOpHQpJI2LTpOjFW5UXZe5Yc2hBR996MNTzuT9EX klzKIQfvIb6xrQBphGq6hMMyQsZGeaZpEBVgZyX1PwojGx0USwHFz8w/v Sck8Xsr5IApcQZDbrOz0OVaM2EaDJMRBgPdIFF0hyKdQYG9oAkq1GOgz6 PdE/h8WyHU9ospMkWW6Ax7ikd+sAKvWevy45lmQB6PegJ5sa/IrmsQ8tT A==; X-CSE-ConnectionGUID: CXEOBfY1T9mhIk6s+o+Ukw== X-CSE-MsgGUID: jaMTIV1rTM2YM3Ftt4nwvg== X-IronPort-AV: E=McAfee;i="6800,10657,11818"; a="69932811" X-IronPort-AV: E=Sophos;i="6.24,208,1774335600"; d="scan'208";a="69932811" Received: from orviesa001.jf.intel.com ([10.64.159.141]) by fmvoesa110.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 16 Jun 2026 07:53:15 -0700 X-CSE-ConnectionGUID: aJheb51wQaau7Pfr2Tog5w== X-CSE-MsgGUID: lnXw8o9VSx2BD1lsaPSd9Q== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.24,208,1774335600"; d="scan'208";a="285896290" Received: from mgolanimitul-x299-ud4-pro.iind.intel.com ([10.190.239.114]) by orviesa001.jf.intel.com with ESMTP; 16 Jun 2026 07:53:13 -0700 From: Mitul Golani To: intel-gfx@lists.freedesktop.org Cc: intel-xe@lists.freedesktop.org, ankit.k.nautiyal@intel.com, chaitanya.kumar.borah@intel.com Subject: [PATCH v2 01/11] drm/i915/vrr: add per-CRTC vrr/cmrr debugfs control Date: Tue, 16 Jun 2026 20:12:22 +0530 Message-ID: <20260616144233.832276-2-mitulkumar.ajitkumar.golani@intel.com> X-Mailer: git-send-email 2.48.1 In-Reply-To: <20260616144233.832276-1-mitulkumar.ajitkumar.golani@intel.com> References: <20260616144233.832276-1-mitulkumar.ajitkumar.golani@intel.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-BeenThere: intel-xe@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel Xe graphics driver List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: intel-xe-bounces@lists.freedesktop.org Sender: "Intel-xe" Add a per-CRTC debugfs entry 'vrr/cmrr' and a debugfs file (numerator/denominator) that indicates user intended target refresh rate and video mode requirement. Signed-off-by: Mitul Golani --- .../drm/i915/display/intel_display_debugfs.c | 2 + .../drm/i915/display/intel_display_types.h | 5 + drivers/gpu/drm/i915/display/intel_vrr.c | 105 ++++++++++++++++++ drivers/gpu/drm/i915/display/intel_vrr.h | 2 + 4 files changed, 114 insertions(+) diff --git a/drivers/gpu/drm/i915/display/intel_display_debugfs.c b/drivers/gpu/drm/i915/display/intel_display_debugfs.c index 08004c1ba03f..1ce6e73ec83c 100644 --- a/drivers/gpu/drm/i915/display/intel_display_debugfs.c +++ b/drivers/gpu/drm/i915/display/intel_display_debugfs.c @@ -48,6 +48,7 @@ #include "intel_psr.h" #include "intel_psr_regs.h" #include "intel_vdsc.h" +#include "intel_vrr.h" #include "intel_wm.h" #include "intel_tc.h" @@ -1393,6 +1394,7 @@ void intel_crtc_debugfs_add(struct intel_crtc *crtc) intel_drrs_crtc_debugfs_add(crtc); intel_fbc_crtc_debugfs_add(crtc); hsw_ips_crtc_debugfs_add(crtc); + intel_vrr_crtc_debugfs_add(crtc); debugfs_create_file("i915_current_bpc", 0444, root, crtc, &i915_current_bpc_fops); diff --git a/drivers/gpu/drm/i915/display/intel_display_types.h b/drivers/gpu/drm/i915/display/intel_display_types.h index 6cd102a3b610..897a1ffd7b79 100644 --- a/drivers/gpu/drm/i915/display/intel_display_types.h +++ b/drivers/gpu/drm/i915/display/intel_display_types.h @@ -1545,6 +1545,11 @@ struct intel_crtc { u64 flip_count; } dc_balance; + struct { + u32 numerator; + u32 denominator; + } cmrr; + int scanline_offset; struct { diff --git a/drivers/gpu/drm/i915/display/intel_vrr.c b/drivers/gpu/drm/i915/display/intel_vrr.c index cd380fe8fd01..41118883b845 100644 --- a/drivers/gpu/drm/i915/display/intel_vrr.c +++ b/drivers/gpu/drm/i915/display/intel_vrr.c @@ -4,6 +4,10 @@ * */ +#include +#include +#include + #include #include "intel_alpm.h" @@ -1231,3 +1235,104 @@ int intel_vrr_dcb_vmax_vblank_start_final(const struct intel_crtc_state *crtc_st return intel_vrr_vblank_start(crtc_state, VRR_DCB_VMAX(tmp) + 1); } + +static int cmrr_parse_ratio(char *str, u32 *numerator, u32 *denominator) +{ + char *sep; + int ret; + + /* + * Parse a "numerator/denominator" CMRR ratio string. The numerator + * is the requested refresh rate in KHz (refresh rate in Hz * 1000) + * and the denominator selects the timing: 1000 for a 1:1 ratio + * (no video timing) or 1001 for the 1000/1001 video timing. + */ + + sep = strchr(str, '/'); + if (!sep) + return -EINVAL; + + *sep = '\0'; + + ret = kstrtou32(strim(str), 10, numerator); + if (ret) + return ret; + + ret = kstrtou32(strim(sep + 1), 10, denominator); + if (ret) + return ret; + + if (*numerator == 0) + return -EINVAL; + + if (*denominator != 1000 && *denominator != 1001) + return -EINVAL; + + return 0; +} + +static int intel_vrr_cmrr_show(struct seq_file *m, void *data) +{ + struct intel_crtc *crtc = m->private; + + seq_printf(m, "%u/%u\n", crtc->cmrr.numerator, crtc->cmrr.denominator); + + return 0; +} + +static int intel_vrr_cmrr_open(struct inode *inode, struct file *file) +{ + return single_open(file, intel_vrr_cmrr_show, inode->i_private); +} + +static ssize_t intel_vrr_cmrr_write(struct file *file, const char __user *ubuf, + size_t len, loff_t *offp) +{ + struct seq_file *m = file->private_data; + struct intel_crtc *crtc = m->private; + u32 numerator, denominator; + char kbuf[32]; + int ret; + + if (len >= sizeof(kbuf)) + return -EINVAL; + + if (copy_from_user(kbuf, ubuf, len)) + return -EFAULT; + + kbuf[len] = '\0'; + + ret = cmrr_parse_ratio(kbuf, &numerator, &denominator); + if (ret) + return ret; + + crtc->cmrr.numerator = numerator; + crtc->cmrr.denominator = denominator; + + return len; +} + +static const struct file_operations intel_vrr_cmrr_fops = { + .owner = THIS_MODULE, + .open = intel_vrr_cmrr_open, + .read = seq_read, + .llseek = seq_lseek, + .release = single_release, + .write = intel_vrr_cmrr_write, +}; + +void intel_vrr_crtc_debugfs_add(struct intel_crtc *crtc) +{ + struct intel_display *display = to_intel_display(crtc); + struct dentry *vrr_dir; + + if (!HAS_VRR(display)) + return; + + vrr_dir = debugfs_create_dir("vrr", crtc->base.debugfs_entry); + + if (HAS_CMRR(display)) + debugfs_create_file("cmrr", 0600, vrr_dir, crtc, + &intel_vrr_cmrr_fops); +} + diff --git a/drivers/gpu/drm/i915/display/intel_vrr.h b/drivers/gpu/drm/i915/display/intel_vrr.h index 55e9c429f579..19c7990be1b2 100644 --- a/drivers/gpu/drm/i915/display/intel_vrr.h +++ b/drivers/gpu/drm/i915/display/intel_vrr.h @@ -56,4 +56,6 @@ int intel_vrr_dcb_vmax_vblank_start_next(const struct intel_crtc_state *crtc_sta int intel_vrr_dcb_vmin_vblank_start_final(const struct intel_crtc_state *crtc_state); int intel_vrr_dcb_vmax_vblank_start_final(const struct intel_crtc_state *crtc_state); +void intel_vrr_crtc_debugfs_add(struct intel_crtc *crtc); + #endif /* __INTEL_VRR_H__ */ -- 2.48.1