From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-alma10-1.taild15c8.ts.net [100.103.45.18]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id D169F318EDA; Tue, 16 Jun 2026 19:05:45 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=100.103.45.18 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1781636746; cv=none; b=alVB2X4pc5qByr5fnkR1w92ED/0IzC57RU0Epot9ykqtxAzXFCMksONCN0djH7TUzprJyhci8UWqa+Glp7SPuX2EAuPjqUbLYx//WjnAxXMtJfW+UvPMO4Ra8gO+Er0tB0axKYsQ3a+aX2cFFaIaEyJ2E+sQ/NWOB0h3Blk7bdY= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1781636746; c=relaxed/simple; bh=XdcE3DQW4FSagY3cuhkBLFOnn6M5UpmtSaNK8MkKMdQ=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=m+cJ7Fw+K69uO14bvZjvCm092tycYTiYKNWgnagHHBVKjkdC9DA2xYd4kTm+8JcRbX2DESC85rEdAASD/0tLM6dyjn+NbQ9xgW/Fr7fWGC8bguaUOW93YNX0qROc1J8r45bh8nl1CZxJH1b4Dx4X2Qi4wBLM6o7dQHziv1K4LrQ= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=linuxfoundation.org header.i=@linuxfoundation.org header.b=t7VQnVh6; arc=none smtp.client-ip=100.103.45.18 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=linuxfoundation.org header.i=@linuxfoundation.org header.b="t7VQnVh6" Received: by smtp.kernel.org (Postfix) with ESMTPSA id DC7F41F000E9; Tue, 16 Jun 2026 19:05:44 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linuxfoundation.org; s=korg; t=1781636745; bh=AnDA/WfqPo+MQcBQGXSe75jU+wO+V9gLjPEjFYM0hLY=; h=From:To:Cc:Subject:Date:In-Reply-To:References; b=t7VQnVh6GyrLL42NUl0iJwgx9qvoL7XQIAqCUd6kO4ARmiEtKFCptZ1bqPHZ0u/EI JZ1FxU5cuKbRP8m90ltH/roPF5szWOryJFrawmtWHdUfuwt7FgZgVNRXEPEzvsy5iA 6Z6yawTMxPh9++zSGTDIoendN6YDE+RAt1kZvc98= From: Greg Kroah-Hartman To: stable@vger.kernel.org Cc: Greg Kroah-Hartman , patches@lists.linux.dev, Zeng Heng , Catalin Marinas , Sasha Levin Subject: [PATCH 5.10 298/342] arm64: tlb: Flush walk cache when unsharing PMD tables Date: Tue, 16 Jun 2026 20:29:54 +0530 Message-ID: <20260616145102.314351741@linuxfoundation.org> X-Mailer: git-send-email 2.54.0 In-Reply-To: <20260616145048.348037099@linuxfoundation.org> References: <20260616145048.348037099@linuxfoundation.org> User-Agent: quilt/0.69 X-stable: review X-Patchwork-Hint: ignore Precedence: bulk X-Mailing-List: patches@lists.linux.dev List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: 8bit 5.10-stable review patch. If anyone has any objections, please let me know. ------------------ From: Zeng Heng [ Upstream commit c2ff4764e03e7a8d758352f4aceb8fe1be6ac971 ] When huge_pmd_unshare() is called to unshare a PMD table, the tlb_unshare_pmd_ptdesc() function sets tlb->unshared_tables=true but the aarch64 tlb_flush() only checked tlb->freed_tables to determine whether to use TLBF_NONE (vae1is, invalidates walk cache) or TLBF_NOWALKCACHE (vale1is, leaf-only). This caused the stale PMD page table entry to remain in the walk cache after unshare, potentially leading to incorrect page table walks. Fix by including unshared_tables in the check, so that when unsharing tables, TLBF_NONE is used and the walk cache is properly invalidated. Here is the detailed distinction between vae1is and vale1is: | Instruction Combination | Actual Invalidation Scope | | ------------------------ | --------------------------------------------------| | `VAE1IS` + TTL=`0` | All entries at all levels (full invalidation) | | `VAE1IS` + TTL=`2` (L2) | Non-leaf at Level 0/1 + leaf at Level 2 | | `VALE1IS` + TTL=`0` | Leaf entries at all levels (non-leaf not cleared) | | `VALE1IS` + TTL=`2` (L2) | Leaf entry at Level 2 only | Signed-off-by: Zeng Heng Fixes: 8ce720d5bd91 ("mm/hugetlb: fix excessive IPI broadcasts when unsharing PMD tables using mmu_gather") Cc: Signed-off-by: Catalin Marinas Signed-off-by: Sasha Levin Signed-off-by: Greg Kroah-Hartman --- arch/arm64/include/asm/tlb.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) --- a/arch/arm64/include/asm/tlb.h +++ b/arch/arm64/include/asm/tlb.h @@ -53,7 +53,7 @@ static inline int tlb_get_level(struct m static inline void tlb_flush(struct mmu_gather *tlb) { struct vm_area_struct vma = TLB_FLUSH_VMA(tlb->mm, 0); - bool last_level = !tlb->freed_tables; + bool last_level = !(tlb->freed_tables || tlb->unshared_tables); unsigned long stride = tlb_get_unmap_size(tlb); int tlb_level = tlb_get_level(tlb);