From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-alma10-1.taild15c8.ts.net [100.103.45.18]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id CB83A33A9EB; Tue, 16 Jun 2026 17:13:46 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=100.103.45.18 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1781630027; cv=none; b=oUzQK1zWr0YwQJ3Qbh8FMR7ak19mqeglaDtB3NFgCYaRAOdVZPE62Qa1dMHLLmhsOxOETwz//xSzP/9COLPMDsLYAStNBFX2Nf1yezCamjUfRpdxXP8TE+FeMzCYcftcFngvKR1o55cQnCbW/yIIpXtF5dIwBYhKdwCf1toLkrs= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1781630027; c=relaxed/simple; bh=TbTIakoYyct7pJoFtUfMGYVkDFfwtctLWVaD1kBmWuU=; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References: MIME-Version; b=k5onNyu1iV8UrWl99mApdKfGQOSBV0zF4VQPn3FSxBNveQm6Ni/PolB9AiMPCoiwiGHCQcufNXqd3HYtywPpVWBVl+xSklNISuVi9Gr0XIML7eh2VP+aTRr+ang4Q0kXe71TTt2+m7+yJVne18DgBpdMCpzGJ08TmCXYDEkJoKo= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=linuxfoundation.org header.i=@linuxfoundation.org header.b=mpu8lncZ; arc=none smtp.client-ip=100.103.45.18 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=linuxfoundation.org header.i=@linuxfoundation.org header.b="mpu8lncZ" Received: by smtp.kernel.org (Postfix) with ESMTPSA id 620741F000E9; Tue, 16 Jun 2026 17:13:45 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linuxfoundation.org; s=korg; t=1781630026; bh=nfgq7LZNZ4RtCRbNClYhWtQeizh0uRbCrtoikFSbbgk=; h=From:To:Cc:Subject:Date:In-Reply-To:References; b=mpu8lncZBwLR+Et0Cp1Y8wOVE4zKf9lfuwWT8l75MpR3UB/BfZxQKp3gzQwDfoqpZ /mJQpQCnwMbMMnpnl7dbVgSP58mKk8/Yt7kUAv3CpkfMRzUxuIu8iNlGf0Y60FY/nJ PvhQWRRMwc1kMLAnzf2/Hm5eWtrVP25noVy8GtZ8= From: Greg Kroah-Hartman To: stable@vger.kernel.org Cc: Greg Kroah-Hartman , patches@lists.linux.dev, Zeng Heng , Catalin Marinas , Sasha Levin Subject: [PATCH 6.6 397/452] arm64: tlb: Flush walk cache when unsharing PMD tables Date: Tue, 16 Jun 2026 20:30:24 +0530 Message-ID: <20260616145137.729334018@linuxfoundation.org> X-Mailer: git-send-email 2.54.0 In-Reply-To: <20260616145117.796205997@linuxfoundation.org> References: <20260616145117.796205997@linuxfoundation.org> User-Agent: quilt/0.69 X-stable: review X-Patchwork-Hint: ignore Precedence: bulk X-Mailing-List: patches@lists.linux.dev List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: 8bit 6.6-stable review patch. If anyone has any objections, please let me know. ------------------ From: Zeng Heng [ Upstream commit c2ff4764e03e7a8d758352f4aceb8fe1be6ac971 ] When huge_pmd_unshare() is called to unshare a PMD table, the tlb_unshare_pmd_ptdesc() function sets tlb->unshared_tables=true but the aarch64 tlb_flush() only checked tlb->freed_tables to determine whether to use TLBF_NONE (vae1is, invalidates walk cache) or TLBF_NOWALKCACHE (vale1is, leaf-only). This caused the stale PMD page table entry to remain in the walk cache after unshare, potentially leading to incorrect page table walks. Fix by including unshared_tables in the check, so that when unsharing tables, TLBF_NONE is used and the walk cache is properly invalidated. Here is the detailed distinction between vae1is and vale1is: | Instruction Combination | Actual Invalidation Scope | | ------------------------ | --------------------------------------------------| | `VAE1IS` + TTL=`0` | All entries at all levels (full invalidation) | | `VAE1IS` + TTL=`2` (L2) | Non-leaf at Level 0/1 + leaf at Level 2 | | `VALE1IS` + TTL=`0` | Leaf entries at all levels (non-leaf not cleared) | | `VALE1IS` + TTL=`2` (L2) | Leaf entry at Level 2 only | Signed-off-by: Zeng Heng Fixes: 8ce720d5bd91 ("mm/hugetlb: fix excessive IPI broadcasts when unsharing PMD tables using mmu_gather") Cc: Signed-off-by: Catalin Marinas Signed-off-by: Sasha Levin Signed-off-by: Greg Kroah-Hartman --- arch/arm64/include/asm/tlb.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) --- a/arch/arm64/include/asm/tlb.h +++ b/arch/arm64/include/asm/tlb.h @@ -53,7 +53,7 @@ static inline int tlb_get_level(struct m static inline void tlb_flush(struct mmu_gather *tlb) { struct vm_area_struct vma = TLB_FLUSH_VMA(tlb->mm, 0); - bool last_level = !tlb->freed_tables; + bool last_level = !(tlb->freed_tables || tlb->unshared_tables); unsigned long stride = tlb_get_unmap_size(tlb); int tlb_level = tlb_get_level(tlb);