From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from mails.dpdk.org (mails.dpdk.org [217.70.189.124]) by smtp.lore.kernel.org (Postfix) with ESMTP id 29287CD98E6 for ; Wed, 17 Jun 2026 03:35:18 +0000 (UTC) Received: from mails.dpdk.org (localhost [127.0.0.1]) by mails.dpdk.org (Postfix) with ESMTP id 894D640679; Wed, 17 Jun 2026 05:34:51 +0200 (CEST) Received: from smtpbgau1.qq.com (smtpbgau1.qq.com [54.206.16.166]) by mails.dpdk.org (Postfix) with ESMTP id 6E65C40DDA; Wed, 17 Jun 2026 05:34:48 +0200 (CEST) X-QQ-mid: esmtpsz11t1781667276t1bc149f5 X-QQ-Originating-IP: nbIih+VQKg+C4DtRJtQ9QhikX9oSfI4JxjyBAOmQe3I= Received: from DSK-zaiyuwang.trustnetic.com ( [183.157.22.210]) by bizesmtp.qq.com (ESMTP) with id ; Wed, 17 Jun 2026 11:34:35 +0800 (CST) X-QQ-SSF: 0000000000000000000000000000000 X-QQ-GoodBg: 0 X-BIZMAIL-ID: 9281550850250718915 EX-QQ-RecipientCnt: 4 From: Zaiyu Wang To: dev@dpdk.org Cc: Zaiyu Wang , stable@dpdk.org, Jiawen Wu Subject: [PATCH v7 07/21] net/txgbe: fix Tx desc free logic Date: Wed, 17 Jun 2026 11:33:45 +0800 Message-Id: <20260617033400.376-8-zaiyuwang@trustnetic.com> X-Mailer: git-send-email 2.21.0.windows.1 In-Reply-To: <20260617033400.376-1-zaiyuwang@trustnetic.com> References: <20260423034024.14404-1-zaiyuwang@trustnetic.com> <20260617033400.376-1-zaiyuwang@trustnetic.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-QQ-SENDSIZE: 520 Feedback-ID: esmtpsz:trustnetic.com:qybglogicsvrsz:qybglogicsvrsz3b-0 X-QQ-XMAILINFO: Nc7Zc2EZZm5jduHUEcwL4ACtVLxemVnj6VX5v2N/Uwvg6v6aIcEuzh3a jR3l0BEX3G2Akn2PmrOSOYELUjNWGzAVxt0WqtcSjs4YrHtdRG2itUEYIDnfyIMk5AZUW9z ZGvUjWhgh35R9JaOonSYUxq/3qF/8/AE+l+v5H8VLcvXWLTh8174ia0rios8XK/XdgMw0a2 Fgr4qODtQeNxh2CUg49mrtxsUBZo2P87LZRNqB6HQNPCYqEtuQFj8z+Ygo1vTlFV1aE2yv3 jwcMRs4W1qD4lOr2zzc4WoMipOt8i5a1HfyRSWlsjWVIrkLzfMSVn8MvxoLJ3Bpln/nTgMA 8lioCu3zUfROHNhl0rLCZcvafWj+46O0g+MZhp8HlmJBNzaA9s4fXiGp8iAu7Ch4EHmOcAV EjpqpDVgG1DrGcJ8W8VOveM4FuL6QJxyjLNzdQByOtgqcjLh42Owk9c6RAEvJuNo55DYEBx yyu5/iGEzpOKpusDqjMl5p7ywdKtneMdd2zWOgmFoVdpD4ZyLnKxAbm4rDAZEdN/KZGWw6r vNk7KjGMEk67eg7mASkTK8J650Zum0M9BAWjY10Gb0P40+RhV+iCKGnPxo2unEL7WB8h7Uq q3Y00CKnBWIWYB9Igh7RIPHcM+W6gJ8EPQ2bzSDVU56yrdNGSSTS/deo4sz3LSC6bPNs/HT NHjPMgorOnbIjsGyBqTPPt8YDC0ih5vBSt6CwIUv7le/fFe0aB9Q+L+uZwp5h4L174586Ih trt6fWiSG9lN2/2Pr9IiIR8aCpiaS0VApcKTfuhQ6Q74r/mgyP8jlBKmLT54NBkgbguKvEw nM/MI9wnUuTNstHHxSvvz9VWnqpWs88ZrLH1y84sryiRY/61fvDsmE/HTzXyvs3qbSL0Vfl veCG356+NC6uLg99gQpFb0uZnX2emvM+entCykCyDPI4hM22CclkUsJxT0k1VMvZWOiEX8d St+84R3ZOkRFdOjkpDT2prSqyCH0uVG6QV2rDS3snUwzdKsZROCclKa4So14QX+ohSIwRRk njzpUF01LWTztIR5U7g1rUE/sGeNvT6o4XNumTNZTzKuNDGG57MMdZ4zqC3H3UR/mTSuNhx 0iJa6PgFTiVx4AZw1YG8+iaBBx7u2RAQ+tHt9oELa4w/R2bcKkJAic= X-QQ-XMRINFO: Mp0Kj//9VHAxzExpfF+O8yhSrljjwrznVg== X-QQ-RECHKSPAM: 0 X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org On some server environments, this driver caused TDM non-fatal errors or PCIe request errors during Tx operation In Amber-Lite NIC's Tx head write-back mode, the hardware periodically writes back a head index pointing to the next descriptor it is adout to process in Tx ring. All descriptors before the head are considered processed by hardware and can be safely freed by the driver. The root cause is that the driver can safely free a batch of descriptors only when the hardware's write-back head pointer has advanced beyond all descriptors in that batch, meaning they have all been processed by the hardware. If the driver frees a descriptor before the hardware has finished processing it, invalid memory access may occur, leading to the observed bug. To fix the issue, correct the boundary check in all three Tx cleanup functions, each of which was missing the proper condition to prevent freeing unprocessed descriptors. Fixes: 8ada71d0bb7f ("net/txgbe: add Tx head write-back mode for Amber-Lite") Cc: stable@dpdk.org Signed-off-by: Zaiyu Wang --- drivers/net/txgbe/txgbe_rxtx.c | 16 +++++------ drivers/net/txgbe/txgbe_rxtx.h | 35 +++++++++++++++++++++++ drivers/net/txgbe/txgbe_rxtx_vec_common.h | 10 +++---- 3 files changed, 48 insertions(+), 13 deletions(-) diff --git a/drivers/net/txgbe/txgbe_rxtx.c b/drivers/net/txgbe/txgbe_rxtx.c index e2cd9b8841..d6efb3b8cc 100644 --- a/drivers/net/txgbe/txgbe_rxtx.c +++ b/drivers/net/txgbe/txgbe_rxtx.c @@ -98,12 +98,11 @@ txgbe_tx_free_bufs(struct txgbe_tx_queue *txq) if (tx_last_dd >= txq->nb_tx_desc) tx_last_dd -= txq->nb_tx_desc; - volatile uint16_t head = (uint16_t)*txq->headwb_mem; + uint32_t h = rte_atomic_load_explicit(txq->headwb_mem, + rte_memory_order_acquire); + const uint16_t head = (uint16_t)h; - if (txq->tx_next_dd > head && head > tx_last_dd) - return 0; - else if (tx_last_dd > txq->tx_next_dd && - (head > tx_last_dd || head < txq->tx_next_dd)) + if (!txgbe_tx_headwb_desc_done(head, tx_last_dd, txq->tx_next_dd)) return 0; } else { /* check DD bit on threshold descriptor */ @@ -645,12 +644,13 @@ txgbe_xmit_cleanup(struct txgbe_tx_queue *txq) status = txr[desc_to_clean_to].dw3; if (txq->headwb_mem) { - u32 head = *txq->headwb_mem; + uint32_t h = rte_atomic_load_explicit(txq->headwb_mem, + rte_memory_order_acquire); + const uint16_t head = (uint16_t)h; PMD_TX_FREE_LOG(DEBUG, "queue[%02d]: headwb_mem = %03d, desc_to_clean_to = %03d", txq->reg_idx, head, desc_to_clean_to); - /* we have caught up to head, no work left to do */ - if (desc_to_clean_to == head) + if (!txgbe_tx_headwb_desc_done(head, last_desc_cleaned, desc_to_clean_to)) return -(1); } else { if (!(status & rte_cpu_to_le_32(TXGBE_TXD_DD))) { diff --git a/drivers/net/txgbe/txgbe_rxtx.h b/drivers/net/txgbe/txgbe_rxtx.h index 02e2617cce..43c818cfbf 100644 --- a/drivers/net/txgbe/txgbe_rxtx.h +++ b/drivers/net/txgbe/txgbe_rxtx.h @@ -426,6 +426,41 @@ struct txgbe_txq_ops { void (*reset)(struct txgbe_tx_queue *txq); }; +/** + * Check whether Tx descriptors in the range (last, next] are done + * in Tx head write-back mode. + * + * In head write-back mode, the hardware periodically updates *headwb_mem + * with the index of the next descriptor it will process. + * All descriptors before the head are considered processed by hardware and can + * be safely freed. The descriptor pointed to by head itself is not yet processed. + * + * @param head + * Current hardware head index read from headwb_mem. + * @param last + * The highest-index descriptor cleaned in the previous round + * (exclusive: descriptors at or before this index are already freed). + * @param next + * The highest-index descriptor to be cleaned in this round + * (inclusive: this descriptor is the target of the current cleanup). + * @return + * true if all descriptors in the range (last, next] have been completed + * by hardware and can be freed, false otherwise. + */ +static inline bool +txgbe_tx_headwb_desc_done(uint16_t head, uint16_t last, uint16_t next) +{ + if (next == head) + return false; + else if (next > head && head > last) + return false; + /* wrap case */ + else if (last > next && (head > last || head < next)) + return false; + + return true; +} + /* Takes an ethdev and a queue and sets up the tx function to be used based on * the queue parameters. Used in tx_queue_setup by primary process and then * in dev_init by secondary process when attaching to an existing ethdev. diff --git a/drivers/net/txgbe/txgbe_rxtx_vec_common.h b/drivers/net/txgbe/txgbe_rxtx_vec_common.h index 00847d087b..77d7ff785b 100644 --- a/drivers/net/txgbe/txgbe_rxtx_vec_common.h +++ b/drivers/net/txgbe/txgbe_rxtx_vec_common.h @@ -94,11 +94,11 @@ txgbe_tx_free_bufs(struct txgbe_tx_queue *txq) txq->tx_next_dd - txq->tx_free_thresh; if (tx_last_dd >= txq->nb_tx_desc) tx_last_dd -= txq->nb_tx_desc; - volatile uint16_t head = (uint16_t)*txq->headwb_mem; - if (txq->tx_next_dd > head && head > tx_last_dd) - return 0; - else if (tx_last_dd > txq->tx_next_dd && - (head > tx_last_dd || head < txq->tx_next_dd)) + uint32_t h = rte_atomic_load_explicit(txq->headwb_mem, + rte_memory_order_acquire); + const uint16_t head = (uint16_t)h; + + if (!txgbe_tx_headwb_desc_done(head, tx_last_dd, txq->tx_next_dd)) return 0; } else { /* check DD bit on threshold descriptor */ -- 2.21.0.windows.1