From: sashiko-bot@kernel.org
To: "Praveen Talari" <praveen.talari@oss.qualcomm.com>
Cc: robh@kernel.org, conor+dt@kernel.org, devicetree@vger.kernel.org
Subject: Re: [PATCH v7 1/6] dt-bindings: i2c: Describe SA8255p
Date: Wed, 17 Jun 2026 05:04:10 +0000 [thread overview]
Message-ID: <20260617050410.E298A1F000E9@smtp.kernel.org> (raw)
In-Reply-To: <20260617-enable-i2c-on-sa8255p-v7-1-ad736dbeab57@oss.qualcomm.com>
Thank you for your contribution! Sashiko AI review found 2 potential issue(s) to consider:
- [Medium] Incomplete schema requirements for power domains.
- [Low] Missing `#address-cells` and `#size-cells` in the example block.
--
commit 028881c69d7286ec4ecd4e0f30436fe9b7b8594c
Author: Praveen Talari <praveen.talari@oss.qualcomm.com>
dt-bindings: i2c: Describe SA8255p
Add DT bindings for the QUP GENI I2C controller on sa8255p platforms.
The platform abstracts resources in firmware via SCMI and uses TZ for
Serial Engine management, omitting standard SE properties.
> diff --git a/Documentation/devicetree/bindings/i2c/qcom,sa8255p-geni-i2c.yaml b/Documentation/devicetree/bindings/i2c/qcom,sa8255p-geni-i2c.yaml
> new file mode 100644
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/i2c/qcom,sa8255p-geni-i2c.yaml
[ ... ]
> +properties:
> + compatible:
> + const: qcom,sa8255p-geni-i2c
[ ... ]
> + power-domains:
> + maxItems: 2
[Severity: Medium]
Since the SA8255p platform requires both the power and perf domains to
function properly, should this also specify minItems: 2? Currently,
maxItems: 2 implicitly defaults to minItems: 1, allowing a configuration
with missing domains to pass schema validation.
> +
> + power-domain-names:
> + items:
> + - const: power
> + - const: perf
> +
> +required:
> + - compatible
> + - reg
> + - interrupts
> + - power-domains
[Severity: Medium]
Should power-domain-names also be included in the required block?
Without it, an incomplete device tree node could pass schema validation but
fail at runtime when the driver attempts to request the missing domains by
name.
> +
> +allOf:
> + - $ref: /schemas/i2c/i2c-controller.yaml#
> +
> +unevaluatedProperties: false
> +
> +examples:
> + - |
> + #include <dt-bindings/interrupt-controller/arm-gic.h>
> + #include <dt-bindings/dma/qcom-gpi.h>
> +
> + i2c@a90000 {
> + compatible = "qcom,sa8255p-geni-i2c";
[Severity: Low]
Does this example need #address-cells and #size-cells properties?
Because the schema inherits from i2c-controller.yaml, an I2C controller
node is inherently treated as a bus requiring #address-cells = <1> and
#size-cells = <0>. Omitting these might trigger a dt_binding_check schema
validation error.
> + reg = <0xa90000 0x4000>;
> + interrupts = <GIC_SPI 357 IRQ_TYPE_LEVEL_HIGH>;
[ ... ]
--
Sashiko AI review · https://sashiko.dev/#/patchset/20260617-enable-i2c-on-sa8255p-v7-0-ad736dbeab57@oss.qualcomm.com?part=1
next prev parent reply other threads:[~2026-06-17 5:04 UTC|newest]
Thread overview: 13+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-06-17 4:50 [PATCH v7 0/6] Enable I2C on SA8255p Qualcomm platforms Praveen Talari
2026-06-17 4:50 ` [PATCH v7 1/6] dt-bindings: i2c: Describe SA8255p Praveen Talari
2026-06-17 5:04 ` sashiko-bot [this message]
2026-06-17 4:50 ` [PATCH v7 2/6] i2c: qcom-geni: Isolate serial engine setup Praveen Talari
2026-06-17 5:00 ` sashiko-bot
2026-06-17 4:50 ` [PATCH v7 3/6] i2c: qcom-geni: Move resource initialization to separate function Praveen Talari
2026-06-17 5:05 ` sashiko-bot
2026-06-17 4:50 ` [PATCH v7 4/6] i2c: qcom-geni: Use resources helper APIs in runtime PM functions Praveen Talari
2026-06-17 5:06 ` sashiko-bot
2026-06-17 4:50 ` [PATCH v7 5/6] i2c: qcom-geni: Store of_device_id data in driver private struct Praveen Talari
2026-06-17 5:02 ` sashiko-bot
2026-06-17 4:50 ` [PATCH v7 6/6] i2c: qcom-geni: Enable I2C on SA8255p Qualcomm platforms Praveen Talari
2026-06-17 5:06 ` sashiko-bot
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