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Tue, 16 Jun 2026 23:53:46 -0700 (PDT) From: To: , CC: , , , , , , , , , , , , Nitin Shetty J Subject: [PATCH net-next 1/2] octeontx2-af: reserve 4 PKINDs for skip-size custom use Date: Wed, 17 Jun 2026 12:23:16 +0530 Message-ID: <20260617065317.444341-2-nshettyj@marvell.com> X-Mailer: git-send-email 2.48.1 In-Reply-To: <20260617065317.444341-1-nshettyj@marvell.com> References: <20260617065317.444341-1-nshettyj@marvell.com> Precedence: bulk X-Mailing-List: linux-kernel@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Content-Type: text/plain X-Proofpoint-Reinject: loops=2 maxloops=12 X-Proofpoint-Spam-Details-Enc: AW1haW4tMjYwNjE3MDA2MiBTYWx0ZWRfX1uqGcp1UTG+J hESXjCzCeU8E4Hh3MZfC3acwA6FWwdPTkiZ540Fof+ZtyklCLW5R2uGecBJ4n03V0T49iq6eHwF HgwFv/Dbi/92j+ApV50/63cMfy35a0u90msJ+b/rzrhZ72dlN3ZZcGM5zo+hxQQaOhtf45IyWIY 7zcA0USSibR+dvLgurOqSRcfOyg+VUntzw6YiTYDkVaXGCnfPTTyKSPKvk9aOgc4TXy1ZLVIc89 r4jMKzGVte46RuCuOB/x3rbAy1uLmfuwO/mr2Fjgng4vWTIbEQqTAqBbDmi45p40jM/Gj4Yqzq0 UiIIrb8DGAbKkyVXpS2HQbDirUJhMCEWbxFuN0KKk4pC34G+uq4yt8fPMPRdNzMMiJVRC4M0gOC 3Yb+nsbyo8P5HqAiuXzHsxlMdFQvL0qki9/yPymUuA27avg/vMOOmi9Jwm1d4dCfW+iJrRbdTj/ WV0VaWlEA8CDBKzuwLQ== X-Proofpoint-ORIG-GUID: 0d5kO8ZmubiU9mvL6oAsCnx66w25CAKi X-Authority-Analysis: v=2.4 cv=JZqMa0KV c=1 sm=1 tr=0 ts=6a324480 cx=c_pps a=gIfcoYsirJbf48DBMSPrZA==:117 a=gIfcoYsirJbf48DBMSPrZA==:17 a=FelO9ux0wxsA:10 a=VkNPw1HP01LnGYTKEx00:22 a=l0iWHRpgs5sLHlkKQ1IR:22 a=EAYMVhzMl8SCOHhVQcBL:22 a=M5GUcnROAAAA:8 a=zuButbC3y48gSnXE8rEA:9 a=OBjm3rFKGHvpk9ecZwUJ:22 X-Proofpoint-Spam-Info: AW1haW4tMjYwNjE3MDA2MiBTYWx0ZWRfXyniWdaw/tAAp gVEUlZ8dW3u8byU5FbniKaBMVNrGxmBgk0DVeiB/m9i9DRr6aXvcamvAStdvaKWIvZwQqvpCxPR Sa0Pq8DBb3pO8Uho9KD1LqqNWdiNgLY= X-Proofpoint-GUID: aONU4KCP7MmYTyDUHaEo5G-S36J0UcK1 X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1143,Hydra:6.1.125,FMLib:17.12.100.49 definitions=2026-06-16_05,2026-06-16_02,2025-10-01_01 From: Kiran Kumar K The NPC block uses PKINDs to determine how incoming packets are parsed. Reserve PKINDs 46-49 (NPC_RX_SKIP_SIZE_PKIND) for configurable L2 skip-size use in the first pass, and PKINDs 50-53 (NPC_RX_CPT_SKIP_SIZE_PKIND) for the second pass where packets carry a CPT (Cryptographic Accelerator Unit) header. Add npc_set_skip_size_pkind() to program NPC_AF_PKINDX_ACTION0 for these reserved PKINDs with a user-supplied ptr_advance value representing the L2 size to skip. For the corresponding CPT PKINDs (pkind + 4), additionally configure the var_len_offset, var_len_mask, var_len_shift, and var_len_right fields so the NPC can extract the inner payload length from the CPT header. Update rvu_npc_set_parse_mode() to accept a new skip_size argument and dispatch to npc_set_skip_size_pkind() when the requested PKIND falls in the newly reserved range. Extend the npc_set_pkind mbox message struct with a skip_size field so PF/VF drivers can supply this value at run time. Advance NPC_UNRESERVED_PKIND_COUNT to NPC_RX_SKIP_SIZE_PKIND to reflect the updated reservation boundary. Signed-off-by: Kiran Kumar K Signed-off-by: Nitin Shetty J --- .../net/ethernet/marvell/octeontx2/af/mbox.h | 1 + .../net/ethernet/marvell/octeontx2/af/npc.h | 4 +- .../net/ethernet/marvell/octeontx2/af/rvu.h | 2 +- .../ethernet/marvell/octeontx2/af/rvu_nix.c | 2 +- .../ethernet/marvell/octeontx2/af/rvu_npc.c | 42 ++++++++++++++++++- 5 files changed, 46 insertions(+), 5 deletions(-) diff --git a/drivers/net/ethernet/marvell/octeontx2/af/mbox.h b/drivers/net/ethernet/marvell/octeontx2/af/mbox.h index e07fbf842b94..3761ceb830c3 100644 --- a/drivers/net/ethernet/marvell/octeontx2/af/mbox.h +++ b/drivers/net/ethernet/marvell/octeontx2/af/mbox.h @@ -804,6 +804,7 @@ struct npc_set_pkind { */ u8 var_len_off_mask; /* Mask for length with in offset */ u8 shift_dir; /* shift direction to get length of the header at var_len_off */ + u8 skip_size; /* l2 size to skip */ }; /* NPA mbox message formats */ diff --git a/drivers/net/ethernet/marvell/octeontx2/af/npc.h b/drivers/net/ethernet/marvell/octeontx2/af/npc.h index eaed172f1606..719b3618eeb5 100644 --- a/drivers/net/ethernet/marvell/octeontx2/af/npc.h +++ b/drivers/net/ethernet/marvell/octeontx2/af/npc.h @@ -161,10 +161,12 @@ enum npc_kpu_lh_ltype { * Software assigns pkind for each incoming port such as CGX * Ethernet interfaces, LBK interfaces, etc. */ -#define NPC_UNRESERVED_PKIND_COUNT NPC_RX_CPT_HDR_PTP_PKIND +#define NPC_UNRESERVED_PKIND_COUNT NPC_RX_SKIP_SIZE_PKIND enum npc_pkind_type { NPC_RX_LBK_PKIND = 0ULL, + NPC_RX_SKIP_SIZE_PKIND = 46ULL, + NPC_RX_CPT_SKIP_SIZE_PKIND = 50ULL, NPC_RX_CPT_HDR_PTP_PKIND = 54ULL, NPC_RX_CUSTOM_PRE_L2_PKIND = 55ULL, NPC_RX_VLAN_EXDSA_PKIND = 56ULL, diff --git a/drivers/net/ethernet/marvell/octeontx2/af/rvu.h b/drivers/net/ethernet/marvell/octeontx2/af/rvu.h index 7f3505ae6860..c5610f242687 100644 --- a/drivers/net/ethernet/marvell/octeontx2/af/rvu.h +++ b/drivers/net/ethernet/marvell/octeontx2/af/rvu.h @@ -1181,7 +1181,7 @@ void rvu_switch_enable_lbk_link(struct rvu *rvu, u16 pcifunc, bool ena); int rvu_npc_set_parse_mode(struct rvu *rvu, u16 pcifunc, u64 mode, u8 dir, u64 pkind, u8 var_len_off, u8 var_len_off_mask, - u8 shift_dir); + u8 shift_dir, u8 skip_size); int rvu_get_hwvf(struct rvu *rvu, int pcifunc); /* CN10K MCS */ diff --git a/drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c b/drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c index d8989395e875..2cb79c5bf689 100644 --- a/drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c +++ b/drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c @@ -5387,7 +5387,7 @@ void rvu_nix_lf_teardown(struct rvu *rvu, u16 pcifunc, int blkaddr, int nixlf) /* reset HW config done for Switch headers */ rvu_npc_set_parse_mode(rvu, pcifunc, OTX2_PRIV_FLAGS_DEFAULT, - (PKIND_TX | PKIND_RX), 0, 0, 0, 0); + (PKIND_TX | PKIND_RX), 0, 0, 0, 0, 0); /* Disabling CGX and NPC config done for PTP */ if (pfvf->hw_rx_tstamp_en) { diff --git a/drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c b/drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c index b4635d78f9d5..798f217f408d 100644 --- a/drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c +++ b/drivers/net/ethernet/marvell/octeontx2/af/rvu_npc.c @@ -4204,9 +4204,40 @@ npc_set_var_len_offset_pkind(struct rvu *rvu, u16 pcifunc, u64 pkind, return 0; } +static int npc_set_skip_size_pkind(struct rvu *rvu, u16 pcifunc, u64 pkind, + u8 skip_size) +{ + struct npc_kpu_action0 *act0; + int blkaddr; + u64 val; + + blkaddr = rvu_get_blkaddr(rvu, BLKTYPE_NPC, pcifunc); + if (blkaddr < 0) { + dev_err(rvu->dev, "%s: NPC block not implemented\n", __func__); + return -EINVAL; + } + + val = rvu_read64(rvu, blkaddr, NPC_AF_PKINDX_ACTION0(pkind)); + act0 = (struct npc_kpu_action0 *)&val; + act0->ptr_advance = skip_size; + rvu_write64(rvu, blkaddr, NPC_AF_PKINDX_ACTION0(pkind), val); + + /* Update CPT_HR new PKIND */ + val = rvu_read64(rvu, blkaddr, NPC_AF_PKINDX_ACTION0(pkind + 4)); + act0 = (struct npc_kpu_action0 *)&val; + act0->ptr_advance = (skip_size + 40); + act0->next_state = NPC_S_KPU1_CPT_HDR; + act0->var_len_offset = (skip_size + 6); + act0->var_len_mask = 0xe0; + act0->var_len_shift = 0x5; + act0->var_len_right = 0x1; + rvu_write64(rvu, blkaddr, NPC_AF_PKINDX_ACTION0(pkind + 4), val); + return 0; +} + int rvu_npc_set_parse_mode(struct rvu *rvu, u16 pcifunc, u64 mode, u8 dir, u64 pkind, u8 var_len_off, u8 var_len_off_mask, - u8 shift_dir) + u8 shift_dir, u8 skip_size) { struct rvu_pfvf *pfvf = rvu_get_pfvf(rvu, pcifunc); @@ -4228,6 +4259,12 @@ int rvu_npc_set_parse_mode(struct rvu *rvu, u16 pcifunc, u64 mode, u8 dir, shift_dir); if (rc) return rc; + } else if (pkind >= NPC_RX_SKIP_SIZE_PKIND && + pkind <= NPC_RX_SKIP_SIZE_PKIND + 3) { + rc = npc_set_skip_size_pkind(rvu, pcifunc, pkind, + skip_size); + if (rc) + return rc; } rxpkind = pkind; txpkind = pkind; @@ -4264,7 +4301,8 @@ int rvu_mbox_handler_npc_set_pkind(struct rvu *rvu, struct npc_set_pkind *req, { return rvu_npc_set_parse_mode(rvu, req->hdr.pcifunc, req->mode, req->dir, req->pkind, req->var_len_off, - req->var_len_off_mask, req->shift_dir); + req->var_len_off_mask, req->shift_dir, + req->skip_size); } int rvu_mbox_handler_npc_read_base_steer_rule(struct rvu *rvu, -- 2.48.1