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[88.187.86.199]) by smtp.gmail.com with ESMTPSA id 5b1f17b1804b1-49230a4ff67sm253214545e9.6.2026.06.18.05.30.59 for (version=TLS1_3 cipher=TLS_CHACHA20_POLY1305_SHA256 bits=256/256); Thu, 18 Jun 2026 05:30:59 -0700 (PDT) From: =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Subject: [PULL 21/48] target/arm/ptw: Restrict PMSAv8 code to TCG Date: Thu, 18 Jun 2026 14:27:58 +0200 Message-ID: <20260618122825.90331-22-philmd@oss.qualcomm.com> X-Mailer: git-send-email 2.53.0 In-Reply-To: <20260618122825.90331-1-philmd@oss.qualcomm.com> References: <20260618122825.90331-1-philmd@oss.qualcomm.com> MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit X-Proofpoint-Spam-Details-Enc: AW1haW4tMjYwNjE4MDExNiBTYWx0ZWRfX3PxPRNm6cCzS SoEIYpIYCTJRgzrLAv0M6FAbeZtiZ64MhLvOU1CDGsZeIqJxlCgryQJoH+EegDY4+Sk5OkfhROv TBXs62MehE1ZPHy0OGDx012sbwWq2MfM/iHtbdlFU2JcUvYIEm4aj+abKvxiXzXTBMC5ntyhiy7 fFgSQ2iq498EOJMf/FJBjZI3tSh+LvPcV5GgcZ0v5cfRrdrgrbqKlgQ04gFBKfhbyzheAgiSf9/ 7nbRhIP/bgJyNkGVZ2b5RqA4VNhS68mV/WlgQl7lOUj5hITczu6TugvcEKyUUDCWxZlUzef2Z4m kq8QSo8GbDX6ntk1ZLqexlQ4rnwZLzfMKIpf+yUl9e3uAcckSr5BrQ3BmzZuWOI9H3uDCHvX3Vi z/r5aza8aTQcxmsILCrBQKXo/2rKpTyGvOTGD5XrtJCcCM/OS9AF/sNRQ/kwlcTo+e3PYfJp20m GJpLv10ZAfBZGxBJNnw== X-Proofpoint-GUID: 3DBNcMUGlxrEqxOAiWVYTY_7g8y9LCJ9 X-Authority-Analysis: v=2.4 cv=HpVG3UTS c=1 sm=1 tr=0 ts=6a33e505 cx=c_pps a=N1BjEkVkxJi3uNfLdpvX3g==:117 a=4s3hRJSeHn4rkQlkrse1kQ==:17 a=IkcTkHD0fZMA:10 a=FelO9ux0wxsA:10 a=M51BFTxLslgA:10 a=s4-Qcg_JpJYA:10 a=VkNPw1HP01LnGYTKEx00:22 a=u7WPNUs3qKkmUXheDGA7:22 a=rJkE3RaqiGZ5pbrm-msn:22 a=EUspDBNiAAAA:8 a=KKAkSRfTAAAA:8 a=wSUaFbrerrTpWb88fUQA:9 a=3ZKOabzyN94A:10 a=QEXdDO2ut3YA:10 a=crWF4MFLhNY0qMRaF8an:22 a=cvBusfyB2V15izCimMoJ:22 X-Proofpoint-ORIG-GUID: 3DBNcMUGlxrEqxOAiWVYTY_7g8y9LCJ9 X-Proofpoint-Spam-Info: AW1haW4tMjYwNjE4MDExNiBTYWx0ZWRfX5xw3eBo8iK08 gkX70ONG5HlMGIS3CRBEoglQCtl26o/8O5DkMu8/H/pCSUIkTXOnDLqhJJUZllvTHR182wlrF6s Vp2tIbFeE0n9G4/opcMci1NkMBEZUfQ= X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1143,Hydra:6.1.125,FMLib:17.12.100.49 definitions=2026-06-18_01,2026-06-18_01,2025-10-01_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 lowpriorityscore=0 suspectscore=0 priorityscore=1501 malwarescore=0 clxscore=1015 adultscore=0 phishscore=0 bulkscore=0 spamscore=0 impostorscore=0 classifier=typeunknown authscore=0 authtc= authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.22.0-2606150000 definitions=main-2606180116 Received-SPF: pass client-ip=205.220.180.131; envelope-from=philmd@oss.qualcomm.com; helo=mx0b-0031df01.pphosted.com X-Spam_score_int: -27 X-Spam_score: -2.8 X-Spam_bar: -- X-Spam_report: (-2.8 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_LOW=-0.7, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: qemu development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Armv8-M Protected Memory System Architecture can only be emulated, therefore restrict it to TCG to avoid compiling it on hardware accelerators. Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Peter Maydell Message-Id: <20260616153432.92939-3-philmd@oss.qualcomm.com> --- target/arm/ptw.c | 20 +++++++++++++++++++- 1 file changed, 19 insertions(+), 1 deletion(-) diff --git a/target/arm/ptw.c b/target/arm/ptw.c index 8b54018c988..1470de30108 100644 --- a/target/arm/ptw.c +++ b/target/arm/ptw.c @@ -13,11 +13,13 @@ #include "exec/page-protection.h" #include "exec/target_page.h" #include "exec/tlb-flags.h" +#ifdef CONFIG_TCG #include "accel/tcg/probe.h" +#include "target/arm/tcg/idau.h" +#endif #include "cpu.h" #include "internals.h" #include "cpu-features.h" -#include "target/arm/tcg/idau.h" typedef struct S1Translate { /* @@ -2818,6 +2820,8 @@ static bool get_phys_addr_pmsav7(CPUARMState *env, return (ptw->in_prot_check & ~result->f.prot) == 0; } +#ifdef CONFIG_TCG + static uint32_t *regime_rbar(CPUARMState *env, ARMMMUIdx mmu_idx, uint32_t secure) { @@ -3247,6 +3251,20 @@ static bool get_phys_addr_pmsav8(CPUARMState *env, return ret; } +#else /* !CONFIG_TCG */ + +static bool get_phys_addr_pmsav8(CPUARMState *env, + S1Translate *ptw, + uint32_t address, + MMUAccessType access_type, + GetPhysAddrResult *result, + ARMMMUFaultInfo *fi) +{ + g_assert_not_reached(); +} + +#endif /* !CONFIG_TCG */ + /* * Translate from the 4-bit stage 2 representation of * memory attributes (without cache-allocation hints) to -- 2.53.0