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Tsirkin" Cc: qemu-devel@nongnu.org, anisinha@redhat.com, pbonzini@redhat.com, peter.maydell@linaro.org, shannon.zhaosl@gmail.com, philmd@linaro.org, zhao1.liu@intel.com, rad@semihalf.com, leif.lindholm@oss.qualcomm.com, qemu-arm@nongnu.org Subject: Re: [PATCH v2 07/21] arm: sbsa_gwdt: fixup default "clock-frequency" Message-ID: <20260618163838.5586e18d@imammedo> In-Reply-To: <20260603021313-mutt-send-email-mst@kernel.org> References: <20260303092532.2410177-1-imammedo@redhat.com> <20260303092532.2410177-8-imammedo@redhat.com> <20260603021313-mutt-send-email-mst@kernel.org> X-Mailer: Claws Mail 4.4.0 (GTK 3.24.52; x86_64-redhat-linux-gnu) MIME-Version: 1.0 X-Mimecast-Spam-Score: 0 X-Mimecast-MFC-PROC-ID: RlOhVT24yCqeZ5ibGYZmKCIq5MFM578U9gaqcDAzRKg_1781793521 X-Mimecast-Originator: redhat.com Content-Type: text/plain; charset=US-ASCII Content-Transfer-Encoding: 7bit Received-SPF: pass client-ip=170.10.129.124; envelope-from=imammedo@redhat.com; helo=us-smtp-delivery-124.mimecast.com X-Spam_score_int: -24 X-Spam_score: -2.5 X-Spam_bar: -- X-Spam_report: (-2.5 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=-0.445, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, RCVD_IN_MSPIKE_H3=0.001, RCVD_IN_MSPIKE_WL=0.001, SPF_HELO_PASS=-0.001, SPF_PASS=-0.001 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-arm@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-arm-bounces+qemu-arm=archiver.kernel.org@nongnu.org Sender: qemu-arm-bounces+qemu-arm=archiver.kernel.org@nongnu.org On Wed, 3 Jun 2026 02:15:01 -0400 "Michael S. Tsirkin" wrote: > On Tue, Mar 03, 2026 at 10:25:18AM +0100, Igor Mammedov wrote: > > Comment about keeping legacy freq, is wrong to begin with > > (should be 62.5MHz), but that value also doesn't make > > sense anymore as the watchdog is used only by un-versioned > > SBSA board and the later has hard-coded it to 1GHz. > > > > Other potential user (arm/virt) also has system clock at 1GHz. > > > > Drop misleading comment about legacy and set default to 1GHz > > to match both boards. > > > > Signed-off-by: Igor Mammedov > > > if I take this in isolation then make check seems to fail > on qemu:qtest-arm/aspeed_smc-test. it works over here, it must have been a glitch, gwdt isn't used by this board, the sole user of it is hw/arm/sbsa-ref.c at this point > > follow up patches fix it, but I think it has to be reordered > to avoid breaking bisect. > > > > > --- > > hw/watchdog/sbsa_gwdt.c | 5 ++--- > > 1 file changed, 2 insertions(+), 3 deletions(-) > > > > diff --git a/hw/watchdog/sbsa_gwdt.c b/hw/watchdog/sbsa_gwdt.c > > index 7ade5c6f18..b739a3ce3c 100644 > > --- a/hw/watchdog/sbsa_gwdt.c > > +++ b/hw/watchdog/sbsa_gwdt.c > > @@ -264,11 +264,10 @@ static void wdt_sbsa_gwdt_realize(DeviceState *dev, Error **errp) > > static const Property wdt_sbsa_gwdt_props[] = { > > /* > > * Timer frequency in Hz. This must match the frequency used by > > - * the CPU's generic timer. Default 62.5Hz matches QEMU's legacy > > - * CPU timer frequency default. > > + * the CPU's generic timer. > > */ > > DEFINE_PROP_UINT64("clock-frequency", struct SBSA_GWDTState, freq, > > - 62500000), > > + 1000000000), > > }; > > > > static void wdt_sbsa_gwdt_class_init(ObjectClass *klass, const void *data) > > -- > > 2.47.3 >