From: sashiko-bot@kernel.org
To: tze.yee.ng@altera.com
Cc: linux-hwmon@vger.kernel.org, conor+dt@kernel.org,
devicetree@vger.kernel.org, robh@kernel.org
Subject: Re: [PATCH 1/5] dt-bindings: hwmon: add Altera Stratix 10 hardware monitor binding
Date: Fri, 19 Jun 2026 09:46:08 +0000 [thread overview]
Message-ID: <20260619094608.8167A1F000E9@smtp.kernel.org> (raw)
In-Reply-To: <ac5a118394e96f707823463fedd32b6a484c1ceb.1781861409.git.tze.yee.ng@altera.com>
Thank you for your contribution! Sashiko AI review found 4 potential issue(s) to consider:
- [Medium] The pattern property `^input(@[0-9a-f]+)?$` allows child nodes with a `reg` property to omit the unit-address, violating Devicetree specifications.
- [Medium] The `reg` property in the child input nodes is missing `maxItems: 1`, allowing multiple register entries.
- [Low] The MAINTAINERS file entries are not sorted alphabetically.
- [Low] The Signed-off-by chain does not match the patch authorship.
--
commit d11da1e6aa7b26667b6a632670fdfdcc9fd27dee
Author: Tze Yee Ng <tze.yee.ng@altera.com>
dt-bindings: hwmon: add Altera Stratix 10 hardware monitor binding
This commit documents the device tree binding for the Altera Stratix 10
SoC FPGA hardware monitor. It adds bindings for temperature and voltage
sensor nodes.
> Author: Tze Yee Ng <tze.yee.ng@altera.com>
> Date: Fri Jun 19 09:38:52 2026 +0000
>
> dt-bindings: hwmon: add Altera Stratix 10 hardware monitor binding
>
> Document the device tree binding for the Altera Stratix 10 SoC FPGA
> hardware monitor, including temperature and voltage sensor nodes.
>
> Signed-off-by: Nazim Amirul <muhammad.nazim.amirul.nazle.asmade@altera.com>
> Signed-off-by: Tze Yee Ng <tze.yee.ng@altera.com>
[Severity: Low]
The commit author is Tze Yee Ng, but the first Signed-off-by tag belongs
to Nazim Amirul.
According to the patch submission guidelines, the primary author must be
the first person to sign off on the patch.
Should the authorship be corrected with a From: line in the commit message
body, or should the Signed-off-by order be fixed?
> diff --git a/Documentation/devicetree/bindings/hwmon/altr,stratix10-hwmon.yaml b/Documentation/devicetree/bindings/hwmon/altr,stratix10-hwmon.yaml
> new file mode 100644
> index 0000000000000..5bd98660ee7b0
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/hwmon/altr,stratix10-hwmon.yaml
[ ... ]
> + temperature:
> + description:
> + The temperature node specifies mappings of temperature sensor diodes on
> + the Stratix 10 SoC FPGA main die and tile die.
> + type: object
> + properties:
> + '#address-cells':
> + const: 1
> + '#size-cells':
> + const: 0
> + patternProperties:
> + "^input(@[0-9a-f]+)?$":
[Severity: Medium]
The Devicetree specification requires that if a node has a reg property,
its name must include a unit-address matching the first address in reg.
The regex ^input(@[0-9a-f]+)?$ makes the unit-address optional, which
allows dt-validate to pass syntactically invalid device trees.
Could this be updated to require the unit-address when a reg property
is present?
> + description:
> + The input node specifies each individual temperature sensor.
> + type: object
> + properties:
> + reg:
> + description:
[Severity: Medium]
The reg property in the child input nodes is missing maxItems: 1.
Because dt-schema treats reg as an array of arrays, omitting this allows
a device tree to specify an arbitrary number of register pairs, which
would erroneously pass schema validation.
Should maxItems be added here to restrict it to a single entry?
[ ... ]
> + voltage:
> + description:
> + The voltage node specifies mappings of voltage sensors on the Stratix 10
> + SoC FPGA analog to digital converter of the Secure Device Manager (SDM).
> + type: object
> + properties:
> + '#address-cells':
> + const: 1
> + '#size-cells':
> + const: 0
> + patternProperties:
> + "^input(@[0-9a-f]+)?$":
[Severity: Medium]
Similar to the temperature node, this regex makes the unit-address optional.
Does this pattern allow child nodes with a reg property to omit the
unit-address, violating Devicetree specifications?
> + description:
> + The input node specifies each individual voltage sensor.
> + type: object
> + properties:
> + reg:
> + description:
[Severity: Medium]
The reg property here is also missing maxItems: 1.
Can we add a maximum item constraint to ensure multiple register entries
are not allowed for voltage sensors?
[ ... ]
> diff --git a/MAINTAINERS b/MAINTAINERS
> index bcd09e02337b8..5a07cefe3aeee 100644
> --- a/MAINTAINERS
> +++ b/MAINTAINERS
> @@ -938,6 +938,13 @@ ALPS PS/2 TOUCHPAD DRIVER
> R: Pali Rohár <pali@kernel.org>
> F: drivers/input/mouse/alps.*
>
> +ALTERA STRATIX 10 SoC FPGA HWMON DRIVER
> +M: Nazim Amirul <muhammad.nazim.amirul.nazle.asmade@altera.com>
> +M: Tze Yee Ng <tze.yee.ng@altera.com>
> +L: linux-hwmon@vger.kernel.org
> +S: Maintained
> +F: Documentation/devicetree/bindings/hwmon/altr,stratix10-hwmon.yaml
> +
> ALTERA MAILBOX DRIVER
[Severity: Low]
The MAINTAINERS file entries are typically sorted alphabetically to
maintain organization and avoid merge conflicts.
Here, ALTERA STRATIX 10 SoC FPGA HWMON DRIVER is placed before
ALTERA MAILBOX DRIVER.
Should this block be moved further down to maintain alphabetical order?
--
Sashiko AI review · https://sashiko.dev/#/patchset/cover.1781861409.git.tze.yee.ng@altera.com?part=1
next prev parent reply other threads:[~2026-06-19 9:46 UTC|newest]
Thread overview: 11+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-06-19 9:38 [PATCH 0/5] hwmon: add Altera Stratix 10 SoC FPGA hardware monitor support tze.yee.ng
2026-06-19 9:38 ` [PATCH 1/5] dt-bindings: hwmon: add Altera Stratix 10 hardware monitor binding tze.yee.ng
2026-06-19 9:46 ` sashiko-bot [this message]
2026-06-19 9:38 ` [PATCH 2/5] dt-bindings: firmware: svc: add hwmon property tze.yee.ng
2026-06-19 9:44 ` sashiko-bot
2026-06-19 9:38 ` [PATCH 3/5] firmware: stratix10-svc: add async HWMON read commands tze.yee.ng
2026-06-19 9:51 ` sashiko-bot
2026-06-19 9:38 ` [PATCH 4/5] hwmon: add Stratix 10 SoC FPGA hardware monitor driver tze.yee.ng
2026-06-19 11:55 ` sashiko-bot
2026-06-19 9:38 ` [PATCH 5/5] arm64: dts: socfpga: stratix10: add hwmon node tze.yee.ng
2026-06-19 9:49 ` sashiko-bot
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