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[83.28.44.19]) by smtp.gmail.com with ESMTPSA id 5b1f17b1804b1-4923fe7b359sm350117885e9.9.2026.06.23.03.18.51 (version=TLS1_2 cipher=AES128-SHA bits=128/128); Tue, 23 Jun 2026 03:18:51 -0700 (PDT) Date: Tue, 23 Jun 2026 12:18:47 +0200 From: Michal Pecio To: Xincheng Zhang Cc: Mathias Nyman , Greg Kroah-Hartman , linux-usb@vger.kernel.org, linux-kernel@vger.kernel.org, Forest Crossman Subject: Re: [PATCH] usb: xhci-pci: Disable 64-bit DMA for VIA VL805 Message-ID: <20260623121847.53749028.michal.pecio@gmail.com> In-Reply-To: <20260623-xhci-via-dma-fix-v1-1-3f12c81a1cf8@ultrarisc.com> References: <20260623-xhci-via-dma-fix-v1-1-3f12c81a1cf8@ultrarisc.com> Precedence: bulk X-Mailing-List: linux-usb@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset=US-ASCII Content-Transfer-Encoding: 7bit On Tue, 23 Jun 2026 15:32:02 +0800, Xincheng Zhang wrote: > The VIA VL805 XHCI controller (Device ID 0x3483) fails to handle DMA > addresses correctly when they exceed 0x1000000000 (64GB). On systems > with large amounts of RAM, this hardware limitation causes device > failures. > > Add the XHCI_NO_64BIT_SUPPORT quirk to restrict DMA addressing to > 32-bit, preventing the controller from receiving addresses beyond its > hardware limit. > > Signed-off-by: Xincheng Zhang It could make sense to put a fix for this in stable too. But I don't like this abuse of the quirk. Firstly, it causes unnecessary bouncing on systems with >4GB RAM and no IOMMU. I found other drivers that use DMA_BIT_MASK(36) or even weirder numbers, so it seems that we too could request 64 gigs exactly with a bit of driver refactoring. Secondly, it makes the driver pretend that AC64 capability is absent. Differences go beyond address bits, notably including register width and whether QWORD or only DWORD writes cane be used. For example, if we want to improve command abort on AC64 chips using QWORD writes, we will need to know the true state of this capability, regarless of whether the chip really implements all 64 address bits or not. Forest, you have added a number of similar quirks for ASMedia chips. Do you happen to know what is their real address width? I think it might prove useful to have this on record. Regards, Michal