From: Aditya Gupta <adityag@linux.ibm.com>
To: qemu-devel@nongnu.org, qemu-ppc@nongnu.org,
"Harsh Prateek Bora" <harshpb@linux.ibm.com>,
"Cédric Le Goater" <clg@redhat.com>,
"Philippe Mathieu-Daudé" <philmd@oss.qualcomm.com>,
"Shivang Upadhyay" <shivangu@linux.ibm.com>
Cc: Sourabh Jain <sourabhjain@linux.ibm.com>,
Hari Bathini <hbathini@linux.ibm.com>,
Nicholas Piggin <npiggin@gmail.com>,
Miles Glenn <milesg@linux.ibm.com>,
Fabiano Rosas <farosas@suse.de>,
Laurent Vivier <lvivier@redhat.com>,
Paolo Bonzini <pbonzini@redhat.com>,
devel@lists.libvirt.org, Misbah Anjum N <misanjum@linux.ibm.com>,
Anushree Mathur <anushree.mathur@linux.ibm.com>,
Pierrick Bouvier <pierrick.bouvier@oss.qualcomm.com>,
kvm@vger.kernel.org, Gautam Menghani <gautam@linux.ibm.com>,
Chinmay Rath <rathc@linux.ibm.com>
Subject: [PATCH 3/8] tests/qtest: Add Power11 chip & machine to qtests
Date: Tue, 23 Jun 2026 19:49:28 +0530 [thread overview]
Message-ID: <20260623141933.577981-4-adityag@linux.ibm.com> (raw)
In-Reply-To: <20260623141933.577981-1-adityag@linux.ibm.com>
Previously the machines/chips tested by qtest was till Power10, update
the tests to also test PowerNV11 and Power11 PNV Chip
Since if-else-if ladder was common pattern to get machine type,
implement pnv_get_machine_type so new processor cases can be implemented
in one location in pnv_get_machine_type
Signed-off-by: Aditya Gupta <adityag@linux.ibm.com>
---
tests/qtest/pnv-host-i2c-test.c | 7 +++----
tests/qtest/pnv-spi-seeprom-test.c | 2 +-
tests/qtest/pnv-xive2-test.c | 2 +-
tests/qtest/pnv-xscom-test.c | 19 ++++-------------
tests/qtest/pnv-xscom.h | 33 +++++++++++++++++++++++++++---
5 files changed, 39 insertions(+), 24 deletions(-)
diff --git a/tests/qtest/pnv-host-i2c-test.c b/tests/qtest/pnv-host-i2c-test.c
index 51e613ebdcb2..d3f9c49d8271 100644
--- a/tests/qtest/pnv-host-i2c-test.c
+++ b/tests/qtest/pnv-host-i2c-test.c
@@ -402,15 +402,14 @@ static void reset_all(QTestState *qts, const PnvChip *chip)
static void test_host_i2c(const void *data)
{
const PnvChip *chip = data;
+ const char *machine = pnv_get_machine_type(chip->chip_type);
QTestState *qts;
- const char *machine = "powernv8";
PnvI2cCtlr ctlr;
PnvI2cDev pca9552;
PnvI2cDev pca9554;
- if (chip->chip_type == PNV_CHIP_POWER9) {
- machine = "powernv9";
- } else if (chip->chip_type == PNV_CHIP_POWER10) {
+ /* i2c is initialised for rainier in case of P10 */
+ if (chip->chip_type == PNV_CHIP_POWER10) {
machine = "powernv10-rainier";
}
diff --git a/tests/qtest/pnv-spi-seeprom-test.c b/tests/qtest/pnv-spi-seeprom-test.c
index 721129cd39ab..5141df2dae01 100644
--- a/tests/qtest/pnv-spi-seeprom-test.c
+++ b/tests/qtest/pnv-spi-seeprom-test.c
@@ -77,7 +77,7 @@ static void test_spi_seeprom(const void *data)
const PnvChip *chip = data;
QTestState *qts = NULL;
g_autofree char *tmp_path = NULL;
- const char *machine = "powernv10";
+ const char *machine = pnv_get_machine_type(chip->chip_type);
int ret;
int fd;
diff --git a/tests/qtest/pnv-xive2-test.c b/tests/qtest/pnv-xive2-test.c
index 5313d4ef18b7..80de9d09ed09 100644
--- a/tests/qtest/pnv-xive2-test.c
+++ b/tests/qtest/pnv-xive2-test.c
@@ -548,7 +548,7 @@ static void test_xive(void)
{
QTestState *qts;
- qts = qtest_initf("-M powernv10 -smp %d,cores=1,threads=%d -nographic "
+ qts = qtest_initf("-M powernv11 -smp %d,cores=1,threads=%d -nographic "
"-nodefaults -serial mon:stdio -S "
"-d guest_errors -trace '*xive*'",
SMT, SMT);
diff --git a/tests/qtest/pnv-xscom-test.c b/tests/qtest/pnv-xscom-test.c
index c814c0f4f5b1..6e52d71f4aaa 100644
--- a/tests/qtest/pnv-xscom-test.c
+++ b/tests/qtest/pnv-xscom-test.c
@@ -28,15 +28,9 @@ static void test_xscom_cfam_id(QTestState *qts, const PnvChip *chip)
static void test_cfam_id(const void *data)
{
const PnvChip *chip = data;
- const char *machine = "powernv8";
+ const char *machine = pnv_get_machine_type(chip->chip_type);
QTestState *qts;
- if (chip->chip_type == PNV_CHIP_POWER9) {
- machine = "powernv9";
- } else if (chip->chip_type == PNV_CHIP_POWER10) {
- machine = "powernv10";
- }
-
qts = qtest_initf("-M %s -accel tcg -cpu %s",
machine, chip->cpu_model);
test_xscom_cfam_id(qts, chip);
@@ -57,7 +51,8 @@ static void test_cfam_id(const void *data)
static void test_xscom_core(QTestState *qts, const PnvChip *chip)
{
- if (chip->chip_type == PNV_CHIP_POWER10) {
+ if ((chip->chip_type == PNV_CHIP_POWER10) ||
+ (chip->chip_type == PNV_CHIP_POWER11)) {
uint32_t first_core_thread_state =
PNV_XSCOM_P10_EC_BASE(chip->first_core) + 0x412;
uint64_t thread_state;
@@ -84,14 +79,8 @@ static void test_xscom_core(QTestState *qts, const PnvChip *chip)
static void test_core(const void *data)
{
const PnvChip *chip = data;
+ const char *machine = pnv_get_machine_type(chip->chip_type);
QTestState *qts;
- const char *machine = "powernv8";
-
- if (chip->chip_type == PNV_CHIP_POWER9) {
- machine = "powernv9";
- } else if (chip->chip_type == PNV_CHIP_POWER10) {
- machine = "powernv10";
- }
qts = qtest_initf("-M %s -accel tcg -cpu %s",
machine, chip->cpu_model);
diff --git a/tests/qtest/pnv-xscom.h b/tests/qtest/pnv-xscom.h
index 5aa1701ea768..8f05f59a1436 100644
--- a/tests/qtest/pnv-xscom.h
+++ b/tests/qtest/pnv-xscom.h
@@ -9,6 +9,9 @@
#ifndef PNV_XSCOM_H
#define PNV_XSCOM_H
+#include <stdint.h>
+#include <assert.h>
+
#define SMT 4 /* some tests will break if less than 4 */
typedef enum PnvChipType {
@@ -17,6 +20,7 @@ typedef enum PnvChipType {
PNV_CHIP_POWER8NVL, /* AKA Naples */
PNV_CHIP_POWER9, /* AKA Nimbus */
PNV_CHIP_POWER10,
+ PNV_CHIP_POWER11,
} PnvChipType;
typedef struct PnvChip {
@@ -60,15 +64,23 @@ static const PnvChip pnv_chips[] = {
.first_core = 0x0,
.num_i2c = 4,
},
+ {
+ .chip_type = PNV_CHIP_POWER11,
+ .cpu_model = "Power11",
+ .xscom_base = 0x000603fc00000000ull,
+ .cfam_id = 0x220da04980000000ull,
+ .first_core = 0x0,
+ .num_i2c = 0,
+ },
};
static inline uint64_t pnv_xscom_addr(const PnvChip *chip, uint32_t pcba)
{
uint64_t addr = chip->xscom_base;
- if (chip->chip_type == PNV_CHIP_POWER10) {
- addr |= ((uint64_t) pcba << 3);
- } else if (chip->chip_type == PNV_CHIP_POWER9) {
+ if ((chip->chip_type == PNV_CHIP_POWER11) ||
+ (chip->chip_type == PNV_CHIP_POWER10) ||
+ (chip->chip_type == PNV_CHIP_POWER9)) {
addr |= ((uint64_t) pcba << 3);
} else {
addr |= (((uint64_t) pcba << 4) & ~0xffull) |
@@ -77,4 +89,19 @@ static inline uint64_t pnv_xscom_addr(const PnvChip *chip, uint32_t pcba)
return addr;
}
+static const char *pnv_get_machine_type(enum PnvChipType chip_type)
+{
+ if (chip_type == PNV_CHIP_POWER8) {
+ return "powernv8";
+ } else if (chip_type == PNV_CHIP_POWER9) {
+ return "powernv9";
+ } else if (chip_type == PNV_CHIP_POWER10) {
+ return "powernv10";
+ } else if (chip_type == PNV_CHIP_POWER11) {
+ return "powernv11";
+ } else {
+ g_assert_not_reached();
+ }
+}
+
#endif /* PNV_XSCOM_H */
--
2.54.0
next prev parent reply other threads:[~2026-06-23 14:20 UTC|newest]
Thread overview: 11+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-06-23 14:19 [PATCH 0/8] Testcase improvements and Power8E/NVL removal Aditya Gupta
2026-06-23 14:19 ` [PATCH 1/8] tests/functional: Add remote interrupts test for PowerNV Aditya Gupta
2026-06-23 15:47 ` Shivang Upadhyay
2026-06-23 14:19 ` [PATCH 2/8] tests/qtest/pnv_spi: Test Power11 PNV_SPI Aditya Gupta
2026-06-23 14:19 ` Aditya Gupta [this message]
2026-06-23 15:54 ` [PATCH 3/8] tests/qtest: Add Power11 chip & machine to qtests Shivang Upadhyay
2026-06-23 14:19 ` [PATCH 4/8] tests/functional: Use default powernv machine instead of power10 Aditya Gupta
2026-06-23 14:19 ` [PATCH 5/8] ppc/pnv: Replace Power8E with Power11 for 'none' machine test Aditya Gupta
2026-06-23 14:19 ` [PATCH 6/8] ppc/pnv: Remove Power8E and Power8NVL pnv chips Aditya Gupta
2026-06-23 14:19 ` [PATCH 7/8] ppc/pnv: Remove Power8E and Power8NVL CPUs Aditya Gupta
2026-06-23 14:19 ` [PATCH 8/8] MAINTAINERS: Add self as maintainer for PowerNV Aditya Gupta
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