All of lore.kernel.org
 help / color / mirror / Atom feed
From: sashiko-bot@kernel.org
To: "Cristian Ciocaltea" <cristian.ciocaltea@collabora.com>
Cc: dri-devel@lists.freedesktop.org, robh@kernel.org,
	conor+dt@kernel.org, devicetree@vger.kernel.org
Subject: Re: [PATCH 8/9] drm/rockchip: dw_hdmi_qp: Enable YUV420 output format
Date: Tue, 23 Jun 2026 21:03:35 +0000	[thread overview]
Message-ID: <20260623210336.68B5E1F000E9@smtp.kernel.org> (raw)
In-Reply-To: <20260617-dw-hdmi-qp-yuv-v1-8-a665cfd06d7d@collabora.com>

Thank you for your contribution! Sashiko AI review found 1 potential issue(s) to consider:

Pre-existing issues:
- [High] Hardware State Mutation in Atomic Check
--

commit 88f697e7fc21ab15ca1c009f0f830ab90e6ec4e7
Author: Cristian Ciocaltea <cristian.ciocaltea@collabora.com>

drm/rockchip: dw_hdmi_qp: Enable YUV420 output format

Both RK3576 and RK3588 SoCs are capable of driving the YUV420 output
color format, and the required bus-format handling and VOP2 support are
already in place. Advertise it via the platform supported formats so
the HDMI core can select it.

> diff --git a/drivers/gpu/drm/rockchip/dw_hdmi_qp-rockchip.c b/drivers/gpu/drm/rockchip/dw_hdmi_qp-rockchip.c
> index 3a1c027aa90bb..e29522afc6f05 100644
> --- a/drivers/gpu/drm/rockchip/dw_hdmi_qp-rockchip.c
> +++ b/drivers/gpu/drm/rockchip/dw_hdmi_qp-rockchip.c
> @@ -612,7 +612,8 @@ static int dw_hdmi_qp_rockchip_bind(struct device *dev, struct device *master,
>  
>  	plat_data.supported_formats = BIT(DRM_OUTPUT_COLOR_FORMAT_RGB444) |
>  				      BIT(DRM_OUTPUT_COLOR_FORMAT_YCBCR444) |
> -				      BIT(DRM_OUTPUT_COLOR_FORMAT_YCBCR422);
> +				      BIT(DRM_OUTPUT_COLOR_FORMAT_YCBCR422) |
> +				      BIT(DRM_OUTPUT_COLOR_FORMAT_YCBCR420);

[Severity: High]
This is a pre-existing issue, but I noticed that adding new formats might
exercise the atomic check path more frequently. 

Looking at dw_hdmi_qp_rockchip_encoder_atomic_check() in this same file,
it appears to mutate hardware state during the atomic validation phase:

drivers/gpu/drm/rockchip/dw_hdmi_qp-rockchip.c:dw_hdmi_qp_rockchip_encoder_atomic_check() {
	...
	ret = phy_configure(hdmi->phy, &phy_cfg);
	if (!ret) {
		hdmi->tmds_char_rate = conn_state->hdmi.tmds_char_rate;
		s->output_type = DRM_MODE_CONNECTOR_HDMIA;
		s->output_bpc = conn_state->hdmi.output_bpc;
		s->bus_format = ingest_fmt;
	} else {
	...
}

And in the PHY driver, phy_configure() mutates global state:

drivers/phy/rockchip/phy-rockchip-samsung-hdptx.c:rk_hdptx_phy_configure() {
	...
	ret = rk_hdptx_phy_verify_hdmi_config(hdptx, &opts->hdmi, &hdptx->hdmi_cfg);
	if (ret) {
		dev_err(hdptx->dev, "invalid hdmi params for phy configure\n");
	} else {
		hdptx->restrict_rate_change = true;
	...
}

Does this sequence cause problems when a userspace application (like a display
compositor) submits a test-only commit using the DRM_MODE_ATOMIC_TEST_ONLY 
flag?

Since the atomic check runs for test-only commits, won't this corrupt the
active driver state and potentially break subsequent real commits if they skip
necessary hardware configurations due to the cached state already matching?

>  
>  	encoder = &hdmi->encoder.encoder;
>  	encoder->possible_crtcs = drm_of_find_possible_crtcs(drm, dev->of_node);

-- 
Sashiko AI review · https://sashiko.dev/#/patchset/20260617-dw-hdmi-qp-yuv-v1-0-a665cfd06d7d@collabora.com?part=8

  reply	other threads:[~2026-06-23 21:03 UTC|newest]

Thread overview: 37+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2026-06-17 18:51 [PATCH 0/9] Support 10-bit YUV422 and 8/10-bit YUV420 color format on DW HDMI QP Cristian Ciocaltea
2026-06-17 18:51 ` Cristian Ciocaltea
2026-06-17 18:51 ` [PATCH 1/9] dt-bindings: display: vop2: Add missing reset properties Cristian Ciocaltea
2026-06-17 18:51   ` Cristian Ciocaltea
2026-06-18  7:58   ` Diederik de Haas
2026-06-18  7:58     ` Diederik de Haas
2026-06-18  8:39     ` Cristian Ciocaltea
2026-06-18  8:39       ` Cristian Ciocaltea
2026-06-22 13:25   ` Krzysztof Kozlowski
2026-06-22 13:25     ` Krzysztof Kozlowski
2026-06-17 18:51 ` [PATCH 2/9] drm/rockchip: vop2: Reset AXI and DCLK to improve robustness Cristian Ciocaltea
2026-06-17 18:51   ` Cristian Ciocaltea
2026-06-18  9:39   ` Philipp Zabel
2026-06-18  9:39     ` Philipp Zabel
2026-06-18 11:46     ` Cristian Ciocaltea
2026-06-18 11:46       ` Cristian Ciocaltea
2026-06-18 11:52       ` Philipp Zabel
2026-06-18 11:52         ` Philipp Zabel
2026-06-23 20:20   ` sashiko-bot
2026-06-17 18:51 ` [PATCH 3/9] drm/rockchip: vop2: Avoid DCLK source switch for 10-bit YUV422 output Cristian Ciocaltea
2026-06-17 18:51   ` Cristian Ciocaltea
2026-06-23 20:33   ` sashiko-bot
2026-06-17 18:51 ` [PATCH 4/9] drm/rockchip: vop2: Consolidate HDMI PHY PLL clock parent switch Cristian Ciocaltea
2026-06-17 18:51   ` Cristian Ciocaltea
2026-06-23 20:40   ` sashiko-bot
2026-06-17 18:51 ` [PATCH 5/9] drm/rockchip: vop2: Switch to enum vop_csc_format Cristian Ciocaltea
2026-06-17 18:51   ` Cristian Ciocaltea
2026-06-17 18:51 ` [PATCH 6/9] drm/bridge: dw-hdmi-qp: Log resolution and refresh rate in atomic_enable() Cristian Ciocaltea
2026-06-17 18:51   ` Cristian Ciocaltea
2026-06-17 18:52 ` [PATCH 7/9] drm/rockchip: dw_hdmi_qp: Support 10-bit YUV422 output format Cristian Ciocaltea
2026-06-17 18:52   ` Cristian Ciocaltea
2026-06-23 20:51   ` sashiko-bot
2026-06-17 18:52 ` [PATCH 8/9] drm/rockchip: dw_hdmi_qp: Enable YUV420 " Cristian Ciocaltea
2026-06-17 18:52   ` Cristian Ciocaltea
2026-06-23 21:03   ` sashiko-bot [this message]
2026-06-17 18:52 ` [PATCH 9/9] arm64: dts: rockchip: Add RK3588 VOP2 resets Cristian Ciocaltea
2026-06-17 18:52   ` Cristian Ciocaltea

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=20260623210336.68B5E1F000E9@smtp.kernel.org \
    --to=sashiko-bot@kernel.org \
    --cc=conor+dt@kernel.org \
    --cc=cristian.ciocaltea@collabora.com \
    --cc=devicetree@vger.kernel.org \
    --cc=dri-devel@lists.freedesktop.org \
    --cc=robh@kernel.org \
    --cc=sashiko-reviews@lists.linux.dev \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.