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From: Joey Lu <a0987203069@gmail.com>
To: zhengxingda@iscas.ac.cn, maarten.lankhorst@linux.intel.com,
	mripard@kernel.org, tzimmermann@suse.de, airlied@gmail.com,
	simona@ffwll.ch, robh@kernel.org, krzk+dt@kernel.org,
	conor+dt@kernel.org
Cc: ychuang3@nuvoton.com, schung@nuvoton.com, yclu4@nuvoton.com,
	dri-devel@lists.freedesktop.org, devicetree@vger.kernel.org,
	linux-arm-kernel@lists.infradead.org,
	linux-kernel@vger.kernel.org, Joey Lu <a0987203069@gmail.com>
Subject: [PATCH v5 6/7] drm/verisilicon: add DCUltraLite chip identity to HWDB
Date: Thu, 25 Jun 2026 17:44:48 +0800	[thread overview]
Message-ID: <20260625094449.708386-7-a0987203069@gmail.com> (raw)
In-Reply-To: <20260625094449.708386-1-a0987203069@gmail.com>

The Nuvoton MA35D1 chip contains a DCUltraLite display controller with
model number 0x0 (sic, the model name contains no number either),
revision 0x5560 and customer ID 0x305.  It has a similar register map
with DC8000, only one display output and only 32x32 cursor supported.

Signed-off-by: Joey Lu <a0987203069@gmail.com>
 drivers/gpu/drm/verisilicon/vs_hwdb.c | 10 ++++++++++
 1 file changed, 10 insertions(+)

diff --git a/drivers/gpu/drm/verisilicon/vs_hwdb.c b/drivers/gpu/drm/verisilicon/vs_hwdb.c
index 91524d16f778..7d630a667a3f 100644
--- a/drivers/gpu/drm/verisilicon/vs_hwdb.c
+++ b/drivers/gpu/drm/verisilicon/vs_hwdb.c
@@ -129,6 +129,16 @@ static struct vs_chip_identity vs_chip_identities[] = {
 		.max_cursor_size = 64,
 		.formats = &vs_formats_no_yuv444,
 	},
+	{
+		.model = 0x0,		/* DCUltraLite */
+		.revision = 0x5560,
+		.customer_id = 0x305,
+
+		.generation = VSDC_GEN_DC8000,
+		.display_count = 1,
+		.max_cursor_size = 32,
+		.formats = &vs_formats_no_yuv444,
+	},
 };
 
 int vs_fill_chip_identity(struct regmap *regs,
-- 
2.43.0


  parent reply	other threads:[~2026-06-25  9:45 UTC|newest]

Thread overview: 38+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2026-06-25  9:44 [PATCH v5 0/7] drm/verisilicon: add Nuvoton MA35D1 DCU Lite support Joey Lu
2026-06-25  9:44 ` [PATCH v5 1/7] dt-bindings: display: verisilicon,dc: generalize for single-output variants Joey Lu
2026-06-25  9:44   ` [PATCH v5 1/7] dt-bindings: display: verisilicon, dc: " Joey Lu
2026-06-25  9:54   ` [PATCH v5 1/7] dt-bindings: display: verisilicon,dc: " sashiko-bot
2026-06-25 16:33   ` Conor Dooley
2026-06-26  5:27     ` Icenowy Zheng
2026-06-26  7:19       ` Conor Dooley
2026-06-26  9:00         ` Icenowy Zheng
2026-06-26  9:26           ` Conor Dooley
2026-06-26  9:33             ` Icenowy Zheng
2026-06-26 15:32               ` Conor Dooley
2026-06-29  3:47               ` Joey Lu
2026-06-29  5:31                 ` Icenowy Zheng
2026-06-29 15:02                   ` Conor Dooley
2026-06-30  7:08                     ` Joey Lu
2026-06-26  7:22     ` Conor Dooley
2026-06-26  7:58       ` Icenowy Zheng
2026-06-26  8:57         ` Conor Dooley
2026-06-26  9:09           ` Icenowy Zheng
2026-06-26 15:16             ` Conor Dooley
2026-06-25  9:44 ` [PATCH v5 2/7] drm/verisilicon: add register-level macros for DC8000 Joey Lu
2026-06-25  9:44 ` [PATCH v5 3/7] drm/verisilicon: introduce per-variant hardware ops table Joey Lu
2026-06-25 10:00   ` sashiko-bot
2026-06-26  8:02   ` Icenowy Zheng
2026-06-29  3:52     ` Joey Lu
2026-06-25  9:44 ` [PATCH v5 4/7] drm/verisilicon: make axi and ahb clocks optional Joey Lu
2026-06-25 10:01   ` sashiko-bot
2026-06-26  8:03   ` Icenowy Zheng
2026-06-29  3:48     ` Joey Lu
2026-06-25  9:44 ` [PATCH v5 5/7] drm/verisilicon: add DC8000 (DCUltraLite) display controller support Joey Lu
2026-06-25 10:10   ` sashiko-bot
2026-06-26  8:03   ` Icenowy Zheng
2026-06-29  3:54     ` Joey Lu
2026-06-25  9:44 ` Joey Lu [this message]
2026-06-25 10:22   ` [PATCH v5 6/7] drm/verisilicon: add DCUltraLite chip identity to HWDB sashiko-bot
2026-06-26  8:04   ` Icenowy Zheng
2026-06-25  9:44 ` [PATCH v5 7/7] drm/verisilicon: extend Kconfig to support ARCH_MA35 platforms Joey Lu
2026-06-26  8:05 ` [PATCH v5 0/7] drm/verisilicon: add Nuvoton MA35D1 DCU Lite support Icenowy Zheng

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