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From: sashiko-bot@kernel.org
To: "Christian Marangi" <ansuelsmth@gmail.com>
Cc: devicetree@vger.kernel.org, robh@kernel.org, conor+dt@kernel.org,
	linux-pci@vger.kernel.org
Subject: Re: [PATCH 3/4] dt-bindings: PCI: mediatek-gen3: Split Airoha schema and document 2-lanes
Date: Thu, 25 Jun 2026 22:04:27 +0000	[thread overview]
Message-ID: <20260625220427.7A0241F000E9@smtp.kernel.org> (raw)
In-Reply-To: <20260625215741.3253212-4-ansuelsmth@gmail.com>

Thank you for your contribution! Sashiko AI review found 2 potential issue(s) to consider:
- [Medium] The schema incorrectly uses `regs` instead of `reg` in the `allOf` conditional block for `num-lanes == 2`, failing to enforce the requirement for a secondary register region.
- [Medium] Typographical error `phy-lan2` instead of `phy-lane2` in the `reset-names` enum constraint for the 1-lane fallback block.
--

commit bb5683e00f2f10ba9133fc862deba2acbfb939ed
Author: Christian Marangi <ansuelsmth@gmail.com>

dt-bindings: PCI: mediatek-gen3: Split Airoha schema and document 2-lanes

This commit splits the Airoha PCIe schema from the mediatek-gen3 schema into
a dedicated file. This allows documenting the required properties for PCIe
configured in 2-lanes mode, while cleaning up the mediatek-gen3 schema.

> diff --git a/Documentation/devicetree/bindings/pci/airoha,en7581-pcie.yaml b/Documentation/devicetree/bindings/pci/airoha,en7581-pcie.yaml
> new file mode 100644
> index 0000000000000..977c1816572cc
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/pci/airoha,en7581-pcie.yaml

[ ... ]

> +allOf:
> +  - $ref: /schemas/pci/pci-host-bridge.yaml#
> +  - if:
> +      properties:
> +        num-lanes:
> +          const: 2
> +    then:
> +      properties:
> +        regs:
> +          minItems: 2

[Severity: Medium]
Does this schema enforce the minItems constraint as intended? It looks like
there's a typo where "regs" is used instead of "reg". This might allow a
node with num-lanes = <2> but only a single register region to silently pass
validation.

> +
> +        reg-names:
> +          items:
> +            - const: pcie-mac
> +            - const: sec-pcie-mac

[ ... ]

> +    else:
> +      properties:
> +        reg:
> +          maxItems: 1
> +
> +        reg-names:
> +          items:
> +            - const: pcie-mac
> +
> +        resets:
> +          minItems: 2
> +          maxItems: 3
> +
> +        reset-names:
> +          minItems: 2
> +          items:
> +            - enum: [ phy-lane0, phy-lane1, phy-lan2 ]

[Severity: Medium]
Will this properly validate phy-lane2? It appears there is a typo here
(phy-lan2 instead of phy-lane2) which would cause valid configurations
to fail schema validation while accepting the misspelled name.

> +            - enum: [ phy-lane1, perstout ]
> +            - const: phy-lane2

-- 
Sashiko AI review · https://sashiko.dev/#/patchset/20260625215741.3253212-1-ansuelsmth@gmail.com?part=3

  reply	other threads:[~2026-06-25 22:04 UTC|newest]

Thread overview: 10+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2026-06-25 21:57 [PATCH 0/4] PCI: mediatek-gen3: Add 2-lanes mode support + clock Christian Marangi
2026-06-25 21:57 ` [PATCH 1/4] dt-bindings: clock: airoha: Add additional reset for PCIe PERSTOUT Christian Marangi
2026-06-25 22:07   ` sashiko-bot
2026-06-26 10:58   ` Krzysztof Kozlowski
2026-06-25 21:57 ` [PATCH 2/4] clk: en7523: add support for dedicated PCIe PERSTOUT reset Christian Marangi
2026-06-26  0:20   ` sashiko-bot
2026-06-25 21:57 ` [PATCH 3/4] dt-bindings: PCI: mediatek-gen3: Split Airoha schema and document 2-lanes Christian Marangi
2026-06-25 22:04   ` sashiko-bot [this message]
2026-06-25 21:57 ` [PATCH 4/4] PCI: mediatek-gen3: Add 2-lanes mode support for Airoha AN7581 Christian Marangi
2026-06-25 22:07   ` sashiko-bot

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