From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from out-183.mta1.migadu.com (out-183.mta1.migadu.com [95.215.58.183]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id F0C6C3DB640 for ; Fri, 26 Jun 2026 07:04:29 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=95.215.58.183 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1782457471; cv=none; b=aY+K4uEizSEu+z1oAhzSMdopTQqFnAF17uBtziQ2VLpLsSsgc622ggNLKMuihrUFQhlHomlHDlpM9SauywFw7iyIOzvqW+sNxvCMtt/7gtPzx7UPtasb8v03VhhUN1tB75uLamTHUpSRCHa0gue6um/XPCkvnqiNRlt2XaI2ZOM= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1782457471; c=relaxed/simple; bh=9u0PClUmtcDiwguXuAJwkqw3OOQe5e2NOIHPVG1YQ+M=; h=From:To:Cc:Subject:Date:Message-Id:MIME-Version; b=W8jHVH2ohaq40YcCKFKRJunqdUjSypbeFiHFBrHRafopvascM1EWpBUvo/6BA+A+qEgA28C8BuIHq2f1bs72rLLL80VkJF9NcCp1tPbkdoNyHt6mxgfshBsKZRHCD4jKzE/5sdIz4G1FoYdbF7XtdmkLuDZ+XtwqeHGyZ/xPZak= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linux.dev; spf=pass smtp.mailfrom=linux.dev; dkim=pass (1024-bit key) header.d=linux.dev header.i=@linux.dev header.b=LnbxhMR3; arc=none smtp.client-ip=95.215.58.183 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=linux.dev Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=linux.dev Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=linux.dev header.i=@linux.dev header.b="LnbxhMR3" X-Report-Abuse: Please report any abuse attempt to abuse@migadu.com and include these headers. DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linux.dev; s=key1; t=1782457467; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version: content-transfer-encoding:content-transfer-encoding; bh=YRQkgtC4Uhvu2LqPQiKXLuJu0xhuDXcZhXVNnsQ0O6o=; b=LnbxhMR3FylYtThbm4iqaBaBsRGZWnICij+qaNP+7xN4EdxTfdAh9mU3pTfOtgt4aC+YOR zoHtX0dKuKrHzoaicfjysrihXa0NV1svV0EXwyr08fcLyvQapHzZIQSzEq/i0Ltce7HEel IoM7Z1rknmAXoFr2zFHA433URCdAFoE= From: Fuad Tabba To: Marc Zyngier , Oliver Upton , kvmarm@lists.linux.dev, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org Cc: Catalin Marinas , Will Deacon , Joey Gouly , Steffen Eiden , Suzuki K Poulose , Zenghui Yu , Vincent Donnefort , Quentin Perret , Sebastian Ene , Hyunwoo Kim , Fuad Tabba Subject: [PATCH v3 0/8] KVM: arm64: Rework pKVM vCPU state synchronisation Date: Fri, 26 Jun 2026 08:04:00 +0100 Message-Id: <20260626070408.3420953-1-fuad.tabba@linux.dev> Precedence: bulk X-Mailing-List: kvmarm@lists.linux.dev List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Migadu-Flow: FLOW_OUT Hi folks, Changes since v2 [1]: - Sync host state only on trap or SError exits, and move it into a dedicated handle_exit_pkvm_state(). (Vincent) - Collected Vincent's Reviewed-by. Building on Will's pKVM infrastructure series [2], this series reworks how pKVM moves vCPU state between the host and EL2, and stops copying a non-protected guest's state on every world switch. EL2 gains proper primitives for the state it transfers: vCPU lookup helpers, and VGIC flush/sync that reduces how much host state EL2 dereferences. The series also moves some preparatory code (such as sys reg access and PSCI helpers) to shared headers and HYP, and implements lazy copying of a non-protected guest's register state back to the host until the host actually needs it, instead of on every exit. This is the first of two series moving pKVM vCPU state management to EL2. The follow-up completes the job for protected VMs: state isolation, PSCI handling at EL2, and the resulting API behaviour. The series is structured as follows: 01-04: Preparatory refactoring (MPIDR, sys reg access, vCPU reset, PSCI helpers) to shared headers and HYP. 05: Host and hypervisor vCPU lookup primitives. 06-07: VGIC: reduce EL2's exposure to host state, add flush/sync primitives. 08: Lazy state sync for non-protected guests. Based on kvmarm/next (1ee27dacbe5dc). Cheers, /fuad [1] https://lore.kernel.org/all/20260619070719.812227-1-tabba@google.com/ [2] https://lore.kernel.org/all/20260105154939.11041-1-will@kernel.org/ Fuad Tabba (5): KVM: arm64: Extract MPIDR computation into a shared header KVM: arm64: Make vcpu_{read,write}_sys_reg available to HYP code KVM: arm64: Factor out reusable vCPU reset helpers KVM: arm64: Move PSCI helper functions to a shared header KVM: arm64: Implement lazy vCPU state sync for non-protected guests Marc Zyngier (3): KVM: arm64: Add host and hypervisor vCPU lookup primitives KVM: arm64: Minimise EL2's exposure of host VGIC state during world switch KVM: arm64: Add primitives to flush/sync the VGIC state at EL2 arch/arm64/include/asm/kvm_arm.h | 12 ++ arch/arm64/include/asm/kvm_asm.h | 1 + arch/arm64/include/asm/kvm_emulate.h | 79 +++++++- arch/arm64/include/asm/kvm_host.h | 2 + arch/arm64/kvm/arm.c | 7 + arch/arm64/kvm/handle_exit.c | 23 +++ arch/arm64/kvm/hyp/exception.c | 34 +--- arch/arm64/kvm/hyp/nvhe/hyp-main.c | 258 +++++++++++++++++++++++---- arch/arm64/kvm/psci.c | 30 +--- arch/arm64/kvm/reset.c | 60 +------ arch/arm64/kvm/sys_regs.c | 14 +- arch/arm64/kvm/sys_regs.h | 19 ++ include/kvm/arm_psci.h | 27 +++ 13 files changed, 403 insertions(+), 163 deletions(-) -- 2.39.5