Re: [PATCH v1 3/4] arm64: dts: am62p5-var-som-symphony: add touchscreen support

[sashiko-bot@kernel.org]

Thank you for your contribution! Sashiko AI review found 1 potential issue(s) to consider:
- [Medium] The commit message claims to configure both the interrupt and wakeup pins, but the device tree node and pinctrl only configure the interrupt pin, lacking a wakeup pin configuration.
--

commit 6d6b56a3161a61ca2f1a68dce1765826d0594c86
Author: Stefano Radaelli <stefano.radaelli21@gmail.com>

arm64: dts: am62p5-var-som-symphony: add touchscreen support

This commit adds support for the capacitive touchscreen on the Symphony
carrier board. It describes the FT5x06 touchscreen controller, configures
its pins, and marks it as a wakeup source.

> diff --git a/arch/arm64/boot/dts/ti/k3-am62p5-var-som-symphony.dts b/arch/arm64/boot/dts/ti/k3-am62p5-var-som-symphony.dts
> index 5ba4ed56755b4..5c41647ff43fa 100644
> --- a/arch/arm64/boot/dts/ti/k3-am62p5-var-som-symphony.dts
> +++ b/arch/arm64/boot/dts/ti/k3-am62p5-var-som-symphony.dts
[ ... ]
> @@ -293,6 +293,21 @@ &main_i2c1 {
>  	clock-frequency = <400000>;
>  	status = "okay";
>  
> +	/* Capacitive touch controller */
> +	ft5x06_ts: touchscreen@38 {
> +		compatible = "edt,edt-ft5206";
> +		reg = <0x38>;
> +		pinctrl-names = "default";
> +		pinctrl-0 = <&pinctrl_captouch_pins>;
> +		interrupt-parent = <&main_gpio1>;
> +		interrupts = <16 IRQ_TYPE_EDGE_FALLING>;
> +		touchscreen-size-x = <800>;
> +		touchscreen-size-y = <480>;
> +		touchscreen-inverted-x;
> +		touchscreen-inverted-y;
> +		wakeup-source;
> +	};

[Severity: Medium]
The commit message claims to configure both the interrupt and wakeup pins,
but ft5x06_ts only configures the interrupt pin in its pinctrl.

Does this node also need a wake-gpios property to match the commit message
and properly wake the device from hibernation?

[ ... ]
> @@ -307,6 +322,12 @@ &main_mcan0 {
>  };
>  
>  &main_pmx0 {
> +	pinctrl_captouch_pins: main-captouch-default-pins {
> +		pinctrl-single,pins = <
> +			AM62PX_IOPAD(0x01b8, PIN_INPUT, 7) /* (E20) SPI0_CS1.GPIO1_16 */
> +		>;
> +	};
> +

-- 
Sashiko AI review · https://sashiko.dev/#/patchset/cover.1782665899.git.stefano.r@variscite.com?part=3