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Mon, 29 Jun 2026 08:51:58 -0700 (PDT) From: Eric Chung Date: Mon, 29 Jun 2026 23:51:16 +0800 Subject: [PATCH v2 v2 2/8] mmc: sdhci: add quirk to enable CMD23 for multi-block transfers MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: 7bit Message-Id: <20260629-m4-v2-2-cbc91c6b83d8@riscstar.com> References: <20260629-m4-v2-0-cbc91c6b83d8@riscstar.com> In-Reply-To: <20260629-m4-v2-0-cbc91c6b83d8@riscstar.com> To: u-boot-spacemit@groups.io, u-boot@lists.denx.de Cc: Tom Rini , Peng Fan , Huan Zhou , Raymond Mao , Jaehoon Chung , Bhimeswararao Matsa , Tanmay Kathpalia , Kaustabh Chakraborty , Han Xu , Yanir Levin , Christoph Stoidner , Balsundar Ponnusamy , Daniel Palmer , Anshul Dalal , Bastien Curutchet , Angelo Dureghello , Johan Jonker , Rick Chen , Leo , Sam Protsenko , Guodong Xu , Eric Chung X-Mailer: b4 0.15.2 X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.39 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.103.8 at phobos.denx.de X-Virus-Status: Clean Introduce a controller-specific quirk to select CMD23 (SET_BLOCK_COUNT) for read/write multi-block operations instead of the legacy CMD18/CMD25 with open-ended or pre-defined block counts. This allows SDHCI host controllers that support CMD23 to improve I/O efficiency by reducing the number of CMD12 (STOP_TRANSMISSION) commands for multi-block transfers. Signed-off-by: Eric Chung --- drivers/mmc/mmc.c | 22 ++++++++++++++++++---- drivers/mmc/sdhci.c | 3 +++ include/mmc.h | 5 ++++- include/sdhci.h | 1 + 4 files changed, 26 insertions(+), 5 deletions(-) diff --git a/drivers/mmc/mmc.c b/drivers/mmc/mmc.c index f0e38efb262..9f2c8cb8d14 100644 --- a/drivers/mmc/mmc.c +++ b/drivers/mmc/mmc.c @@ -461,6 +461,15 @@ static int mmc_read_blocks(struct mmc *mmc, void *dst, lbaint_t start, struct mmc_cmd cmd; struct mmc_data data; + if (IS_ENABLED(CONFIG_MMC_QUIRKS) && + (mmc->quirks & MMC_QUIRK_BLK_CMD23)) { + cmd.cmdidx = MMC_CMD_SET_BLOCK_COUNT; + cmd.cmdarg = blkcnt & 0x0000ffff; + cmd.resp_type = MMC_RSP_R1; + if (mmc_send_cmd(mmc, &cmd, NULL)) + return 0; + } + if (blkcnt > 1) cmd.cmdidx = MMC_CMD_READ_MULTIPLE_BLOCK; else @@ -481,7 +490,9 @@ static int mmc_read_blocks(struct mmc *mmc, void *dst, lbaint_t start, if (mmc_send_cmd(mmc, &cmd, &data)) return 0; - if (blkcnt > 1) { + if (blkcnt > 1 && + IS_ENABLED(CONFIG_MMC_QUIRKS) && + !(mmc->quirks & MMC_QUIRK_BLK_CMD23)) { if (mmc_send_stop_transmission(mmc, false)) { #if !defined(CONFIG_XPL_BUILD) || defined(CONFIG_SPL_LIBCOMMON_SUPPORT) log_err("mmc fail to send stop cmd\n"); @@ -1436,6 +1447,9 @@ static int sd_get_capabilities(struct mmc *mmc) if (mmc->scr[0] & SD_DATA_4BIT) mmc->card_caps |= MMC_MODE_4BIT; + if (IS_ENABLED(CONFIG_MMC_QUIRKS) && + !(mmc->scr[0] & SD_SCR_CMD23_SUPPORT)) + mmc->quirks &= ~MMC_QUIRK_BLK_CMD23; /* Version 1.0 doesn't support switching */ if (mmc->version == SD_VERSION_1_0) @@ -2963,9 +2977,9 @@ int mmc_get_op_cond(struct mmc *mmc, bool quiet) return err; #ifdef CONFIG_MMC_QUIRKS - mmc->quirks = MMC_QUIRK_RETRY_SET_BLOCKLEN | - MMC_QUIRK_RETRY_SEND_CID | - MMC_QUIRK_RETRY_APP_CMD; + mmc->quirks |= MMC_QUIRK_RETRY_SET_BLOCKLEN | + MMC_QUIRK_RETRY_SEND_CID | + MMC_QUIRK_RETRY_APP_CMD; #endif err = mmc_power_cycle(mmc); diff --git a/drivers/mmc/sdhci.c b/drivers/mmc/sdhci.c index 08594e10266..f670b8edd61 100644 --- a/drivers/mmc/sdhci.c +++ b/drivers/mmc/sdhci.c @@ -741,6 +741,9 @@ static int sdhci_init(struct mmc *mmc) } } #endif + if (IS_ENABLED(CONFIG_MMC_QUIRKS) && + (host->quirks & SDHCI_QUIRK_BLK_CMD23)) + host->mmc->quirks |= MMC_QUIRK_BLK_CMD23; sdhci_set_power(host, fls(mmc->cfg->voltages) - 1); diff --git a/include/mmc.h b/include/mmc.h index 9509c9e9543..ba2425b96e0 100644 --- a/include/mmc.h +++ b/include/mmc.h @@ -141,6 +141,8 @@ static inline bool mmc_is_tuning_cmd(uint cmdidx) #define SD_HIGHSPEED_BUSY 0x00020000 #define SD_HIGHSPEED_SUPPORTED 0x00020000 +#define SD_SCR_CMD23_SUPPORT BIT(1) + #define UHS_SDR12_BUS_SPEED 0 #define HIGH_SPEED_BUS_SPEED 1 #define UHS_SDR25_BUS_SPEED 1 @@ -343,7 +345,8 @@ static inline bool mmc_is_tuning_cmd(uint cmdidx) #define MMC_QUIRK_RETRY_SEND_CID BIT(0) #define MMC_QUIRK_RETRY_SET_BLOCKLEN BIT(1) -#define MMC_QUIRK_RETRY_APP_CMD BIT(2) +#define MMC_QUIRK_RETRY_APP_CMD BIT(2) +#define MMC_QUIRK_BLK_CMD23 BIT(3) enum mmc_voltage { MMC_SIGNAL_VOLTAGE_000 = 0, diff --git a/include/sdhci.h b/include/sdhci.h index fb847821d58..64f6f6ab2bf 100644 --- a/include/sdhci.h +++ b/include/sdhci.h @@ -256,6 +256,7 @@ #define SDHCI_QUIRK_SUPPORT_SINGLE (1 << 10) /* Capability register bit-63 indicates HS400 support */ #define SDHCI_QUIRK_CAPS_BIT63_FOR_HS400 BIT(11) +#define SDHCI_QUIRK_BLK_CMD23 BIT(12) /* to make gcc happy */ struct sdhci_host; -- 2.51.0