Re: [PATCH v2 1/3] arm64: dts: ti: Add PLL1 refclk to J784S4 SoC SERDES node

[sashiko-bot@kernel.org]

Thank you for your contribution! Sashiko AI review found 1 potential issue(s) to consider:
- [Low] Device Tree Binding Schema validation failure due to missing schema item for the third clock name.
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commit c724dfc4b95310a6b37f143a703b52391002ee90
Author: Gokul Praveen <g-praveen@ti.com>

arm64: dts: ti: Add PLL1 refclk to J784S4 SoC SERDES node

This commit adds the PLL1 refclk to the clocks and clock-names parameters
of the SERDES2 node. It updates both the devicetree binding schema and the
k3-j784s4-main.dtsi file to reflect the new clock.

> diff --git a/Documentation/devicetree/bindings/phy/phy-cadence-torrent.yaml b/Documentation/devicetree/bindings/phy/phy-cadence-torrent.yaml
> --- a/Documentation/devicetree/bindings/phy/phy-cadence-torrent.yaml
> +++ b/Documentation/devicetree/bindings/phy/phy-cadence-torrent.yaml
[ ... ]
> @@ -47,7 +47,7 @@ properties:
>      minItems: 1
>      items:
>        - const: refclk
> -      - enum: [ pll1_refclk, phy_en_refclk ]
> +      - enum: [refclk, pll1_refclk, phy_en_refclk ]

[Severity: Low]
Does this schema correctly allow a third clock name?

The items list here only defines two elements (the const and the enum). Under 
dt-schema rules, any device tree node specifying a third element will fail 
validation because there is no corresponding schema item defined for it in the 
items array.

> diff --git a/arch/arm64/boot/dts/ti/k3-j784s4-main.dtsi b/arch/arm64/boot/dts/ti/k3-j784s4-main.dtsi
> --- a/arch/arm64/boot/dts/ti/k3-j784s4-main.dtsi
> +++ b/arch/arm64/boot/dts/ti/k3-j784s4-main.dtsi
> @@ -122,8 +122,9 @@ serdes2: serdes@5020000 {
>  			resets = <&serdes_wiz2 0>;
>  			reset-names = "torrent_reset";
>  			clocks = <&serdes_wiz2 TI_WIZ_PLL0_REFCLK>,
> +				 <&serdes_wiz2 TI_WIZ_PLL1_REFCLK>,
>  				 <&serdes_wiz2 TI_WIZ_PHY_EN_REFCLK>;
> -			clock-names = "refclk", "phy_en_refclk";
> +			clock-names = "refclk","pll1_refclk", "phy_en_refclk";

[Severity: Low]
Will this trigger a dtbs_check warning?

Since the device tree node is updated to supply 3 clock-names, but the
YAML schema items list above is still implicitly limited to 2 definitions,
this will likely cause a build-time validation failure.

Should a third item be added to the YAML items array to match this 3-clock
configuration?

-- 
Sashiko AI review · https://sashiko.dev/#/patchset/20260629102308.56616-1-g-praveen@ti.com?part=1