[frank-w-bpi-r2-4.14:pr/188 1/1] drivers/net/dsa/mxl862xx/mxl862xx-phylink.c:109:28: sparse: sparse: incorrect type in initializer (different base types)

[kernel test robot <lkp@intel.com>]

tree:   https://github.com/frank-w/BPI-R2-4.14 pr/188
head:   616866fe35b03d003aa74b684a16a24a9e119e2a
commit: 16a78531197cf24d14a4e8551a667b49492aaa93 [1/1] DO NOT SUBMIT: net: dsa: mxl862xx: legacy SFP API fallback for old firmware
config: microblaze-randconfig-r123-20260629 (https://download.01.org/0day-ci/archive/20260630/202606300856.6w9cp7Aq-lkp@intel.com/config)
compiler: microblaze-linux-gcc (GCC) 8.5.0
sparse: v0.6.5-rc1
reproduce (this is a W=1 build): (https://download.01.org/0day-ci/archive/20260630/202606300856.6w9cp7Aq-lkp@intel.com/reproduce)

If you fix the issue in a separate patch/commit (i.e. not just a new version of
the same patch/commit), kindly add following tags
| Reported-by: kernel test robot <lkp@intel.com>
| Closes: https://lore.kernel.org/oe-kbuild-all/202606300856.6w9cp7Aq-lkp@intel.com/

sparse warnings: (new ones prefixed by >>)
>> drivers/net/dsa/mxl862xx/mxl862xx-phylink.c:109:28: sparse: sparse: incorrect type in initializer (different base types) @@     expected restricted __le16 [usertype] port_id @@     got int port @@
   drivers/net/dsa/mxl862xx/mxl862xx-phylink.c:109:28: sparse:     expected restricted __le16 [usertype] port_id
   drivers/net/dsa/mxl862xx/mxl862xx-phylink.c:109:28: sparse:     got int port
   drivers/net/dsa/mxl862xx/mxl862xx-phylink.c:112:28: sparse: sparse: incorrect type in initializer (different base types) @@     expected restricted __le16 [usertype] port_id @@     got int port @@
   drivers/net/dsa/mxl862xx/mxl862xx-phylink.c:112:28: sparse:     expected restricted __le16 [usertype] port_id
   drivers/net/dsa/mxl862xx/mxl862xx-phylink.c:112:28: sparse:     got int port
>> drivers/net/dsa/mxl862xx/mxl862xx-phylink.c:128:30: sparse: sparse: restricted __le32 degrades to integer
>> drivers/net/dsa/mxl862xx/mxl862xx-phylink.c:128:30: sparse: sparse: restricted __le32 degrades to integer
>> drivers/net/dsa/mxl862xx/mxl862xx-phylink.c:128:30: sparse: sparse: restricted __le32 degrades to integer
>> drivers/net/dsa/mxl862xx/mxl862xx-phylink.c:128:30: sparse: sparse: restricted __le32 degrades to integer
>> drivers/net/dsa/mxl862xx/mxl862xx-phylink.c:128:30: sparse: sparse: restricted __le32 degrades to integer
   drivers/net/dsa/mxl862xx/mxl862xx-phylink.c:152:30: sparse: sparse: restricted __le32 degrades to integer
   drivers/net/dsa/mxl862xx/mxl862xx-phylink.c:165:25: sparse: sparse: restricted __le32 degrades to integer
   drivers/net/dsa/mxl862xx/mxl862xx-phylink.c:165:25: sparse: sparse: restricted __le32 degrades to integer
   drivers/net/dsa/mxl862xx/mxl862xx-phylink.c:165:25: sparse: sparse: restricted __le32 degrades to integer
   drivers/net/dsa/mxl862xx/mxl862xx-phylink.c:165:25: sparse: sparse: restricted __le32 degrades to integer

vim +109 drivers/net/dsa/mxl862xx/mxl862xx-phylink.c

   101	
   102	static void mxl862xx_legacy_pcs_get_state(struct phylink_pcs *pcs,
   103						  unsigned int neg_mode,
   104						  struct phylink_link_state *state)
   105	{
   106		struct mxl862xx_priv *priv = pcs_to_mxl862xx_pcs(pcs)->priv;
   107		int port = pcs_to_mxl862xx_pcs(pcs)->port;
   108		struct mxl862xx_port_link_cfg port_link_cfg = {
 > 109			.port_id = port,
   110		};
   111		struct mxl862xx_port_cfg port_cfg = {
   112			.port_id = port,
   113		};
   114		int ret;
   115	
   116		ret = MXL862XX_API_READ(priv, MXL862XX_COMMON_PORTLINKCFGGET,
   117					port_link_cfg);
   118		if (ret)
   119			return;
   120	
   121		ret = MXL862XX_API_READ(priv, MXL862XX_COMMON_PORTCFGGET, port_cfg);
   122		if (ret)
   123			return;
   124	
   125		state->link = (port_link_cfg.link == MXL862XX_PORT_LINK_UP);
   126		state->an_complete = state->link;
   127	
 > 128		switch (port_link_cfg.speed) {
   129		case MXL862XX_PORT_SPEED_10:
   130			state->speed = SPEED_10;
   131			break;
   132		case MXL862XX_PORT_SPEED_100:
   133			state->speed = SPEED_100;
   134			break;
   135		case MXL862XX_PORT_SPEED_1000:
   136			state->speed = SPEED_1000;
   137			break;
   138		case MXL862XX_PORT_SPEED_2500:
   139			state->speed = SPEED_2500;
   140			break;
   141		case MXL862XX_PORT_SPEED_5000:
   142			state->speed = SPEED_5000;
   143			break;
   144		case MXL862XX_PORT_SPEED_10000:
   145			state->speed = SPEED_10000;
   146			break;
   147		default:
   148			state->speed = SPEED_UNKNOWN;
   149			break;
   150		}
   151	
   152		switch (port_link_cfg.duplex) {
   153		case MXL862XX_DUPLEX_HALF:
   154			state->duplex = DUPLEX_HALF;
   155			break;
   156		case MXL862XX_DUPLEX_FULL:
   157			state->duplex = DUPLEX_FULL;
   158			break;
   159		default:
   160			state->duplex = DUPLEX_UNKNOWN;
   161			break;
   162		}
   163	
   164		state->pause &= ~(MLO_PAUSE_RX | MLO_PAUSE_TX);
   165		switch (port_cfg.flow_ctrl) {
   166		case MXL862XX_FLOW_RXTX:
   167			state->pause |= MLO_PAUSE_TXRX_MASK;
   168			break;
   169		case MXL862XX_FLOW_TX:
   170			state->pause |= MLO_PAUSE_TX;
   171			break;
   172		case MXL862XX_FLOW_RX:
   173			state->pause |= MLO_PAUSE_RX;
   174			break;
   175		case MXL862XX_FLOW_OFF:
   176		default:
   177			break;
   178		}
   179	}
   180	

--
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