From: sashiko-bot@kernel.org
To: "Ioana Ciornei" <ioana.ciornei@nxp.com>
Cc: conor+dt@kernel.org, robh@kernel.org, devicetree@vger.kernel.org
Subject: Re: [PATCH 1/5] arm64: dts: lx2160a: transition to device-specific SerDes compatible strings
Date: Tue, 30 Jun 2026 11:26:25 +0000 [thread overview]
Message-ID: <20260630112625.F333C1F000E9@smtp.kernel.org> (raw)
In-Reply-To: <20260630110459.516364-2-ioana.ciornei@nxp.com>
Thank you for your contribution! Sashiko AI review found 4 potential issue(s) to consider:
- [High] Unintentional disabling of `serdes_1` on multiple boards.
- [Medium] Consumer phandles for SerDes PHYs were not updated to match the new per-lane PHY providers, contradicting the commit message.
- [Medium] The newly added `serdes_3` node is missing the generic fallback compatible string `fsl,lynx-28g`.
- [Low] Device tree compilation fails due to incorrect node name in `/delete-node/` directive for serdes_3.
--
commit dcf5b2d58e1afb24aa2ae2829db182c735a1dfc1
Author: Vladimir Oltean <vladimir.oltean@nxp.com>
arm64: dts: lx2160a: transition to device-specific SerDes compatible strings
Align to the modern fsl,lynx-28g.yaml binding, where the SoC and SerDes
instance is present in the compatible string, to allow reliable per-lane
capability detection and per-lane customization of electrical properties.
> These new bindings have #phy-cells = <0> in per-lane PHY providers, so
> we need to update consumer phandles as well.
[Severity: Medium]
Did we miss updating the consumer phandles in this patch?
The commit message indicates consumer phandles need updating to match
#phy-cells = <0>, but they appear to remain unupdated in the device tree,
and #phy-cells = <1> is still retained on the parent PHY nodes.
> diff --git a/arch/arm64/boot/dts/freescale/fsl-lx2160a.dtsi b/arch/arm64/boot/dts/freescale/fsl-lx2160a.dtsi
> index 1d73abffa6b72..a687eb3e31904 100644
> --- a/arch/arm64/boot/dts/freescale/fsl-lx2160a.dtsi
> +++ b/arch/arm64/boot/dts/freescale/fsl-lx2160a.dtsi
> @@ -621,17 +621,163 @@ soc: soc {
> ranges;
> dma-ranges = <0x0 0x0 0x0 0x0 0x10000 0x00000000>;
>
[ ... ]
> serdes_1: phy@1ea0000 {
> - compatible = "fsl,lynx-28g";
> + compatible = "fsl,lx2160a-serdes1", "fsl,lynx-28g";
> reg = <0x0 0x1ea0000 0x0 0x1e30>;
> + #address-cells = <1>;
> + #size-cells = <0>;
> #phy-cells = <1>;
> + status = "disabled";
[Severity: High]
Does this default status = "disabled" unintentionally break interfaces
wired to serdes_1 on boards like fsl-lx2162a-clearfog and fsl-lx2160a-half-twins?
These boards consume serdes_1 but do not appear to override the status to
"okay" in this patch.
[ ... ]
> + serdes_3: phy@1ec0000 {
> + compatible = "fsl,lx2160a-serdes3";
> + reg = <0x0 0x1ec0000 0x0 0x1e30>;
[Severity: Medium]
Should serdes_3 include the generic "fsl,lynx-28g" fallback compatible string
here, similar to what was added for serdes_1 and serdes_2?
> + #address-cells = <1>;
> + #size-cells = <0>;
> + status = "disabled";
> + #phy-cells = <1>;
[ ... ]
> diff --git a/arch/arm64/boot/dts/freescale/fsl-lx2162a.dtsi b/arch/arm64/boot/dts/freescale/fsl-lx2162a.dtsi
> new file mode 100644
> index 0000000000000..b9629e074d943
> --- /dev/null
> +++ b/arch/arm64/boot/dts/freescale/fsl-lx2162a.dtsi
> @@ -0,0 +1,24 @@
[ ... ]
> +&soc {
> + /delete-node/ serdes@1ec0000;
> +};
[Severity: Low]
Could this /delete-node/ directive fail at build time?
In the base fsl-lx2160a.dtsi, the node is defined as phy@1ec0000 rather
than serdes@1ec0000.
--
Sashiko AI review · https://sashiko.dev/#/patchset/20260630110459.516364-1-ioana.ciornei@nxp.com?part=1
next prev parent reply other threads:[~2026-06-30 11:26 UTC|newest]
Thread overview: 14+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-06-30 11:04 [PATCH 0/5] arm64: dts: describe the Lynx 10G and 28G SerDes blocks for Layerscape SoCs Ioana Ciornei
2026-06-30 11:04 ` [PATCH 1/5] arm64: dts: lx2160a: transition to device-specific SerDes compatible strings Ioana Ciornei
2026-06-30 11:26 ` sashiko-bot [this message]
2026-06-30 12:01 ` Ioana Ciornei
2026-06-30 11:04 ` [PATCH 2/5] arm64: dts: ls1028a: describe the Lynx 10G SerDes Ioana Ciornei
2026-06-30 11:32 ` sashiko-bot
2026-06-30 12:22 ` Ioana Ciornei
2026-06-30 11:04 ` [PATCH 3/5] arm64: dts: ls1046a: describe the Lynx 10G SerDes blocks Ioana Ciornei
2026-06-30 11:43 ` sashiko-bot
2026-06-30 11:04 ` [PATCH 4/5] arm64: dts: ls208xa: " Ioana Ciornei
2026-06-30 11:48 ` sashiko-bot
2026-06-30 11:04 ` [PATCH 5/5] arm64: dts: ls1088a: " Ioana Ciornei
2026-06-30 20:20 ` [PATCH 0/5] arm64: dts: describe the Lynx 10G and 28G SerDes blocks for Layerscape SoCs Frank Li
2026-07-01 7:42 ` Ioana Ciornei
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