From: Bjorn Helgaas <helgaas@kernel.org>
To: wangjia@ultrarisc.com
Cc: "Xincheng Zhang" <zhangxincheng@ultrarisc.com>,
"Lorenzo Pieralisi" <lpieralisi@kernel.org>,
"Krzysztof Wilczyński" <kwilczynski@kernel.org>,
"Manivannan Sadhasivam" <mani@kernel.org>,
"Rob Herring" <robh@kernel.org>,
"Bjorn Helgaas" <bhelgaas@google.com>,
"Krzysztof Kozlowski" <krzk+dt@kernel.org>,
"Conor Dooley" <conor+dt@kernel.org>,
linux-pci@vger.kernel.org, devicetree@vger.kernel.org,
linux-kernel@vger.kernel.org
Subject: Re: [PATCH 2/2] PCI: ultrarisc: get and enable DP1000 PCIe clocks
Date: Tue, 30 Jun 2026 11:55:50 -0500 [thread overview]
Message-ID: <20260630165550.GA131410@bhelgaas> (raw)
In-Reply-To: <20260629-ultrarisc-pci-clk-v1-2-5ea3308fdab3@ultrarisc.com>
On Mon, Jun 29, 2026 at 01:59:51PM +0800, Jia Wang via B4 Relay wrote:
> From: Jia Wang <wangjia@ultrarisc.com>
>
> Add the required core, dbi, and aux clocks for the DP1000 PCIe
> controller and enable them before initializing the DesignWare host.
> +static int ultrarisc_pcie_init_clks(struct ultrarisc_pcie *ultra)
> +{
> + struct device *dev = ultra->pci.dev;
> + int ret;
> +
> + ultra->clks[0].id = "core";
> + ultra->clks[1].id = "dbi";
> + ultra->clks[2].id = "aux";
> +
> + ret = devm_clk_bulk_get(dev, ARRAY_SIZE(ultra->clks), ultra->clks);
> + if (ret)
> + return dev_err_probe(dev, ret, "Failed to get clocks\n");
This would be the first use of devm_clk_bulk_get() in drivers/pci.
There are several users of devm_clk_bulk_get_all(), which looks pretty
similar. Unless there's a specific reason to use devm_clk_bulk_get(),
could this use devm_clk_bulk_get_all() instead?
next prev parent reply other threads:[~2026-06-30 16:55 UTC|newest]
Thread overview: 14+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-06-29 5:59 [PATCH 0/2] PCI: ultrarisc: Add DP1000 PCIe clock support Jia Wang via B4 Relay
2026-06-29 5:59 ` Jia Wang
2026-06-29 5:59 ` [PATCH 1/2] dt-bindings: pci: ultrarisc: add required DP1000 PCIe clocks Jia Wang via B4 Relay
2026-06-29 5:59 ` Jia Wang
2026-06-29 8:07 ` sashiko-bot
2026-06-29 15:27 ` Conor Dooley
2026-07-02 5:34 ` Jia Wang
2026-06-29 5:59 ` [PATCH 2/2] PCI: ultrarisc: get and enable " Jia Wang via B4 Relay
2026-06-29 5:59 ` Jia Wang
2026-06-29 6:09 ` sashiko-bot
2026-07-02 5:46 ` Jia Wang
2026-06-30 16:55 ` Bjorn Helgaas [this message]
2026-07-02 5:58 ` Jia Wang
2026-07-09 19:48 ` Bjorn Helgaas
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