From: sashiko-bot@kernel.org
To: "Riana Tauro" <riana.tauro@intel.com>
Cc: dri-devel@lists.freedesktop.org
Subject: Re: [PATCH v4 2/3] drm/xe/xe_drm_ras: Add error-event support for PVC
Date: Thu, 02 Jul 2026 09:48:32 +0000 [thread overview]
Message-ID: <20260702094832.F295D1F000E9@smtp.kernel.org> (raw)
In-Reply-To: <20260701094409.129131-7-riana.tauro@intel.com>
Thank you for your contribution! Sashiko AI review found 1 potential issue(s) to consider:
- [Medium] Unconditional emission of spurious zero-delta RAS netlink events for unsupported or uncounted errors.
--
commit 64cb8a4b396dc586545ef894e855aeb177686e56
Author: Riana Tauro <riana.tauro@intel.com>
drm/xe/xe_drm_ras: Add error-event support for PVC
This patch reports drm_ras error events to userspace when an error occurs.
It also adds support for core-compute and SoC errors in PVC.
> diff --git a/drivers/gpu/drm/xe/xe_hw_error.c b/drivers/gpu/drm/xe/xe_hw_error.c
> index 4a4b363fc844b..a833cecc74ec5 100644
> --- a/drivers/gpu/drm/xe/xe_hw_error.c
> +++ b/drivers/gpu/drm/xe/xe_hw_error.c
[ ... ]
> @@ -495,6 +495,9 @@ static void hw_error_source_handler(struct xe_tile *tile, const enum hardware_er
> gt_hw_error_handler(tile, hw_err, error_id);
> if (err_bit == XE_SOC_ERROR)
> soc_hw_error_handler(tile, hw_err, error_id);
> +
> + value = atomic_read(&info[error_id].counter);
> + xe_drm_ras_event(xe, error_id, severity, value, GFP_ATOMIC);
[Severity: Medium]
Does this unconditionally emit spurious zero-delta RAS netlink events for
unsupported or uncounted errors?
When gt_hw_error_handler() or soc_hw_error_handler() are called, they might
not increment the error counter. For example, gt_hw_error_handler() returns
early for non-PVC platforms:
drivers/gpu/drm/xe/xe_hw_error.c:gt_hw_error_handler() {
...
if (xe->info.platform != XE_PVC)
return;
...
}
Similarly, soc_hw_error_handler() skips counter increments for correctable
errors:
drivers/gpu/drm/xe/xe_hw_error.c:soc_hw_error_handler() {
...
if (hw_err == HARDWARE_ERROR_CORRECTABLE) {
xe_mmio_write32(mmio, SOC_GLOBAL_ERR_STAT_REG(master, hw_err), REG_GENMASK(31, 0));
...
goto unmask_gsysevtctl;
}
...
}
In these cases, xe_drm_ras_event() is still called with the unchanged counter
value. Could this cause userspace to receive confusing zero-delta event
updates?
> }
>
> clear_reg:
--
Sashiko AI review · https://sashiko.dev/#/patchset/20260701094409.129131-5-riana.tauro@intel.com?part=2
next prev parent reply other threads:[~2026-07-02 9:48 UTC|newest]
Thread overview: 14+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-07-01 9:44 [PATCH v4 0/3] Add drm_ras netlink error event support Riana Tauro
2026-07-01 9:44 ` [PATCH v4 1/3] drm/drm_ras: Add drm_ras netlink error event Riana Tauro
2026-07-02 9:48 ` sashiko-bot
2026-07-07 6:32 ` Tauro, Riana
2026-07-08 20:21 ` Rodrigo Vivi
2026-07-09 5:15 ` Tauro, Riana
2026-07-09 9:22 ` Raag Jadav
2026-07-01 9:44 ` [PATCH v4 2/3] drm/xe/xe_drm_ras: Add error-event support for PVC Riana Tauro
2026-07-02 9:48 ` sashiko-bot [this message]
2026-07-01 9:44 ` [PATCH v4 3/3] drm/xe/xe_ras: Add error-event support for CRI Riana Tauro
2026-07-09 10:04 ` Raag Jadav
2026-07-01 10:52 ` ✓ CI.KUnit: success for Add drm_ras netlink error event support (rev4) Patchwork
2026-07-01 11:32 ` ✓ Xe.CI.BAT: " Patchwork
2026-07-02 3:52 ` ✓ Xe.CI.FULL: " Patchwork
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