From: sashiko-bot@kernel.org
To: "Ananthu C V" <ananthu.cv@oss.qualcomm.com>
Cc: robh@kernel.org, conor+dt@kernel.org, devicetree@vger.kernel.org
Subject: Re: [PATCH v4 2/3] arm64: dts: qcom: fix SoCCP memory mappings for Glymur
Date: Fri, 03 Jul 2026 12:37:27 +0000 [thread overview]
Message-ID: <20260703123728.2CD5C1F00AC4@smtp.kernel.org> (raw)
In-Reply-To: <20260703-glymur-soccp-v4-2-b706c4c9b3e2@oss.qualcomm.com>
Thank you for your contribution! Sashiko AI review found 1 potential issue(s) to consider:
- [Low] Device tree nodes in `reserved-memory` are no longer sorted by unit-address.
--
commit a19a73590d416c9dc7623921d49433687e8ae84f
Author: Ananthu C V <ananthu.cv@oss.qualcomm.com>
arm64: dts: qcom: fix SoCCP memory mappings for Glymur
This commit updates the SoCCP and SoCCP DTB memory regions to match the
Glymur v21 memory map release requirements.
> diff --git a/arch/arm64/boot/dts/qcom/glymur.dtsi b/arch/arm64/boot/dts/qcom/glymur.dtsi
> --- a/arch/arm64/boot/dts/qcom/glymur.dtsi
> +++ b/arch/arm64/boot/dts/qcom/glymur.dtsi
[ ... ]
> - soccpdtb_mem: soccpdtb@892e0000 {
> - reg = <0x0 0x892e0000 0x0 0x20000>;
> + soccpdtb_mem: soccpdtb@89200000 {
> + reg = <0x0 0x89200000 0x0 0x20000>;
> no-map;
> };
>
> - soccp_mem: soccp@89300000 {
> - reg = <0x0 0x89300000 0x0 0x400000>;
> + soccp_mem: soccp@88e00000 {
> + reg = <0x0 0x88e00000 0x0 0x400000>;
> no-map;
> };
[Severity: Low]
This isn't a bug, but should these nodes be reordered to maintain ascending
unit-address order?
By changing the addresses here, soccpdtb@89200000 now structurally appears
before soccp@88e00000, which breaks the conventional ascending sort order
for reserved-memory nodes.
--
Sashiko AI review · https://sashiko.dev/#/patchset/20260703-glymur-soccp-v4-0-b706c4c9b3e2@oss.qualcomm.com?part=2
next prev parent reply other threads:[~2026-07-03 12:37 UTC|newest]
Thread overview: 18+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-07-03 12:31 [PATCH v4 0/3] Add remoteproc PAS loader for SoCCP on Glymur DT Ananthu C V
2026-07-03 12:31 ` [PATCH v4 1/3] remoteproc: qcom: pas: add needs_tzmem flag to force shmbridge creation Ananthu C V
2026-07-03 12:42 ` sashiko-bot
2026-07-03 12:44 ` Krzysztof Kozlowski
2026-07-03 14:35 ` Ananthu C V
2026-07-03 14:47 ` Krzysztof Kozlowski
2026-07-05 22:26 ` Bjorn Andersson
2026-07-06 6:50 ` Ananthu C V
2026-07-03 12:31 ` [PATCH v4 2/3] arm64: dts: qcom: fix SoCCP memory mappings for Glymur Ananthu C V
2026-07-03 12:37 ` sashiko-bot [this message]
2026-07-03 14:39 ` Ananthu C V
2026-07-05 22:27 ` Bjorn Andersson
2026-07-07 8:46 ` Ananthu C V
2026-07-03 12:31 ` [PATCH v4 3/3] arm64: dts: qcom: add SoCCP DT node " Ananthu C V
2026-07-03 12:41 ` sashiko-bot
2026-07-03 14:42 ` Ananthu C V
2026-07-05 22:41 ` Bjorn Andersson
2026-07-06 6:52 ` Ananthu C V
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=20260703123728.2CD5C1F00AC4@smtp.kernel.org \
--to=sashiko-bot@kernel.org \
--cc=ananthu.cv@oss.qualcomm.com \
--cc=conor+dt@kernel.org \
--cc=devicetree@vger.kernel.org \
--cc=robh@kernel.org \
--cc=sashiko-reviews@lists.linux.dev \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.