From: Harsh Prateek Bora <harshpb@linux.ibm.com>
To: qemu-devel@nongnu.org
Cc: Aditya Gupta <adityag@linux.ibm.com>,
Misbah Anjum N <misanjum@linux.ibm.com>,
Nikhil Kumar Singh <nikhilks@linux.ibm.com>
Subject: [PULL 2/8] tests/qtest/pnv_spi: Test Power11 PNV_SPI
Date: Mon, 6 Jul 2026 13:54:45 +0530 [thread overview]
Message-ID: <20260706082451.59299-3-harshpb@linux.ibm.com> (raw)
In-Reply-To: <20260706082451.59299-1-harshpb@linux.ibm.com>
From: Aditya Gupta <adityag@linux.ibm.com>
Currently pnv-spi-seeprom-test was hardcoded to test the 4th chip in
pnv_chips (power10 as of now).
This requires ensuring to update the index when removing/adding entries
in pnv_chips, such as when Power8E or Power11 gets removed/added in
future commits.
Iterate over all the chips instead, similar to other tests in
pnv-xscom-test.c and pnv-host-i2c-test.c, but skip older chips, since
TYPE_PNV_SPI only exists from Power10 onwards, hence skip older machines
Tests all the pnv_chips similar to other qtests
Tested-by: Misbah Anjum N <misanjum@linux.ibm.com>
Reviewed-by: Nikhil Kumar Singh <nikhilks@linux.ibm.com>
Signed-off-by: Aditya Gupta <adityag@linux.ibm.com>
Link: https://lore.kernel.org/qemu-devel/20260703085955.2318600-3-adityag@linux.ibm.com
Signed-off-by: Harsh Prateek Bora <harshpb@linux.ibm.com>
---
tests/qtest/pnv-spi-seeprom-test.c | 20 ++++++++++++++------
1 file changed, 14 insertions(+), 6 deletions(-)
diff --git a/tests/qtest/pnv-spi-seeprom-test.c b/tests/qtest/pnv-spi-seeprom-test.c
index 44e0b92730..1a78e8d966 100644
--- a/tests/qtest/pnv-spi-seeprom-test.c
+++ b/tests/qtest/pnv-spi-seeprom-test.c
@@ -77,6 +77,7 @@ static void test_spi_seeprom(const void *data)
const PnvChip *chip = data;
QTestState *qts = NULL;
g_autofree char *tmp_path = NULL;
+ const char *machine = "powernv10";
int ret;
int fd;
@@ -87,11 +88,11 @@ static void test_spi_seeprom(const void *data)
g_assert(ret == 0);
close(fd);
- qts = qtest_initf("-machine powernv10 -smp 2,cores=2,"
+ qts = qtest_initf("-machine %s -smp 2,cores=2,"
"threads=1 -accel tcg,thread=single -nographic "
"-blockdev node-name=pib_spic2,driver=file,"
"filename=%s -device 25csm04,bus=chip0.spi.2,cs=0,"
- "drive=pib_spic2", tmp_path);
+ "drive=pib_spic2", machine, tmp_path);
spi_seeprom_transaction(qts, chip);
qtest_quit(qts);
unlink(tmp_path);
@@ -100,9 +101,16 @@ static void test_spi_seeprom(const void *data)
int main(int argc, char **argv)
{
g_test_init(&argc, &argv, NULL);
- char *tname = g_strdup_printf("pnv-xscom/spi-seeprom/%s",
- pnv_chips[3].cpu_model);
- qtest_add_data_func(tname, &pnv_chips[3], test_spi_seeprom);
- g_free(tname);
+
+ for (int i = 0; i < ARRAY_SIZE(pnv_chips); i++) {
+ /* TYPE_PNV_SPI is not instantiated for older Power8/9 machines */
+ if (pnv_chips[i].chip_type < PNV_CHIP_POWER10) {
+ continue;
+ }
+
+ g_autofree char *tname = g_strdup_printf("pnv-xscom/spi-seeprom/%s",
+ pnv_chips[i].cpu_model);
+ qtest_add_data_func(tname, &pnv_chips[i], test_spi_seeprom);
+ }
return g_test_run();
}
--
2.52.0
next prev parent reply other threads:[~2026-07-06 8:26 UTC|newest]
Thread overview: 10+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-07-06 8:24 [PULL 0/8] PPC PR for 11.1 Soft-freeze Harsh Prateek Bora
2026-07-06 8:24 ` [PULL 1/8] tests/functional: Add remote interrupts test for PowerNV Harsh Prateek Bora
2026-07-06 8:24 ` Harsh Prateek Bora [this message]
2026-07-06 8:24 ` [PULL 3/8] tests/qtest: Add Power11 chip & machine to qtests Harsh Prateek Bora
2026-07-06 8:24 ` [PULL 4/8] tests/functional: Use default powernv machine instead of power10 Harsh Prateek Bora
2026-07-06 8:24 ` [PULL 5/8] ppc/pnv: Replace Power8E with Power11 for 'none' machine test Harsh Prateek Bora
2026-07-06 8:24 ` [PULL 6/8] ppc/pnv: Remove Power8E and Power8NVL pnv chips Harsh Prateek Bora
2026-07-06 8:24 ` [PULL 7/8] ppc/pnv: Remove Power8E and Power8NVL CPUs Harsh Prateek Bora
2026-07-06 8:24 ` [PULL 8/8] MAINTAINERS: Add self as maintainer for PowerNV Harsh Prateek Bora
2026-07-07 5:04 ` [PULL 0/8] PPC PR for 11.1 Soft-freeze Stefan Hajnoczi
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