Re: [PATCH 10/12] ARM: dts: rockchip: Add support for RV1106 and RV1103

[sashiko-bot@kernel.org]

Thank you for your contribution! Sashiko AI review found 2 potential issue(s) to consider:
- [Low] The unit-address of the GIC `interrupt-controller` node does not match its `reg` base address.
- [Low] Introduction of undocumented hardware compatible string for the SoC root node.
--

commit dd5d51e321a7026dddb62fa99ec6452872734a4f
Author: Simon Glass <sjg@chromium.org>

ARM: dts: rockchip: Add support for RV1106 and RV1103

This commit adds devicetree files for the Rockchip RV1106 Cortex-A7 SoC
and its RV1103 variant. The pinctrl data is derived from the vendor kernel
in the Luckfox Pico SDK.

[ ... ]

> diff --git a/arch/arm/boot/dts/rockchip/rv1106.dtsi b/arch/arm/boot/dts/rockchip/rv1106.dtsi
> new file mode 100644
> index 0000000000000..e4b57086e04c1
> --- /dev/null
> +++ b/arch/arm/boot/dts/rockchip/rv1106.dtsi
> @@ -0,0 +1,299 @@
> +// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
> +/*
> + * Copyright (c) 2022 Rockchip Electronics Co., Ltd.
> + */
> +
> +#include <dt-bindings/clock/rockchip,rv1106-cru.h>
> +#include <dt-bindings/gpio/gpio.h>
> +#include <dt-bindings/interrupt-controller/arm-gic.h>
> +#include <dt-bindings/interrupt-controller/irq.h>
> +#include <dt-bindings/pinctrl/rockchip.h>
> +
> +/ {
> +	#address-cells = <1>;
> +	#size-cells = <1>;
> +
> +	compatible = "rockchip,rv1106";

[Severity: Low]
Is this root compatible string documented in
Documentation/devicetree/bindings/arm/rockchip.yaml?

It looks like dtbs_check will report a warning because "rockchip,rv1106" is
used here but lacks corresponding YAML binding documentation in this patch.

> +
> +	interrupt-parent = <&gic>;

[ ... ]

> +	soc {
> +		compatible = "simple-bus";
> +		#address-cells = <1>;
> +		#size-cells = <1>;
> +		ranges;
> +
> +		grf: syscon@ff000000 {
> +			compatible = "rockchip,rv1106-grf", "syscon", "simple-mfd";
> +			reg = <0xff000000 0x68000>;
> +
> +			grf_cru: clock-controller {
> +				compatible = "rockchip,rv1106-grf-cru";
> +				#clock-cells = <1>;
> +			};
> +		};
> +
> +		gic: interrupt-controller@ff1f0000 {
> +			compatible = "arm,gic-400";
> +			reg = <0xff1f1000 0x1000>,

[Severity: Low]
Does the unit-address @ff1f0000 need to match the first reg address
0xff1f1000?

This mismatch will trigger a devicetree compiler warning (simple_bus_reg
warning) during the build process.

> +			      <0xff1f2000 0x2000>,
> +			      <0xff1f4000 0x2000>,
> +			      <0xff1f6000 0x2000>;

-- 
Sashiko AI review · https://sashiko.dev/#/patchset/20260706195818.3906949-1-sjg@chromium.org?part=10