From: Bin Meng <bin.meng@processmission.com>
To: QEMU <qemu-devel@nongnu.org>
Cc: "Cédric Le Goater" <clg@redhat.com>,
"Alistair Francis" <alistair@alistair23.me>,
"Andrew Jeffery" <andrew@codeconstruct.com.au>,
"Cédric Le Goater" <clg@kaod.org>,
"Jamin Lin" <jamin_lin@aspeedtech.com>,
"Joel Stanley" <joel@jms.id.au>,
"Kane Chen" <kane_chen@aspeedtech.com>,
"Peter Maydell" <peter.maydell@linaro.org>,
"Steven Lee" <steven_lee@aspeedtech.com>,
"Troy Lee" <leetroy@gmail.com>,
qemu-arm@nongnu.org
Subject: [PATCH v2 07/10] hw/ssi: aspeed_smc: Fix direct-read dummy bytes
Date: Tue, 7 Jul 2026 16:34:26 +0800 [thread overview]
Message-ID: <20260707083431.219671-8-bin.meng@processmission.com> (raw)
In-Reply-To: <20260707083431.219671-1-bin.meng@processmission.com>
m25p80 now consumes fast-read dummy phases as byte counts. The
ASPEED SMC direct-read path still treated the CEx dummy field as
raw cycles and emitted field * 8 SSI transfers. Convert the
ASPEED dummy field to SSI byte transfers using the selected
direct-read data width.
Fixes: ac2810defa9d ("aspeed/smc: handle dummy bytes when doing fast reads in command mode")
Signed-off-by: Bin Meng <bin.meng@processmission.com>
Reviewed-by: Cédric Le Goater <clg@redhat.com>
Tested-by: Cédric Le Goater <clg@redhat.com>
---
(no changes since v1)
hw/ssi/aspeed_smc.c | 21 +++++++++++++++------
1 file changed, 15 insertions(+), 6 deletions(-)
diff --git a/hw/ssi/aspeed_smc.c b/hw/ssi/aspeed_smc.c
index d87fbd798c..3f957d153f 100644
--- a/hw/ssi/aspeed_smc.c
+++ b/hw/ssi/aspeed_smc.c
@@ -449,19 +449,28 @@ static uint32_t aspeed_smc_check_segment_addr(const AspeedSMCFlash *fl,
return addr;
}
-static int aspeed_smc_flash_dummies(const AspeedSMCFlash *fl)
+static int aspeed_smc_flash_dummy_bytes(const AspeedSMCFlash *fl)
{
const AspeedSMCState *s = fl->controller;
uint32_t r_ctrl0 = s->regs[s->r_ctrl0 + fl->cs];
uint32_t dummy_high = (r_ctrl0 >> CTRL_DUMMY_HIGH_SHIFT) & 0x1;
uint32_t dummy_low = (r_ctrl0 >> CTRL_DUMMY_LOW_SHIFT) & 0x3;
- uint32_t dummies = ((dummy_high << 2) | dummy_low) * 8;
+ uint32_t dummy_bytes = (dummy_high << 2) | dummy_low;
- if (r_ctrl0 & CTRL_IO_DUAL_ADDR_DATA) {
- dummies /= 2;
+ /*
+ * Scale the controller dummy field to SSI byte transfers using the
+ * direct-read dummy/address bus width.
+ */
+ if ((r_ctrl0 & CTRL_IO_QPI) ||
+ ((r_ctrl0 & CTRL_IO_QUAD_DATA) &&
+ (r_ctrl0 & CTRL_IO_QUAD_ADDR_DATA))) {
+ dummy_bytes *= 4;
+ } else if ((r_ctrl0 & CTRL_IO_DUAL_DATA) &&
+ (r_ctrl0 & CTRL_IO_DUAL_ADDR_DATA)) {
+ dummy_bytes *= 2;
}
- return dummies;
+ return dummy_bytes;
}
static void aspeed_smc_flash_setup(AspeedSMCFlash *fl, uint32_t addr)
@@ -487,7 +496,7 @@ static void aspeed_smc_flash_setup(AspeedSMCFlash *fl, uint32_t addr)
* settings, let's check for fast read mode.
*/
if (aspeed_smc_flash_mode(fl) == CTRL_FREADMODE) {
- for (i = 0; i < aspeed_smc_flash_dummies(fl); i++) {
+ for (i = 0; i < aspeed_smc_flash_dummy_bytes(fl); i++) {
ssi_transfer(fl->controller->spi, s->regs[R_DUMMY_DATA] & 0xff);
}
}
--
2.53.0
next prev parent reply other threads:[~2026-07-07 8:36 UTC|newest]
Thread overview: 21+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-07-07 8:34 [PATCH v2 00/10] hw/{block, ssi}: Fix spi-nor flash dummy byte handling Bin Meng via qemu development
2026-07-07 8:34 ` Bin Meng via
2026-07-07 8:34 ` [PATCH v2 01/10] hw/block: m25p80: Fix dummy byte handling for Winbond flash Bin Meng
2026-07-07 8:34 ` [PATCH v2 02/10] hw/block: m25p80: Fix dummy byte handling for Numonyx/Micron flash Bin Meng
2026-07-07 8:34 ` [PATCH v2 03/10] hw/block: m25p80: Fix dummy byte handling for Macronix flash Bin Meng
2026-07-07 8:34 ` [PATCH v2 04/10] hw/block: m25p80: Fix dummy byte handling for Spansion flash Bin Meng
2026-07-07 12:34 ` Philippe Mathieu-Daudé
2026-07-07 12:51 ` Cédric Le Goater
2026-07-07 14:00 ` Philippe Mathieu-Daudé
2026-07-07 14:05 ` Cédric Le Goater
2026-07-07 14:26 ` Cédric Le Goater
2026-07-07 14:49 ` Bin Meng
2026-07-07 15:05 ` Philippe Mathieu-Daudé
2026-07-07 8:34 ` [PATCH v2 05/10] hw/ssi: npcm7xx_fiu: Correct the dummy cycle emulation logic Bin Meng
2026-07-07 8:34 ` [PATCH v2 06/10] hw/ssi: xilinx_spips: Fix dummy phase handling Bin Meng
2026-07-07 8:34 ` Bin Meng [this message]
2026-07-07 8:34 ` [PATCH v2 08/10] Revert "aspeed/smc: Fix number of dummy cycles for FAST_READ_4 command" Bin Meng
2026-07-07 8:34 ` [PATCH v2 09/10] Revert "aspeed/smc: snoop SPI transfers to fake dummy cycles" Bin Meng
2026-07-07 8:34 ` [PATCH v2 10/10] docs/devel: Document SSI dummy-cycle ownership Bin Meng
2026-07-07 13:10 ` Philippe Mathieu-Daudé
2026-07-07 9:11 ` [PATCH v2 00/10] hw/{block,ssi}: Fix spi-nor flash dummy byte handling Cédric Le Goater
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