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From: Zhi Wang <zhiw@nvidia.com>
To: Alexandre Courbot <acourbot@nvidia.com>
Cc: <dakr@kernel.org>, <airlied@gmail.com>, <simona@ffwll.ch>,
	<ojeda@kernel.org>, <alex.gaynor@gmail.com>,
	<boqun.feng@gmail.com>, <gary@garyguo.net>,
	<bjorn3_gh@protonmail.com>, <lossin@kernel.org>,
	<a.hindborg@kernel.org>, <aliceryhl@google.com>,
	<tmgross@umich.edu>, <jhubbard@nvidia.com>,
	<ecourtney@nvidia.com>, <joelagnelf@nvidia.com>,
	<apopple@nvidia.com>, <cjia@nvidia.com>, <smitra@nvidia.com>,
	<kjaju@nvidia.com>, <alkumar@nvidia.com>, <ankita@nvidia.com>,
	<aniketa@nvidia.com>, <kwankhede@nvidia.com>,
	<targupta@nvidia.com>, <nova-gpu@lists.linux.dev>,
	<linux-kernel@vger.kernel.org>, <zhiwang@kernel.org>,
	Bjorn Helgaas <bhelgaas@google.com>,
	David Laight <david.laight.linux@gmail.com>,
	<linux-pci@vger.kernel.org>
Subject: Re: [PATCH v3 2/8] rust: pci: add sriov_get_totalvfs() helper
Date: Thu, 9 Jul 2026 17:24:27 +0300	[thread overview]
Message-ID: <20260709172427.5e9fa20a@inno-dell> (raw)
In-Reply-To: <DJT92JKN4D9E.24W84LFKXLWDK@nvidia.com>

On Wed, 08 Jul 2026 23:13:08 +0900
"Alexandre Courbot" <acourbot@nvidia.com> wrote:

> On Wed Jul 8, 2026 at 11:03 PM JST, Alexandre Courbot wrote:
> > On Wed Jul 1, 2026 at 3:26 PM JST, Zhi Wang wrote:
> >> Expose pci_sriov_get_totalvfs() to Rust PCI drivers so they can
> >> query how many SR-IOV VFs a device supports.
> >>
> >> Cc: Alexandre Courbot <acourbot@nvidia.com>
> >> Cc: Bjorn Helgaas <bhelgaas@google.com>
> >> Cc: David Laight <david.laight.linux@gmail.com>
> >> Cc: Gary Guo <gary@garyguo.net>
> >> Cc: linux-pci@vger.kernel.org
> >> Link:
> >> https://lore.kernel.org/all/DJHPRE4TGGT8.BUTMYOF5YE05@nvidia.com/
> >> Signed-off-by: Zhi Wang <zhiw@nvidia.com> ---
> >>  rust/kernel/pci.rs | 11 +++++++++++
> >>  1 file changed, 11 insertions(+)
> >>
> >> diff --git a/rust/kernel/pci.rs b/rust/kernel/pci.rs
> >> index 5071cae6543f..21c51981c02e 100644
> >> --- a/rust/kernel/pci.rs
> >> +++ b/rust/kernel/pci.rs
> >> @@ -450,6 +450,17 @@ pub fn pci_class(&self) -> Class {
> >>          // SAFETY: `self.as_raw` is a valid pointer to a `struct
> >> pci_dev`. Class::from_raw(unsafe { (*self.as_raw()).class })
> >>      }
> >> +
> >> +    /// Returns the total number of VFs, or 0 if SR-IOV is not
> >> available.
> >> +    #[inline]
> >> +    pub fn sriov_get_totalvfs(&self) -> u16 {
> >> +        // SAFETY: `self.as_raw()` is a valid pointer to a
> >> `struct pci_dev`.
> >> +        let total_vfs = unsafe {
> >> bindings::pci_sriov_get_totalvfs(self.as_raw()) }; +
> >> +        // CAST: The C helper returns `unsigned int`, but the
> >> value originates
> >> +        // from TotalVFs/driver_max_VFs, so this cast cannot
> >> truncate.
> >
> > nit: "from TotalVFs/driver_max_VFs (which are defined as `u16`),
> > ..."
> >
> > With that,
> >
> > Reviewed-by: Alexandre Courbot <acourbot@nvidia.com>
> 
> ... with an additional item for thought: in a previous revision [1], I
> had raised the question of making the return type
> `Option<NonZero<u16>>`, as I think it better encodes "0 if SR-IOV is
> not available" - callers are then forced to consider the dichotomy of
> the result, and not interpret a particular value as having a special
> meaning.
> 
> OTOH, for all practical purposes 0 VFs also seems to be strictly
> equivalent to "SR-IOV is not available", so please take this as a
> nit to consider, not a blocker.
> 
> [1]
> https://lore.kernel.org/rust-for-linux/DETDILPA1GFY.27WND0TEC5352@nvidia.com/

Nice advice. I will address it in v4. :)

  reply	other threads:[~2026-07-09 14:25 UTC|newest]

Thread overview: 19+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2026-07-01  6:26 [PATCH v3 0/8] gpu: nova-core: boot GSP with vGPU enabled Zhi Wang
2026-07-01  6:26 ` [PATCH v3 1/8] PCI/IOV: Return unsigned int from pci_sriov_get_totalvfs() Zhi Wang
2026-07-08 13:54   ` Alexandre Courbot
2026-07-01  6:26 ` [PATCH v3 2/8] rust: pci: add sriov_get_totalvfs() helper Zhi Wang
2026-07-08 14:03   ` Alexandre Courbot
2026-07-08 14:13     ` Alexandre Courbot
2026-07-09 14:24       ` Zhi Wang [this message]
2026-07-08 14:41     ` Alexandre Courbot
2026-07-09 14:25       ` Zhi Wang
2026-07-01  6:26 ` [PATCH v3 3/8] gpu: nova-core: fsp: rename FSP response header type Zhi Wang
2026-07-08 13:37   ` Alexandre Courbot
2026-07-01  6:26 ` [PATCH v3 4/8] gpu: nova-core: read vGPU mode from FSP via PRC protocol Zhi Wang
2026-07-01  6:26 ` [PATCH v3 5/8] gpu: nova-core: add vGPU preludes Zhi Wang
2026-07-09  5:25   ` Alexandre Courbot
2026-07-09 14:39     ` Zhi Wang
2026-07-01  6:26 ` [PATCH v3 6/8] gpu: nova-core: build SetRegistry entries dynamically Zhi Wang
2026-07-08 13:37   ` Alexandre Courbot
2026-07-01  6:26 ` [PATCH v3 7/8] gpu: nova-core: set RMSetSriovMode for vGPU Zhi Wang
2026-07-01  6:26 ` [PATCH v3 8/8] gpu: nova-core: reserve vGPU WPR2 heap Zhi Wang

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