From: sashiko-bot@kernel.org
To: "Claudiu Beznea" <claudiu.beznea+renesas@tuxon.dev>
Cc: wsa+renesas@sang-engineering.com, devicetree@vger.kernel.org,
"Oleksij Rempel" <o.rempel@pengutronix.de>,
robh@kernel.org, "Oliver Hartkopp" <socketcan@hartkopp.net>,
conor+dt@kernel.org, "Vincent Mailhol" <mailhol@kernel.org>,
"Marc Kleine-Budde" <mkl@pengutronix.de>,
linux-can@vger.kernel.org
Subject: Re: [PATCH v2 8/8] arm64: dts: renesas: rzg3s-smarc: Enable CAN-FD
Date: Thu, 09 Jul 2026 18:40:00 +0000 [thread overview]
Message-ID: <20260709184001.9C14A1F00A3A@smtp.kernel.org> (raw)
In-Reply-To: <20260709182332.876408-9-claudiu.beznea+renesas@tuxon.dev>
Thank you for your contribution! Sashiko AI review found 1 potential issue(s) to consider:
- [Medium] CAN channels are enabled unconditionally even when their transceiver standby pins are disconnected by hardware switches, rendering the CAN bus physically inoperable.
--
--- Patch [8]: [PATCH v2 8/8] arm64: dts: renesas: rzg3s-smarc: Enable CAN-FD ---
commit f8b012ec526a1699faa0dea73b3d5f10dc6c3d9d
Author: Claudiu Beznea <claudiu.beznea.uj@bp.renesas.com>
arm64: dts: renesas: rzg3s-smarc: Enable CAN-FD
This commit enables the CAN FD controller and its two channels on the
Renesas RZ/G3S SMARC Module. It conditionally sets up the standby GPIOs
for the CAN transceivers based on the states of the SW_GPIO_CAN_PMOD
switches.
> diff --git a/arch/arm64/boot/dts/renesas/rzg3s-smarc.dtsi b/arch/arm64/boot/dts/renesas/rzg3s-smarc.dtsi
> index 70af605168b07..2be684f559144 100644
> --- a/arch/arm64/boot/dts/renesas/rzg3s-smarc.dtsi
> +++ b/arch/arm64/boot/dts/renesas/rzg3s-smarc.dtsi
[ ... ]
> @@ -92,6 +110,22 @@ &audio_clk2 {
> clock-frequency = <12288000>;
> };
>
> +&canfd {
> + pinctrl-0 = <&canfd_pins>;
> + pinctrl-names = "default";
> + status = "okay";
> +
> + channel0 {
> + phys = <&can_transceiver0>;
> + status = "okay";
> + };
> +
> + channel1 {
> + phys = <&can_transceiver1>;
> + status = "okay";
> + };
> +};
[Severity: Medium]
Since SW_GPIO_CAN_PMOD1 and SW_GPIO_CAN_PMOD2 are SW_ON by default, the
transceiver standby pins are disconnected from the SoC GPIOs. Because the
TCAN1042 PHY has an internal pull-up on the STB pin, leaving it floating
forces the transceiver into standby mode.
Does setting status = "okay" here unconditionally expose inoperable CAN bus
interfaces to userspace? Should the channel status be guarded by the same
switch macros used for the standby-gpios properties?
--
Sashiko AI review · https://sashiko.dev/#/patchset/20260709182332.876408-1-claudiu.beznea+renesas@tuxon.dev?part=8
prev parent reply other threads:[~2026-07-09 18:40 UTC|newest]
Thread overview: 14+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-07-09 18:23 [PATCH v2 0/8] can: rcar_canfd: Add support for Renesas RZ/G3S Claudiu Beznea
2026-07-09 18:23 ` [PATCH v2 1/8] clk: r9a08g045-cpg: Add clocks and resets for CAN-FD Claudiu Beznea
2026-07-10 10:18 ` Geert Uytterhoeven
2026-07-09 18:23 ` [PATCH v2 2/8] dt-bindings: can: renesas,rcar-canfd: Document RZ/G3S SoC Claudiu Beznea
2026-07-10 10:14 ` Geert Uytterhoeven
2026-07-09 18:23 ` [PATCH v2 3/8] can: rcar_canfd: Fix typos in macro names Claudiu Beznea
2026-07-09 18:23 ` [PATCH v2 4/8] can: rcar_canfd: Allow the CAN FD clock to be sourced from fck Claudiu Beznea
2026-07-09 18:35 ` sashiko-bot
2026-07-09 18:23 ` [PATCH v2 5/8] can: rcar_canfd: Do not set registers selecting the CAN mode Claudiu Beznea
2026-07-09 18:23 ` [PATCH v2 6/8] can: rcar_canfd: Add support for Renesas RZ/G3S Claudiu Beznea
2026-07-09 18:39 ` sashiko-bot
2026-07-09 18:23 ` [PATCH v2 7/8] arm64: dts: renesas: r9a08g045: Add CAN-FD node Claudiu Beznea
2026-07-09 18:23 ` [PATCH v2 8/8] arm64: dts: renesas: rzg3s-smarc: Enable CAN-FD Claudiu Beznea
2026-07-09 18:40 ` sashiko-bot [this message]
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