From: Sasha Levin <sashal@kernel.org>
To: Greg Kroah-Hartman <gregkh@linuxfoundation.org>,
Huacai Chen <chenhuacai@kernel.org>
Cc: Sasha Levin <sashal@kernel.org>, Xuerui Wang <kernel@xen0n.name>,
stable@vger.kernel.org, linux-kernel@vger.kernel.org,
loongarch@lists.linux.dev, Huacai Chen <chenhuacai@loongson.cn>
Subject: Re: [PATCH for 6.6] LoongArch: Add PIO for early access before ACPI PCI root register
Date: Fri, 10 Jul 2026 17:03:03 -0400 [thread overview]
Message-ID: <20260710163023.agent5-0007@kernel.org> (raw)
In-Reply-To: <20260710122613.1596480-1-chenhuacai@loongson.cn>
On Thu, Jul 10, 2026 at 08:26:13PM +0800, Huacai Chen wrote:
> commit 6061e65f95713b01f4313cda6637dfe3aa5412b4 upstream.
>
> For ACPI system we suppose the ISA/LPC PIO range is registered together
> with PCI root bridge. But the fact is there may be some early access to
> the ISA/LPC PIO range before ACPI PCI root register (most of them are
> due to abnormal BIOS).
Queued for 6.6, thanks. I fixed up one context line in
arch/loongarch/kernel/acpi.c that didn't match the 6.6.y tree.
--
Thanks,
Sasha
prev parent reply other threads:[~2026-07-10 21:03 UTC|newest]
Thread overview: 2+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-07-10 12:26 [PATCH for 6.6] LoongArch: Add PIO for early access before ACPI PCI root register Huacai Chen
2026-07-10 21:03 ` Sasha Levin [this message]
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