diff for duplicates of <202607122241.qzP3QAXF-lkp@intel.com> diff --git a/a/1.txt b/N1/1.txt index 2e82d92..2986af5 100644 --- a/a/1.txt +++ b/N1/1.txt @@ -1,15 +1,6 @@ -BCC: lkp@intel.com -CC: oe-kbuild-all@lists.linux.dev -TO: Praveen Talari <praveen.talari@oss.qualcomm.com> -CC: Mark Brown <broonie@kernel.org> -CC: "Rafael J. Wysocki (Intel)" <rafael@kernel.org> -CC: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com> - tree: https://git.kernel.org/pub/scm/linux/kernel/git/next/linux-next.git master head: bee763d5f341b99cf472afeb508d4988f62a6ca1 commit: d8e9ea989acb54508477e4a8c9d9eaf8217e0081 [5449/5655] spi: qcom-geni: Fix missing error check on pm_runtime_get_sync() -:::::: branch date: 2 days ago -:::::: commit date: 2 days ago config: microblaze-randconfig-r071-20260711 (https://download.01.org/0day-ci/archive/20260712/202607122241.qzP3QAXF-lkp@intel.com/config) compiler: microblaze-linux-gcc (GCC) 8.5.0 smatch: v0.5.0-9185-gbcc58b9c @@ -28,7 +19,6 @@ drivers/spi/spi-geni-qcom.c:648 spi_geni_init() warn: missing error code? 'ret' vim +/ret +637 drivers/spi/spi-geni-qcom.c -b59c122484ecb1 Vinod Koul 2021-10-20 616 561de45f72bd5f Girish Mahadevan 2018-10-03 617 static int spi_geni_init(struct spi_geni_master *mas) 561de45f72bd5f Girish Mahadevan 2018-10-03 618 { 14cea92338a077 Uwe Kleine-König 2024-02-07 619 struct spi_controller *spi = dev_get_drvdata(mas->dev); @@ -50,6 +40,9 @@ d7f74cc31a89a4 Praveen Talari 2023-07-14 633 d7f74cc31a89a4 Praveen Talari 2023-07-14 635 if (proto != GENI_SE_SPI_SLAVE) { d7f74cc31a89a4 Praveen Talari 2023-07-14 636 dev_err(mas->dev, "Invalid proto %d\n", proto); d8e9ea989acb54 Praveen Talari 2026-07-10 @637 return ret; + +s/ret/-EINVAL/ + d7f74cc31a89a4 Praveen Talari 2023-07-14 638 } d7f74cc31a89a4 Praveen Talari 2023-07-14 639 spi_slv_setup(mas); 99cf351ee1c46b Viken Dadhaniya 2025-09-11 640 } else if (proto == GENI_SE_INVALID_PROTO) { @@ -61,70 +54,12 @@ d8e9ea989acb54 Praveen Talari 2026-07-10 644 return ret; d7f74cc31a89a4 Praveen Talari 2023-07-14 646 } else if (proto != GENI_SE_SPI) { 561de45f72bd5f Girish Mahadevan 2018-10-03 647 dev_err(mas->dev, "Invalid proto %d\n", proto); d8e9ea989acb54 Praveen Talari 2026-07-10 648 return ret; + +Same. + 561de45f72bd5f Girish Mahadevan 2018-10-03 649 } 561de45f72bd5f Girish Mahadevan 2018-10-03 650 mas->tx_fifo_depth = geni_se_get_tx_fifo_depth(se); 561de45f72bd5f Girish Mahadevan 2018-10-03 651 -561de45f72bd5f Girish Mahadevan 2018-10-03 652 /* Width of Tx and Rx FIFO is same */ -561de45f72bd5f Girish Mahadevan 2018-10-03 653 mas->fifo_width_bits = geni_se_get_tx_fifo_width(se); -561de45f72bd5f Girish Mahadevan 2018-10-03 654 -561de45f72bd5f Girish Mahadevan 2018-10-03 655 /* -561de45f72bd5f Girish Mahadevan 2018-10-03 656 * Hardware programming guide suggests to configure -561de45f72bd5f Girish Mahadevan 2018-10-03 657 * RX FIFO RFR level to fifo_depth-2. -561de45f72bd5f Girish Mahadevan 2018-10-03 658 */ -fc129a43aa2705 Douglas Anderson 2020-09-12 659 geni_se_init(se, mas->tx_fifo_depth - 3, mas->tx_fifo_depth - 2); -561de45f72bd5f Girish Mahadevan 2018-10-03 660 /* Transmit an entire FIFO worth of data per IRQ */ -561de45f72bd5f Girish Mahadevan 2018-10-03 661 mas->tx_wm = 1; -561de45f72bd5f Girish Mahadevan 2018-10-03 662 ver = geni_se_get_qup_hw_version(se); -561de45f72bd5f Girish Mahadevan 2018-10-03 663 major = GENI_SE_VERSION_MAJOR(ver); -561de45f72bd5f Girish Mahadevan 2018-10-03 664 minor = GENI_SE_VERSION_MINOR(ver); -561de45f72bd5f Girish Mahadevan 2018-10-03 665 -561de45f72bd5f Girish Mahadevan 2018-10-03 666 if (major == 1 && minor == 0) -561de45f72bd5f Girish Mahadevan 2018-10-03 667 mas->oversampling = 2; -561de45f72bd5f Girish Mahadevan 2018-10-03 668 else -561de45f72bd5f Girish Mahadevan 2018-10-03 669 mas->oversampling = 1; -561de45f72bd5f Girish Mahadevan 2018-10-03 670 -b59c122484ecb1 Vinod Koul 2021-10-20 671 fifo_disable = readl(se->base + GENI_IF_DISABLE_RO) & FIFO_IF_DISABLE; -b59c122484ecb1 Vinod Koul 2021-10-20 672 switch (fifo_disable) { -b59c122484ecb1 Vinod Koul 2021-10-20 673 case 1: -b59c122484ecb1 Vinod Koul 2021-10-20 674 ret = spi_geni_grab_gpi_chan(mas); -b59c122484ecb1 Vinod Koul 2021-10-20 675 if (!ret) { /* success case */ -b59c122484ecb1 Vinod Koul 2021-10-20 676 mas->cur_xfer_mode = GENI_GPI_DMA; -b59c122484ecb1 Vinod Koul 2021-10-20 677 geni_se_select_mode(se, GENI_GPI_DMA); -b59c122484ecb1 Vinod Koul 2021-10-20 678 dev_dbg(mas->dev, "Using GPI DMA mode for SPI\n"); -b59c122484ecb1 Vinod Koul 2021-10-20 679 break; -9d7054fb3ac2e8 Neil Armstrong 2023-06-15 680 } else if (ret == -EPROBE_DEFER) { -d8e9ea989acb54 Praveen Talari 2026-07-10 681 return ret; -b59c122484ecb1 Vinod Koul 2021-10-20 682 } -b59c122484ecb1 Vinod Koul 2021-10-20 683 /* -e5f0dfa78ac773 Vijaya Krishna Nivarthi 2022-12-08 684 * in case of failure to get gpi dma channel, we can still do the -b59c122484ecb1 Vinod Koul 2021-10-20 685 * FIFO mode, so fallthrough -b59c122484ecb1 Vinod Koul 2021-10-20 686 */ -b59c122484ecb1 Vinod Koul 2021-10-20 687 dev_warn(mas->dev, "FIFO mode disabled, but couldn't get DMA, fall back to FIFO mode\n"); -b59c122484ecb1 Vinod Koul 2021-10-20 688 fallthrough; -b59c122484ecb1 Vinod Koul 2021-10-20 689 -b59c122484ecb1 Vinod Koul 2021-10-20 690 case 0: -b59c122484ecb1 Vinod Koul 2021-10-20 691 mas->cur_xfer_mode = GENI_SE_FIFO; -da48dc8c70c20e Douglas Anderson 2020-07-01 692 geni_se_select_mode(se, GENI_SE_FIFO); -739062a9f1e9a7 Jonathan Marek 2025-11-20 693 /* setup_fifo_params assumes that these registers start with a zero value */ -739062a9f1e9a7 Jonathan Marek 2025-11-20 694 writel(0, se->base + SE_SPI_LOOPBACK); -739062a9f1e9a7 Jonathan Marek 2025-11-20 695 writel(0, se->base + SE_SPI_DEMUX_SEL); -739062a9f1e9a7 Jonathan Marek 2025-11-20 696 writel(0, se->base + SE_SPI_CPHA); -739062a9f1e9a7 Jonathan Marek 2025-11-20 697 writel(0, se->base + SE_SPI_CPOL); -739062a9f1e9a7 Jonathan Marek 2025-11-20 698 writel(0, se->base + SE_SPI_DEMUX_OUTPUT_INV); -b59c122484ecb1 Vinod Koul 2021-10-20 699 ret = 0; -b59c122484ecb1 Vinod Koul 2021-10-20 700 break; -b59c122484ecb1 Vinod Koul 2021-10-20 701 } -da48dc8c70c20e Douglas Anderson 2020-07-01 702 -b99181cdf9fa02 Jonathan Marek 2025-11-20 703 /* We never control CS manually */ -8726bdcef62eac Yang Yingliang 2023-11-28 704 if (!spi->target) { -14ac4e049dc118 Douglas Anderson 2020-09-12 705 spi_tx_cfg = readl(se->base + SE_SPI_TRANS_CFG); -14ac4e049dc118 Douglas Anderson 2020-09-12 706 spi_tx_cfg &= ~CS_TOGGLE; -14ac4e049dc118 Douglas Anderson 2020-09-12 707 writel(spi_tx_cfg, se->base + SE_SPI_TRANS_CFG); -d7f74cc31a89a4 Praveen Talari 2023-07-14 708 } -14ac4e049dc118 Douglas Anderson 2020-09-12 709 -b59c122484ecb1 Vinod Koul 2021-10-20 710 return ret; -561de45f72bd5f Girish Mahadevan 2018-10-03 711 } -561de45f72bd5f Girish Mahadevan 2018-10-03 712 -- 0-DAY CI Kernel Test Service diff --git a/a/content_digest b/N1/content_digest index 0e269fa..3267940 100644 --- a/a/content_digest +++ b/N1/content_digest @@ -1,23 +1,18 @@ - "From\0kernel test robot <lkp@intel.com>\0" + "From\0Dan Carpenter <error27@gmail.com>\0" "Subject\0[linux-next:master 5449/5655] drivers/spi/spi-geni-qcom.c:637 spi_geni_init() warn: missing error code? 'ret'\0" - "Date\0Sun, 12 Jul 2026 23:35:01 +0800\0" - "To\0oe-kbuild@lists.linux.dev\0" + "Date\0Mon, 13 Jul 2026 11:02:06 +0300\0" + "To\0oe-kbuild@lists.linux.dev" + " Praveen Talari <praveen.talari@oss.qualcomm.com>\0" "Cc\0lkp@intel.com" - " Dan Carpenter <error27@gmail.com>\0" + oe-kbuild-all@lists.linux.dev + Mark Brown <broonie@kernel.org> + Rafael J. Wysocki (Intel) <rafael@kernel.org> + " Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>\0" "\00:1\0" "b\0" - "BCC: lkp@intel.com\n" - "CC: oe-kbuild-all@lists.linux.dev\n" - "TO: Praveen Talari <praveen.talari@oss.qualcomm.com>\n" - "CC: Mark Brown <broonie@kernel.org>\n" - "CC: \"Rafael J. Wysocki (Intel)\" <rafael@kernel.org>\n" - "CC: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>\n" - "\n" "tree: https://git.kernel.org/pub/scm/linux/kernel/git/next/linux-next.git master\n" "head: bee763d5f341b99cf472afeb508d4988f62a6ca1\n" "commit: d8e9ea989acb54508477e4a8c9d9eaf8217e0081 [5449/5655] spi: qcom-geni: Fix missing error check on pm_runtime_get_sync()\n" - ":::::: branch date: 2 days ago\n" - ":::::: commit date: 2 days ago\n" "config: microblaze-randconfig-r071-20260711 (https://download.01.org/0day-ci/archive/20260712/202607122241.qzP3QAXF-lkp@intel.com/config)\n" "compiler: microblaze-linux-gcc (GCC) 8.5.0\n" "smatch: v0.5.0-9185-gbcc58b9c\n" @@ -36,7 +31,6 @@ "\n" "vim +/ret +637 drivers/spi/spi-geni-qcom.c\n" "\n" - "b59c122484ecb1 Vinod Koul 2021-10-20 616 \n" "561de45f72bd5f Girish Mahadevan 2018-10-03 617 static int spi_geni_init(struct spi_geni_master *mas)\n" "561de45f72bd5f Girish Mahadevan 2018-10-03 618 {\n" "14cea92338a077 Uwe Kleine-K\303\266nig 2024-02-07 619 \tstruct spi_controller *spi = dev_get_drvdata(mas->dev);\n" @@ -58,6 +52,9 @@ "d7f74cc31a89a4 Praveen Talari 2023-07-14 635 \t\tif (proto != GENI_SE_SPI_SLAVE) {\n" "d7f74cc31a89a4 Praveen Talari 2023-07-14 636 \t\t\tdev_err(mas->dev, \"Invalid proto %d\\n\", proto);\n" "d8e9ea989acb54 Praveen Talari 2026-07-10 @637 \t\t\treturn ret;\n" + "\n" + "s/ret/-EINVAL/\n" + "\n" "d7f74cc31a89a4 Praveen Talari 2023-07-14 638 \t\t}\n" "d7f74cc31a89a4 Praveen Talari 2023-07-14 639 \t\tspi_slv_setup(mas);\n" "99cf351ee1c46b Viken Dadhaniya 2025-09-11 640 \t} else if (proto == GENI_SE_INVALID_PROTO) {\n" @@ -69,73 +66,15 @@ "d7f74cc31a89a4 Praveen Talari 2023-07-14 646 \t} else if (proto != GENI_SE_SPI) {\n" "561de45f72bd5f Girish Mahadevan 2018-10-03 647 \t\tdev_err(mas->dev, \"Invalid proto %d\\n\", proto);\n" "d8e9ea989acb54 Praveen Talari 2026-07-10 648 \t\treturn ret;\n" + "\n" + "Same.\n" + "\n" "561de45f72bd5f Girish Mahadevan 2018-10-03 649 \t}\n" "561de45f72bd5f Girish Mahadevan 2018-10-03 650 \tmas->tx_fifo_depth = geni_se_get_tx_fifo_depth(se);\n" "561de45f72bd5f Girish Mahadevan 2018-10-03 651 \n" - "561de45f72bd5f Girish Mahadevan 2018-10-03 652 \t/* Width of Tx and Rx FIFO is same */\n" - "561de45f72bd5f Girish Mahadevan 2018-10-03 653 \tmas->fifo_width_bits = geni_se_get_tx_fifo_width(se);\n" - "561de45f72bd5f Girish Mahadevan 2018-10-03 654 \n" - "561de45f72bd5f Girish Mahadevan 2018-10-03 655 \t/*\n" - "561de45f72bd5f Girish Mahadevan 2018-10-03 656 \t * Hardware programming guide suggests to configure\n" - "561de45f72bd5f Girish Mahadevan 2018-10-03 657 \t * RX FIFO RFR level to fifo_depth-2.\n" - "561de45f72bd5f Girish Mahadevan 2018-10-03 658 \t */\n" - "fc129a43aa2705 Douglas Anderson 2020-09-12 659 \tgeni_se_init(se, mas->tx_fifo_depth - 3, mas->tx_fifo_depth - 2);\n" - "561de45f72bd5f Girish Mahadevan 2018-10-03 660 \t/* Transmit an entire FIFO worth of data per IRQ */\n" - "561de45f72bd5f Girish Mahadevan 2018-10-03 661 \tmas->tx_wm = 1;\n" - "561de45f72bd5f Girish Mahadevan 2018-10-03 662 \tver = geni_se_get_qup_hw_version(se);\n" - "561de45f72bd5f Girish Mahadevan 2018-10-03 663 \tmajor = GENI_SE_VERSION_MAJOR(ver);\n" - "561de45f72bd5f Girish Mahadevan 2018-10-03 664 \tminor = GENI_SE_VERSION_MINOR(ver);\n" - "561de45f72bd5f Girish Mahadevan 2018-10-03 665 \n" - "561de45f72bd5f Girish Mahadevan 2018-10-03 666 \tif (major == 1 && minor == 0)\n" - "561de45f72bd5f Girish Mahadevan 2018-10-03 667 \t\tmas->oversampling = 2;\n" - "561de45f72bd5f Girish Mahadevan 2018-10-03 668 \telse\n" - "561de45f72bd5f Girish Mahadevan 2018-10-03 669 \t\tmas->oversampling = 1;\n" - "561de45f72bd5f Girish Mahadevan 2018-10-03 670 \n" - "b59c122484ecb1 Vinod Koul 2021-10-20 671 \tfifo_disable = readl(se->base + GENI_IF_DISABLE_RO) & FIFO_IF_DISABLE;\n" - "b59c122484ecb1 Vinod Koul 2021-10-20 672 \tswitch (fifo_disable) {\n" - "b59c122484ecb1 Vinod Koul 2021-10-20 673 \tcase 1:\n" - "b59c122484ecb1 Vinod Koul 2021-10-20 674 \t\tret = spi_geni_grab_gpi_chan(mas);\n" - "b59c122484ecb1 Vinod Koul 2021-10-20 675 \t\tif (!ret) { /* success case */\n" - "b59c122484ecb1 Vinod Koul 2021-10-20 676 \t\t\tmas->cur_xfer_mode = GENI_GPI_DMA;\n" - "b59c122484ecb1 Vinod Koul 2021-10-20 677 \t\t\tgeni_se_select_mode(se, GENI_GPI_DMA);\n" - "b59c122484ecb1 Vinod Koul 2021-10-20 678 \t\t\tdev_dbg(mas->dev, \"Using GPI DMA mode for SPI\\n\");\n" - "b59c122484ecb1 Vinod Koul 2021-10-20 679 \t\t\tbreak;\n" - "9d7054fb3ac2e8 Neil Armstrong 2023-06-15 680 \t\t} else if (ret == -EPROBE_DEFER) {\n" - "d8e9ea989acb54 Praveen Talari 2026-07-10 681 \t\t\treturn ret;\n" - "b59c122484ecb1 Vinod Koul 2021-10-20 682 \t\t}\n" - "b59c122484ecb1 Vinod Koul 2021-10-20 683 \t\t/*\n" - "e5f0dfa78ac773 Vijaya Krishna Nivarthi 2022-12-08 684 \t\t * in case of failure to get gpi dma channel, we can still do the\n" - "b59c122484ecb1 Vinod Koul 2021-10-20 685 \t\t * FIFO mode, so fallthrough\n" - "b59c122484ecb1 Vinod Koul 2021-10-20 686 \t\t */\n" - "b59c122484ecb1 Vinod Koul 2021-10-20 687 \t\tdev_warn(mas->dev, \"FIFO mode disabled, but couldn't get DMA, fall back to FIFO mode\\n\");\n" - "b59c122484ecb1 Vinod Koul 2021-10-20 688 \t\tfallthrough;\n" - "b59c122484ecb1 Vinod Koul 2021-10-20 689 \n" - "b59c122484ecb1 Vinod Koul 2021-10-20 690 \tcase 0:\n" - "b59c122484ecb1 Vinod Koul 2021-10-20 691 \t\tmas->cur_xfer_mode = GENI_SE_FIFO;\n" - "da48dc8c70c20e Douglas Anderson 2020-07-01 692 \t\tgeni_se_select_mode(se, GENI_SE_FIFO);\n" - "739062a9f1e9a7 Jonathan Marek 2025-11-20 693 \t\t/* setup_fifo_params assumes that these registers start with a zero value */\n" - "739062a9f1e9a7 Jonathan Marek 2025-11-20 694 \t\twritel(0, se->base + SE_SPI_LOOPBACK);\n" - "739062a9f1e9a7 Jonathan Marek 2025-11-20 695 \t\twritel(0, se->base + SE_SPI_DEMUX_SEL);\n" - "739062a9f1e9a7 Jonathan Marek 2025-11-20 696 \t\twritel(0, se->base + SE_SPI_CPHA);\n" - "739062a9f1e9a7 Jonathan Marek 2025-11-20 697 \t\twritel(0, se->base + SE_SPI_CPOL);\n" - "739062a9f1e9a7 Jonathan Marek 2025-11-20 698 \t\twritel(0, se->base + SE_SPI_DEMUX_OUTPUT_INV);\n" - "b59c122484ecb1 Vinod Koul 2021-10-20 699 \t\tret = 0;\n" - "b59c122484ecb1 Vinod Koul 2021-10-20 700 \t\tbreak;\n" - "b59c122484ecb1 Vinod Koul 2021-10-20 701 \t}\n" - "da48dc8c70c20e Douglas Anderson 2020-07-01 702 \n" - "b99181cdf9fa02 Jonathan Marek 2025-11-20 703 \t/* We never control CS manually */\n" - "8726bdcef62eac Yang Yingliang 2023-11-28 704 \tif (!spi->target) {\n" - "14ac4e049dc118 Douglas Anderson 2020-09-12 705 \t\tspi_tx_cfg = readl(se->base + SE_SPI_TRANS_CFG);\n" - "14ac4e049dc118 Douglas Anderson 2020-09-12 706 \t\tspi_tx_cfg &= ~CS_TOGGLE;\n" - "14ac4e049dc118 Douglas Anderson 2020-09-12 707 \t\twritel(spi_tx_cfg, se->base + SE_SPI_TRANS_CFG);\n" - "d7f74cc31a89a4 Praveen Talari 2023-07-14 708 \t}\n" - "14ac4e049dc118 Douglas Anderson 2020-09-12 709 \n" - "b59c122484ecb1 Vinod Koul 2021-10-20 710 \treturn ret;\n" - "561de45f72bd5f Girish Mahadevan 2018-10-03 711 }\n" - "561de45f72bd5f Girish Mahadevan 2018-10-03 712 \n" "\n" "--\n" "0-DAY CI Kernel Test Service\n" https://github.com/intel/lkp-tests/wiki -0cfadaeac9d24292e00cff91655a9bc74bc4502461a4aba6e97613e59109b49b +224c6420c70d210f7f60d656505e0273f687f1135eef4fc9d1ffda4d5b5a4f17
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