From: sashiko-bot@kernel.org
To: "AngeloGioacchino Del Regno" <angelogioacchino.delregno@collabora.com>
Cc: robh@kernel.org, dri-devel@lists.freedesktop.org,
devicetree@vger.kernel.org, conor+dt@kernel.org
Subject: Re: [PATCH v2 05/10] drm/mediatek: mtk_dsi: Transfer register offsets to per-SoC const
Date: Mon, 13 Jul 2026 10:07:28 +0000 [thread overview]
Message-ID: <20260713100729.607151F000E9@smtp.kernel.org> (raw)
In-Reply-To: <20260713095837.16590-6-angelogioacchino.delregno@collabora.com>
Thank you for your contribution! Sashiko AI review found 1 potential issue(s) to consider:
- [High] The loop reading DSI RX data in `mtk_dsi_host_transfer` incorrectly uses the loop counter to offset the `reg_main` array index instead of the MMIO base offset, causing out-of-bounds array reads and accessing incorrect hardware registers.
--
--- Patch [5]: [PATCH v2 05/10] drm/mediatek: mtk_dsi: Transfer register offsets to per-SoC const ---
commit 43b878ef0a8fe56d80e1c26ea5be280083d3ccaf
Author: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
drm/mediatek: mtk_dsi: Transfer register offsets to per-SoC const
This patch refactors the MediaTek DSI driver by moving register offsets
into per-SoC constant arrays. This separates the main DSI registers from the
advanced and SoC-specific ones, preparing the driver for newer hardware
generations with different register layouts.
> diff --git a/drivers/gpu/drm/mediatek/mtk_dsi.c b/drivers/gpu/drm/mediatek/mtk_dsi.c
> index 284dae372c7c2..6a77ce8eea91f 100644
> --- a/drivers/gpu/drm/mediatek/mtk_dsi.c
> +++ b/drivers/gpu/drm/mediatek/mtk_dsi.c
[ ... ]
> @@ -1259,7 +1394,8 @@ static ssize_t mtk_dsi_host_transfer(struct mipi_dsi_host *host,
> }
>
> for (i = 0; i < 16; i++)
> - *(read_data + i) = readb(dsi->regs + DSI_RX_DATA0 + i);
> + *(read_data + i) = readb(dsi->regs +
> + dsi->driver_data->reg_main[DSI_RX_DATA0 + i]);
[Severity: High]
Does this code read out of bounds on the reg_main array?
The original code added i to the DSI_RX_DATA0 offset to read consecutive bytes.
In the new code, DSI_RX_DATA0 is an enum value (17). When adding i (which goes
up to 15) to DSI_RX_DATA0 inside the index, this accesses reg_main up to index
32, but DSI_MAIN_REG_MAX is only 28.
This means for i >= 4, the code will fetch unrelated register offsets (such as
DSI_RACK or DSI_PHY_LCCON) instead of the expected RX data bytes. For i >= 11,
it reads past the end of the reg_main array, which could cause MMIO reads at
unexpected addresses.
Should the loop counter i be added after the array lookup instead, such as
dsi->driver_data->reg_main[DSI_RX_DATA0] + i?
>
> recv_cnt = mtk_dsi_recv_cnt(read_data[0], read_data);
>
[ ... ]
--
Sashiko AI review · https://sashiko.dev/#/patchset/20260713095837.16590-1-angelogioacchino.delregno@collabora.com?part=5
next prev parent reply other threads:[~2026-07-13 10:07 UTC|newest]
Thread overview: 19+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-07-13 9:58 [PATCH v2 00/10] drm/mediatek: Add DSC, WDMA, MT8189/96 DSI support AngeloGioacchino Del Regno
2026-07-13 9:58 ` [PATCH v2 01/10] dt-bindings: display: mediatek: dsc: Add MT8196 compatible AngeloGioacchino Del Regno
2026-07-13 9:58 ` [PATCH v2 02/10] drm/mediatek: Implement Display Stream Compression support AngeloGioacchino Del Regno
2026-07-13 10:13 ` sashiko-bot
2026-07-13 9:58 ` [PATCH v2 03/10] dt-bindings: display: mediatek: dsi: Document MT8189 and MT8196 AngeloGioacchino Del Regno
2026-07-13 9:58 ` [PATCH v2 04/10] drm/mediatek: mtk_dsi: Enable interrupt at component bind time AngeloGioacchino Del Regno
2026-07-13 10:11 ` sashiko-bot
2026-07-13 9:58 ` [PATCH v2 05/10] drm/mediatek: mtk_dsi: Transfer register offsets to per-SoC const AngeloGioacchino Del Regno
2026-07-13 10:07 ` sashiko-bot [this message]
2026-07-13 9:58 ` [PATCH v2 06/10] drm/mediatek: mtk_dsi: Add support for MT8189 AngeloGioacchino Del Regno
2026-07-13 10:13 ` sashiko-bot
2026-07-13 9:58 ` [PATCH v2 07/10] drm/mediatek: mtk_dsi: Add support for MT8196 AngeloGioacchino Del Regno
2026-07-13 10:13 ` sashiko-bot
2026-07-13 9:58 ` [PATCH v2 08/10] drm/mediatek: mtk_dsi: Enable PM Runtime on probe AngeloGioacchino Del Regno
2026-07-13 10:23 ` sashiko-bot
2026-07-13 9:58 ` [PATCH v2 09/10] dt-bindings: display: mediatek: wdma: Add compatibles for more SoCs AngeloGioacchino Del Regno
2026-07-13 10:23 ` sashiko-bot
2026-07-13 9:58 ` [PATCH v2 10/10] drm/mediatek: Add Write DMA (WDMA) Engine for Writeback support AngeloGioacchino Del Regno
2026-07-13 10:26 ` sashiko-bot
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