From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-alma10-1.taild15c8.ts.net [100.103.45.18]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id B50BE3DBD77 for ; Mon, 13 Jul 2026 10:48:36 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=100.103.45.18 ARC-Seal:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1783939718; cv=none; b=GoFhTtmf9mJvvRDaygXY/+ymV0CYfsZonjCUmz4qwWCLytklmuqN3TUsg9nQf3xYUdcaQPWypVOr6vrHXSy0CF1qTdxOK2shrNG2QGL4OR1aJwjoQiWa5w8oQlTnT7kWVGTg30DCi8PVCJHTGFm9A6c6RNMng/c9dl7Nni2/wT8= ARC-Message-Signature:i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1783939718; c=relaxed/simple; bh=ca04SHVGrGf9srV2cq7jOJ6Ck74o6PMKz777drQj78s=; h=From:Subject:To:Cc:In-Reply-To:References:Content-Type:Date: Message-Id; b=bL6z9Z/tgTr8u5Xmn+HpyywKWlR3z2ip354SWv2S9VxvBXsYR7/P/1oJT+z4B0bizDnKhiUK96TveDuoE1MPS2kdBR1qs1ymKNVAoCsgdsrM9ffokbtukwIeY4wsD0enbGiNiD3vZOJj+FdF1M5Cdq0x8aV3xm8asWiWfP4yaK8= ARC-Authentication-Results:i=1; smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b=NQXKinrI; arc=none smtp.client-ip=100.103.45.18 Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org header.b="NQXKinrI" Received: by smtp.kernel.org (Postfix) with ESMTPSA id B14401F000E9; Mon, 13 Jul 2026 10:48:35 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=kernel.org; s=k20260515; t=1783939716; bh=joM5xgBMc4RGmzMrirARnsAMqCbi+hseeTpklEeWnqo=; h=From:Subject:Reply-To:To:Cc:In-Reply-To:References:Date; b=NQXKinrIg9//o0fJBswvaUnIFClXlbvufjwxhxiQzNiUN+VETRDFM+7g5gdvzDQ6O 9E/IjbbdeM/Qk4P4xEk68XBBPQkFM7pUlk+STlyXZLaNY6McVVm2f//w5QriwD4bJm 1NAga6WZLWuFHzfhVbT6YwQRAUmGOkDLVfjGdbDnklZqy23of59R+2tKeTQr8uGnh4 29uVQzOQaeveYE2RNSWh0sfVqTqiC1caWZmBcEEIqxxG3RADDCGmdOUwqK9xi2I7Fd jzRtGNYrJFLEVb4IqRA/NViBACFFYFg+g6y5RSF0daOJVS5CZc/v325MZyYHGqe1GL +oyFUnnAyq7zA== From: sashiko-bot@kernel.org Subject: Re: [PATCH v3 2/2] phy: mediatek: Add support for MT8196 MIPI DSI PHY Reply-To: sashiko-reviews@lists.linux.dev To: "AngeloGioacchino Del Regno" Cc: conor+dt@kernel.org, dri-devel@lists.freedesktop.org, devicetree@vger.kernel.org, neil.armstrong@linaro.org, linux-phy@lists.infradead.org, vkoul@kernel.org, robh@kernel.org, olteanv@gmail.com In-Reply-To: <20260713103805.23030-3-angelogioacchino.delregno@collabora.com> References: <20260713103805.23030-1-angelogioacchino.delregno@collabora.com> <20260713103805.23030-3-angelogioacchino.delregno@collabora.com> Content-Type: text/plain; charset=utf-8 Content-Transfer-Encoding: quoted-printable Date: Mon, 13 Jul 2026 10:48:35 +0000 Message-Id: <20260713104835.B14401F000E9@smtp.kernel.org> Precedence: bulk X-Mailing-List: devicetree@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: Thank you for your contribution! Sashiko AI review found 1 potential issue(= s) to consider: - [Medium] Signaling voltage boost is exclusively tied to the absolute maxi= mum clamped frequency, preventing high data rates from receiving the boost. -- --- Patch [2]: [PATCH v3 2/2] phy: mediatek: Add support for MT8196 MIPI DS= I PHY --- commit a6b40caad1ac266a0481ef7b26baffceb672008c Author: AngeloGioacchino Del Regno phy: mediatek: Add support for MT8196 MIPI DSI PHY This commit adds support for the MIPI DSI PHY found in the MediaTek MT8196 SoC and its variants. It introduces a new register layout and basic D-PHY functionality needed to drive MIPI DSI displays. > diff --git a/drivers/phy/mediatek/phy-mtk-mipi-dsi-mt8196.c b/drivers/phy= /mediatek/phy-mtk-mipi-dsi-mt8196.c > new file mode 100644 > index 0000000000000..eac3db9922dba > --- /dev/null > +++ b/drivers/phy/mediatek/phy-mtk-mipi-dsi-mt8196.c [ ... ] > +static int mtk_mipi_tx_pll_enable(struct clk_hw *hw) > +{ > + struct mtk_mipi_tx *mipi_tx =3D mtk_mipi_tx_from_clk_hw(hw); > + void __iomem *base =3D mipi_tx->regs; > + u32 voltage =3D RG_DSI_PRD_REF_MINI; > + u32 pres =3D MIPITX_PRESERVED_MINI; > + unsigned long long pcw_calc; > + unsigned int txdiv, txdiv0; > + u32 pcw; > + > + dev_dbg(mipi_tx->dev, "enable: %u bps\n", mipi_tx->data_rate); > + > + if (mipi_tx->data_rate >=3D DSI_PHY_PLL_MAX_RATE_HZ) { > + /* Select higher signaling voltage for fast data rates */ > + voltage =3D RG_DSI_PRD_REF_DEF; > + pres =3D MIPITX_PRESERVED_DEF; > + txdiv =3D 1; > + txdiv0 =3D 0; > + } else if (mipi_tx->data_rate >=3D 1000000000) { [Severity: Medium] Does this logic unintentionally restrict the higher signaling voltage to on= ly exact matches of the maximum PLL rate? Since mtk_mipi_tx_pll_determine_rate() clamps the clock rate to DSI_PHY_PLL_MAX_RATE_HZ (2.0 GHz), mipi_tx->data_rate can never exceed this value. Consequently, panels requesting data rates slightly below 2.0 GHz (for example, 1.99 GHz) will fall through to the 1.0 GHz branch instead of receiving the voltage boost and correct PLL dividers intended for fast data rates. Could this conflation between the PLL octave band threshold and the maximum frequency clamp macro also break the PLL divider logic if the maximum supported rate limit is increased in the future? --=20 Sashiko AI review =C2=B7 https://sashiko.dev/#/patchset/20260713103805.2303= 0-1-angelogioacchino.delregno@collabora.com?part=3D2 From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 73890C43458 for ; Mon, 13 Jul 2026 10:48:38 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:MIME-Version:Reply-To:List-Subscribe: List-Help:List-Post:List-Archive:List-Unsubscribe:List-Id:Message-Id:Date: References:In-Reply-To:Cc:To:Subject:From:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=ius6zLU1kv3bNrlkit0oUM2eM/V6h47ksnjYYsXRTeQ=; b=1K8+DArvvRRwBO CVkvXIfvoKuhV3d+boT0OwZLIekCVZDforWFCyaj/0pn/gQx9bA3Re3GJLip0oYYpWtOfBETS69HD S8n9Y5pYP1CA3XFD/nkjcfl0+VtfBUVFRo9HsO2xkS2SFi+MpfdJ8D/8AGzh+7y90PUggUdoitEVS hcEfTiEO+JiTa9tVgQjT+zZNkO1/rBU4MAPqm9BjF0HY2zgEIlOmprKsR5okwJEPEXsWVsYN54zsj +uT7Si0ZwuPwq6y4eSS85vfeb/lW8YPrhZ+iJfR1bXuj1YIqez9Q1I/XXvTm9kpOi5IZt6DfNlf9s dIkeiDaWd9TNL+jOrMDA==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.99.1 #2 (Red Hat Linux)) id 1wjEDG-00000008vVR-0NgC; Mon, 13 Jul 2026 10:48:38 +0000 Received: from tor.source.kernel.org ([172.105.4.254]) by bombadil.infradead.org with esmtps (Exim 4.99.1 #2 (Red Hat Linux)) id 1wjEDF-00000008vVL-1HPY for linux-phy@lists.infradead.org; Mon, 13 Jul 2026 10:48:37 +0000 Received: from smtp.kernel.org (quasi.space.kernel.org [100.103.45.18]) by tor.source.kernel.org (Postfix) with ESMTP id 82B8E6004E; Mon, 13 Jul 2026 10:48:36 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id B14401F000E9; Mon, 13 Jul 2026 10:48:35 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=kernel.org; s=k20260515; t=1783939716; bh=joM5xgBMc4RGmzMrirARnsAMqCbi+hseeTpklEeWnqo=; h=From:Subject:Reply-To:To:Cc:In-Reply-To:References:Date; b=NQXKinrIg9//o0fJBswvaUnIFClXlbvufjwxhxiQzNiUN+VETRDFM+7g5gdvzDQ6O 9E/IjbbdeM/Qk4P4xEk68XBBPQkFM7pUlk+STlyXZLaNY6McVVm2f//w5QriwD4bJm 1NAga6WZLWuFHzfhVbT6YwQRAUmGOkDLVfjGdbDnklZqy23of59R+2tKeTQr8uGnh4 29uVQzOQaeveYE2RNSWh0sfVqTqiC1caWZmBcEEIqxxG3RADDCGmdOUwqK9xi2I7Fd jzRtGNYrJFLEVb4IqRA/NViBACFFYFg+g6y5RSF0daOJVS5CZc/v325MZyYHGqe1GL +oyFUnnAyq7zA== From: sashiko-bot@kernel.org Subject: Re: [PATCH v3 2/2] phy: mediatek: Add support for MT8196 MIPI DSI PHY To: "AngeloGioacchino Del Regno" Cc: conor+dt@kernel.org, dri-devel@lists.freedesktop.org, devicetree@vger.kernel.org, neil.armstrong@linaro.org, linux-phy@lists.infradead.org, vkoul@kernel.org, robh@kernel.org, olteanv@gmail.com In-Reply-To: <20260713103805.23030-3-angelogioacchino.delregno@collabora.com> References: <20260713103805.23030-1-angelogioacchino.delregno@collabora.com> <20260713103805.23030-3-angelogioacchino.delregno@collabora.com> Date: Mon, 13 Jul 2026 10:48:35 +0000 Message-Id: <20260713104835.B14401F000E9@smtp.kernel.org> X-BeenThere: linux-phy@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: Linux Phy Mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Reply-To: sashiko-reviews@lists.linux.dev MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: base64 Sender: "linux-phy" Errors-To: linux-phy-bounces+linux-phy=archiver.kernel.org@lists.infradead.org VGhhbmsgeW91IGZvciB5b3VyIGNvbnRyaWJ1dGlvbiEgU2FzaGlrbyBBSSByZXZpZXcgZm91bmQg MSBwb3RlbnRpYWwgaXNzdWUocykgdG8gY29uc2lkZXI6Ci0gW01lZGl1bV0gU2lnbmFsaW5nIHZv bHRhZ2UgYm9vc3QgaXMgZXhjbHVzaXZlbHkgdGllZCB0byB0aGUgYWJzb2x1dGUgbWF4aW11bSBj bGFtcGVkIGZyZXF1ZW5jeSwgcHJldmVudGluZyBoaWdoIGRhdGEgcmF0ZXMgZnJvbSByZWNlaXZp bmcgdGhlIGJvb3N0LgotLQoKLS0tIFBhdGNoIFsyXTogW1BBVENIIHYzIDIvMl0gcGh5OiBtZWRp YXRlazogQWRkIHN1cHBvcnQgZm9yIE1UODE5NiBNSVBJIERTSSBQSFkgLS0tCmNvbW1pdCBhNmI0 MGNhYWQxYWMyNjZhMDQ4MWVmN2IyNmJhZmZjZWI2NzIwMDhjCkF1dGhvcjogQW5nZWxvR2lvYWNj aGlubyBEZWwgUmVnbm8gPGFuZ2Vsb2dpb2FjY2hpbm8uZGVscmVnbm9AY29sbGFib3JhLmNvbT4K CnBoeTogbWVkaWF0ZWs6IEFkZCBzdXBwb3J0IGZvciBNVDgxOTYgTUlQSSBEU0kgUEhZCgpUaGlz IGNvbW1pdCBhZGRzIHN1cHBvcnQgZm9yIHRoZSBNSVBJIERTSSBQSFkgZm91bmQgaW4gdGhlIE1l ZGlhVGVrIE1UODE5NgpTb0MgYW5kIGl0cyB2YXJpYW50cy4gSXQgaW50cm9kdWNlcyBhIG5ldyBy ZWdpc3RlciBsYXlvdXQgYW5kIGJhc2ljIEQtUEhZCmZ1bmN0aW9uYWxpdHkgbmVlZGVkIHRvIGRy aXZlIE1JUEkgRFNJIGRpc3BsYXlzLgoKPiBkaWZmIC0tZ2l0IGEvZHJpdmVycy9waHkvbWVkaWF0 ZWsvcGh5LW10ay1taXBpLWRzaS1tdDgxOTYuYyBiL2RyaXZlcnMvcGh5L21lZGlhdGVrL3BoeS1t dGstbWlwaS1kc2ktbXQ4MTk2LmMKPiBuZXcgZmlsZSBtb2RlIDEwMDY0NAo+IGluZGV4IDAwMDAw MDAwMDAwMDAuLmVhYzNkYjk5MjJkYmEKPiAtLS0gL2Rldi9udWxsCj4gKysrIGIvZHJpdmVycy9w aHkvbWVkaWF0ZWsvcGh5LW10ay1taXBpLWRzaS1tdDgxOTYuYwoKWyAuLi4gXQoKPiArc3RhdGlj IGludCBtdGtfbWlwaV90eF9wbGxfZW5hYmxlKHN0cnVjdCBjbGtfaHcgKmh3KQo+ICt7Cj4gKwlz dHJ1Y3QgbXRrX21pcGlfdHggKm1pcGlfdHggPSBtdGtfbWlwaV90eF9mcm9tX2Nsa19odyhodyk7 Cj4gKwl2b2lkIF9faW9tZW0gKmJhc2UgPSBtaXBpX3R4LT5yZWdzOwo+ICsJdTMyIHZvbHRhZ2Ug PSBSR19EU0lfUFJEX1JFRl9NSU5JOwo+ICsJdTMyIHByZXMgPSBNSVBJVFhfUFJFU0VSVkVEX01J Tkk7Cj4gKwl1bnNpZ25lZCBsb25nIGxvbmcgcGN3X2NhbGM7Cj4gKwl1bnNpZ25lZCBpbnQgdHhk aXYsIHR4ZGl2MDsKPiArCXUzMiBwY3c7Cj4gKwo+ICsJZGV2X2RiZyhtaXBpX3R4LT5kZXYsICJl bmFibGU6ICV1IGJwc1xuIiwgbWlwaV90eC0+ZGF0YV9yYXRlKTsKPiArCj4gKwlpZiAobWlwaV90 eC0+ZGF0YV9yYXRlID49IERTSV9QSFlfUExMX01BWF9SQVRFX0haKSB7Cj4gKwkJLyogU2VsZWN0 IGhpZ2hlciBzaWduYWxpbmcgdm9sdGFnZSBmb3IgZmFzdCBkYXRhIHJhdGVzICovCj4gKwkJdm9s dGFnZSA9IFJHX0RTSV9QUkRfUkVGX0RFRjsKPiArCQlwcmVzID0gTUlQSVRYX1BSRVNFUlZFRF9E RUY7Cj4gKwkJdHhkaXYgPSAxOwo+ICsJCXR4ZGl2MCA9IDA7Cj4gKwl9IGVsc2UgaWYgKG1pcGlf dHgtPmRhdGFfcmF0ZSA+PSAxMDAwMDAwMDAwKSB7CgpbU2V2ZXJpdHk6IE1lZGl1bV0KRG9lcyB0 aGlzIGxvZ2ljIHVuaW50ZW50aW9uYWxseSByZXN0cmljdCB0aGUgaGlnaGVyIHNpZ25hbGluZyB2 b2x0YWdlIHRvIG9ubHkKZXhhY3QgbWF0Y2hlcyBvZiB0aGUgbWF4aW11bSBQTEwgcmF0ZT8KClNp bmNlIG10a19taXBpX3R4X3BsbF9kZXRlcm1pbmVfcmF0ZSgpIGNsYW1wcyB0aGUgY2xvY2sgcmF0 ZSB0bwpEU0lfUEhZX1BMTF9NQVhfUkFURV9IWiAoMi4wIEdIeiksIG1pcGlfdHgtPmRhdGFfcmF0 ZSBjYW4gbmV2ZXIgZXhjZWVkIHRoaXMKdmFsdWUuIENvbnNlcXVlbnRseSwgcGFuZWxzIHJlcXVl c3RpbmcgZGF0YSByYXRlcyBzbGlnaHRseSBiZWxvdyAyLjAgR0h6Cihmb3IgZXhhbXBsZSwgMS45 OSBHSHopIHdpbGwgZmFsbCB0aHJvdWdoIHRvIHRoZSAxLjAgR0h6IGJyYW5jaCBpbnN0ZWFkIG9m CnJlY2VpdmluZyB0aGUgdm9sdGFnZSBib29zdCBhbmQgY29ycmVjdCBQTEwgZGl2aWRlcnMgaW50 ZW5kZWQgZm9yIGZhc3QgZGF0YQpyYXRlcy4KCkNvdWxkIHRoaXMgY29uZmxhdGlvbiBiZXR3ZWVu IHRoZSBQTEwgb2N0YXZlIGJhbmQgdGhyZXNob2xkIGFuZCB0aGUgbWF4aW11bQpmcmVxdWVuY3kg Y2xhbXAgbWFjcm8gYWxzbyBicmVhayB0aGUgUExMIGRpdmlkZXIgbG9naWMgaWYgdGhlIG1heGlt dW0Kc3VwcG9ydGVkIHJhdGUgbGltaXQgaXMgaW5jcmVhc2VkIGluIHRoZSBmdXR1cmU/CgotLSAK U2FzaGlrbyBBSSByZXZpZXcgwrcgaHR0cHM6Ly9zYXNoaWtvLmRldi8jL3BhdGNoc2V0LzIwMjYw NzEzMTAzODA1LjIzMDMwLTEtYW5nZWxvZ2lvYWNjaGluby5kZWxyZWdub0Bjb2xsYWJvcmEuY29t P3BhcnQ9MgoKLS0gCmxpbnV4LXBoeSBtYWlsaW5nIGxpc3QKbGludXgtcGh5QGxpc3RzLmluZnJh ZGVhZC5vcmcKaHR0cHM6Ly9saXN0cy5pbmZyYWRlYWQub3JnL21haWxtYW4vbGlzdGluZm8vbGlu dXgtcGh5Cg==