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From: "Timur Kristóf" <timur.kristof@gmail.com>
To: amd-gfx@lists.freedesktop.org,
	Alex Deucher <alexander.deucher@amd.com>,
	christian.koenig@amd.com, Tvrtko Ursulin <tursulin@ursulin.net>,
	pierre-eric.pelloux-prayer@amd.com,
	Natalie Vock <natalie.vock@gmx.de>
Cc: "Timur Kristóf" <timur.kristof@gmail.com>
Subject: [PATCH 06/11] drm/amdgpu/gfx6: Execute CLEAR_STATE when initializing compute rings
Date: Mon, 13 Jul 2026 15:07:04 +0200	[thread overview]
Message-ID: <20260713130709.34262-7-timur.kristof@gmail.com> (raw)
In-Reply-To: <20260713130709.34262-1-timur.kristof@gmail.com>

Emit a compute CLEAR_STATE packet on the compute rings after
the GFX ring already finished executing ME_INITIALIZE and
before the ring test, so that gfx_v6_0_cp_gfx_resume() can
wait until the CLEAR_STATE is complete.

For reference, see si_cp_start() in the old radeon driver.

Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
---
 drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c | 8 ++++++++
 1 file changed, 8 insertions(+)

diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c b/drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c
index eeada89bb31a..5b570a4b5c01 100644
--- a/drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c
@@ -2263,6 +2263,14 @@ static int gfx_v6_0_cp_gfx_resume(struct amdgpu_device *adev)
 	for (i = 0; i < adev->gfx.num_compute_rings; i++) {
 		ring = &adev->gfx.compute_ring[i];
 
+		r = amdgpu_ring_alloc(ring, 2);
+		if (r)
+			return r;
+
+		amdgpu_ring_write(ring, PACKET3_COMPUTE(PACKET3_CLEAR_STATE, 0));
+		amdgpu_ring_write(ring, 0);
+		amdgpu_ring_commit(ring);
+
 		r = amdgpu_ring_test_helper(ring);
 		if (r)
 			return r;
-- 
2.55.0


  parent reply	other threads:[~2026-07-13 13:07 UTC|newest]

Thread overview: 15+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2026-07-13 13:06 [PATCH 00/11] drm/amdgpu/gfx6: Use GFX IP block soft reset on GFX6 Timur Kristóf
2026-07-13 13:06 ` [PATCH 01/11] drm/amdgpu/gfx6: Improve emit_cntxcntl() Timur Kristóf
2026-07-13 13:07 ` [PATCH 02/11] drm/amdgpu/gfx6: Fixup emitting SWITCH_BUFFER packets Timur Kristóf
2026-07-13 13:07 ` [PATCH 03/11] drm/amdgpu/gfx6: Use PFP on the compute queues too Timur Kristóf
2026-07-13 13:07 ` [PATCH 04/11] drm/amdgpu/gfx6: Initialize compute rings before CP start Timur Kristóf
2026-07-13 13:07 ` [PATCH 05/11] drm/amdgpu/gfx6: Clean up rings during reset Timur Kristóf
2026-07-13 13:07 ` Timur Kristóf [this message]
2026-07-13 13:07 ` [PATCH 07/11] drm/amdgpu/gfx6: Properly enable/disable priv_req and priv_inst interrupts Timur Kristóf
2026-07-15 10:19   ` Tvrtko Ursulin
2026-07-15 10:53     ` Timur Kristóf
2026-07-15 11:22       ` Tvrtko Ursulin
2026-07-13 13:07 ` [PATCH 08/11] drm/amdgpu/gfx6: Adjust how harvested TCCs are set up Timur Kristóf
2026-07-13 13:07 ` [PATCH 09/11] drm/amdgpu/gfx6: Use COND_EXEC Timur Kristóf
2026-07-13 13:07 ` [PATCH 10/11] drm/amdgpu/gfx6: Add IP block soft reset implementation Timur Kristóf
2026-07-13 13:07 ` [PATCH 11/11] drm/amdgpu/gfx6: Enable IP block soft reset as a GPU recovery method Timur Kristóf

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