Re: [PATCH 1/2] ASoC: dt-bindings: qcom,lpass-va-csr: Add HeartBeat pulse clock

[sashiko-bot@kernel.org]

Thank you for your contribution! Sashiko AI review found 1 potential issue(s) to consider:
- [Low] Schema validation failure in example due to missing #address-cells and #size-cells parent node
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--- Patch [1]: [PATCH 1/2] ASoC: dt-bindings: qcom,lpass-va-csr: Add HeartBeat pulse clock ---
commit 9f770d5091cc6e0fe9a0f15696b43becc2db0bc2
Author: Sarath Ganapathiraju <sarath.ganapathiraju@oss.qualcomm.com>
ASoC: dt-bindings: qcom,lpass-va-csr: Add HeartBeat pulse clock

This commit adds the Qualcomm LPASS VA CSR rate generator node binding to
expose the heartbeat pulse clock. It also extends the qcom,lpass-va-macro
binding to incorporate this new clock as a constraint.

> diff --git a/Documentation/devicetree/bindings/sound/qcom,lpass-va-csr.yaml b/Documentation/devicetree/bindings/sound/qcom,lpass-va-csr.yaml
> new file mode 100644
> index 0000000000000..794da92adcf88
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/sound/qcom,lpass-va-csr.yaml

[ ... ]

> +examples:
> +  - |
> +    va-csr@7ee0000 {
> +      compatible = "qcom,hawi-lpass-va-csr";
> +      reg = <0x0 0x07ee0000 0x0 0xe000>;

[Severity: Low]
Will this example fail dt_binding_check validation?

By default, the root node in DT schema examples assumes #address-cells = <1>
and #size-cells = <1>. Because of this, the 4-cell reg property here parses
as two items (two address/size pairs of 1 cell each).

Since the schema explicitly constrains reg with maxItems: 1 earlier in the
file, does this need a dummy parent node specifying #address-cells = <2>
and #size-cells = <2> to pass validation?

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Sashiko AI review · https://sashiko.dev/#/patchset/20260714-master-v1-0-1ebe5993225e@oss.qualcomm.com?part=1